drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
a169f09b · Ben Skeggs · aa2c2e80 · a169f09b
Commit a169f09b authored Nov 05, 2010 by Ben Skeggs
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Showing with 4 additions and 5 deletions

drivers/gpu/drm/nouveau/nv50_graph.c drivers/gpu/drm/nouveau/nv50_graph.c +4 -5

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--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -451,11 +451,10 @@ nv50_graph_register(struct drm_device *dev)
 	}
 	/* compute */
-	if (dev_priv->chipset <= 0xa0 ||
+	NVOBJ_CLASS(dev, 0x50c0, GR);
-	    dev_priv->chipset == 0xaa ||
+	if (dev_priv->chipset  > 0xa0 &&
-	    dev_priv->chipset == 0xac)
+	    dev_priv->chipset != 0xaa &&
-		NVOBJ_CLASS(dev, 0x50c0, GR);
+	    dev_priv->chipset != 0xac)
-	else
 		NVOBJ_CLASS(dev, 0x85c0, GR);
 	dev_priv->engine.graph.registered = true;