Commit bba8289b authored by Jason Yan's avatar Jason Yan Committed by Alex Deucher

drm/amd/display: code clean up in dce80_hw_sequencer.c

Fix the following gcc warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_hw_sequencer.c:43:46:
warning: ‘reg_offsets’ defined but not used [-Wunused-const-variable=]
 static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
                                              ^~~~~~~~~~~
Reported-by: default avatarHulk Robot <hulkci@huawei.com>
Signed-off-by: default avatarJason Yan <yanaijie@huawei.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a4c24680
...@@ -36,34 +36,6 @@ ...@@ -36,34 +36,6 @@
#include "dce/dce_8_0_d.h" #include "dce/dce_8_0_d.h"
#include "dce/dce_8_0_sh_mask.h" #include "dce/dce_8_0_sh_mask.h"
struct dce80_hw_seq_reg_offsets {
uint32_t crtc;
};
static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
{
.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
},
{
.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
},
{
.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
},
{
.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
},
{
.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
},
{
.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
}
};
#define HW_REG_CRTC(reg, id)\
(reg + reg_offsets[id].crtc)
/******************************************************************************* /*******************************************************************************
* Private definitions * Private definitions
******************************************************************************/ ******************************************************************************/
......
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