Commit c4120d55 authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: use begin/end_use for UVD power/clock gating

This fixes turning power and clock on when it is actually needed.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarEdward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f06505b8
...@@ -92,7 +92,6 @@ MODULE_FIRMWARE(FIRMWARE_STONEY); ...@@ -92,7 +92,6 @@ MODULE_FIRMWARE(FIRMWARE_STONEY);
MODULE_FIRMWARE(FIRMWARE_POLARIS10); MODULE_FIRMWARE(FIRMWARE_POLARIS10);
MODULE_FIRMWARE(FIRMWARE_POLARIS11); MODULE_FIRMWARE(FIRMWARE_POLARIS11);
static void amdgpu_uvd_note_usage(struct amdgpu_device *adev);
static void amdgpu_uvd_idle_work_handler(struct work_struct *work); static void amdgpu_uvd_idle_work_handler(struct work_struct *work);
int amdgpu_uvd_sw_init(struct amdgpu_device *adev) int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
...@@ -346,8 +345,6 @@ void amdgpu_uvd_free_handles(struct amdgpu_device *adev, struct drm_file *filp) ...@@ -346,8 +345,6 @@ void amdgpu_uvd_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
if (handle != 0 && adev->uvd.filp[i] == filp) { if (handle != 0 && adev->uvd.filp[i] == filp) {
struct fence *fence; struct fence *fence;
amdgpu_uvd_note_usage(adev);
r = amdgpu_uvd_get_destroy_msg(ring, handle, r = amdgpu_uvd_get_destroy_msg(ring, handle,
false, &fence); false, &fence);
if (r) { if (r) {
...@@ -913,8 +910,6 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx) ...@@ -913,8 +910,6 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)
return -EINVAL; return -EINVAL;
} }
amdgpu_uvd_note_usage(ctx.parser->adev);
return 0; return 0;
} }
...@@ -1114,11 +1109,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) ...@@ -1114,11 +1109,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
} }
} }
static void amdgpu_uvd_note_usage(struct amdgpu_device *adev) void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev;
bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work); bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
set_clocks &= schedule_delayed_work(&adev->uvd.idle_work,
UVD_IDLE_TIMEOUT);
if (set_clocks) { if (set_clocks) {
if (adev->pm.dpm_enabled) { if (adev->pm.dpm_enabled) {
...@@ -1128,3 +1122,8 @@ static void amdgpu_uvd_note_usage(struct amdgpu_device *adev) ...@@ -1128,3 +1122,8 @@ static void amdgpu_uvd_note_usage(struct amdgpu_device *adev)
} }
} }
} }
void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
{
schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
}
...@@ -35,5 +35,7 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, ...@@ -35,5 +35,7 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
void amdgpu_uvd_free_handles(struct amdgpu_device *adev, void amdgpu_uvd_free_handles(struct amdgpu_device *adev,
struct drm_file *filp); struct drm_file *filp);
int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx); int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx);
void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring);
void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring);
#endif #endif
...@@ -797,6 +797,8 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = { ...@@ -797,6 +797,8 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
.test_ib = uvd_v4_2_ring_test_ib, .test_ib = uvd_v4_2_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib, .pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
}; };
static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev) static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev)
......
...@@ -848,6 +848,8 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { ...@@ -848,6 +848,8 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
.test_ib = uvd_v5_0_ring_test_ib, .test_ib = uvd_v5_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib, .pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
}; };
static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev) static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev)
......
...@@ -1019,6 +1019,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = { ...@@ -1019,6 +1019,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
.test_ib = uvd_v6_0_ring_test_ib, .test_ib = uvd_v6_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib, .pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
}; };
static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = { static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
...@@ -1036,6 +1038,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = { ...@@ -1036,6 +1038,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
.test_ib = uvd_v6_0_ring_test_ib, .test_ib = uvd_v6_0_ring_test_ib,
.insert_nop = amdgpu_ring_insert_nop, .insert_nop = amdgpu_ring_insert_nop,
.pad_ib = amdgpu_ring_generic_pad_ib, .pad_ib = amdgpu_ring_generic_pad_ib,
.begin_use = amdgpu_uvd_ring_begin_use,
.end_use = amdgpu_uvd_ring_end_use,
}; };
static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev) static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev)
......
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