Commit ca6ac684 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Mark up vGPU support for full-ppgtt

For compatibility reasons, we only care if the vGPU host provides
support for full-ppgtt. This is independent of the addressable memory
size, so remove the conflation of 48b from the capability name.

Based on a patch by Bob Paauwe.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-1-chris@chris-wilson.co.uk
parent 29b43ae2
...@@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) ...@@ -44,7 +44,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0; vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT; vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION; vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT; vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
......
...@@ -1527,7 +1527,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) ...@@ -1527,7 +1527,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
if (HAS_PPGTT(dev_priv)) { if (HAS_PPGTT(dev_priv)) {
if (intel_vgpu_active(dev_priv) && if (intel_vgpu_active(dev_priv) &&
!intel_vgpu_has_full_48bit_ppgtt(dev_priv)) { !intel_vgpu_has_full_ppgtt(dev_priv)) {
i915_report_error(dev_priv, i915_report_error(dev_priv,
"incompatible vGPU found, support for isolated ppGTT required\n"); "incompatible vGPU found, support for isolated ppGTT required\n");
return -ENXIO; return -ENXIO;
......
...@@ -52,7 +52,7 @@ enum vgt_g2v_type { ...@@ -52,7 +52,7 @@ enum vgt_g2v_type {
/* /*
* VGT capabilities type * VGT capabilities type
*/ */
#define VGT_CAPS_FULL_48BIT_PPGTT BIT(2) #define VGT_CAPS_FULL_PPGTT BIT(2)
#define VGT_CAPS_HWSP_EMULATION BIT(3) #define VGT_CAPS_HWSP_EMULATION BIT(3)
#define VGT_CAPS_HUGE_GTT BIT(4) #define VGT_CAPS_HUGE_GTT BIT(4)
......
...@@ -81,9 +81,9 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv) ...@@ -81,9 +81,9 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
} }
bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv) bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
{ {
return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT; return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
} }
struct _balloon_info_ { struct _balloon_info_ {
......
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
void i915_check_vgpu(struct drm_i915_private *dev_priv); void i915_check_vgpu(struct drm_i915_private *dev_priv);
bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv); bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
static inline bool static inline bool
intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv) intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
......
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