Commit e10241d8 authored by Li Yang's avatar Li Yang Committed by Kumar Gala

[POWERPC] 83xx: Add MPC837x USB platform support

Add chip specific and board specific initialization for MPC837x USB.
Signed-off-by: default avatarLi Yang <leoli@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 5761bc5d
...@@ -22,6 +22,56 @@ ...@@ -22,6 +22,56 @@
#include "mpc83xx.h" #include "mpc83xx.h"
#define BCSR12_USB_SER_MASK 0x8a
#define BCSR12_USB_SER_PIN 0x80
#define BCSR12_USB_SER_DEVICE 0x02
extern int mpc837x_usb_cfg(void);
static int mpc837xmds_usb_cfg(void)
{
struct device_node *np;
const void *phy_type, *mode;
void __iomem *bcsr_regs = NULL;
u8 bcsr12;
int ret;
ret = mpc837x_usb_cfg();
if (ret)
return ret;
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np) {
struct resource res;
of_address_to_resource(np, 0, &res);
bcsr_regs = ioremap(res.start, res.end - res.start + 1);
of_node_put(np);
}
if (!bcsr_regs)
return -1;
np = of_find_node_by_name(NULL, "usb");
if (!np)
return -ENODEV;
phy_type = of_get_property(np, "phy_type", NULL);
if (phy_type && !strcmp(phy_type, "ulpi")) {
clrbits8(bcsr_regs + 12, BCSR12_USB_SER_PIN);
} else if (phy_type && !strcmp(phy_type, "serial")) {
mode = of_get_property(np, "dr_mode", NULL);
bcsr12 = in_8(bcsr_regs + 12) & ~BCSR12_USB_SER_MASK;
bcsr12 |= BCSR12_USB_SER_PIN;
if (mode && !strcmp(mode, "peripheral"))
bcsr12 |= BCSR12_USB_SER_DEVICE;
out_8(bcsr_regs + 12, bcsr12);
} else {
printk(KERN_ERR "USB DR: unsupported PHY\n");
}
of_node_put(np);
iounmap(bcsr_regs);
return 0;
}
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -40,6 +90,7 @@ static void __init mpc837x_mds_setup_arch(void) ...@@ -40,6 +90,7 @@ static void __init mpc837x_mds_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
mpc83xx_add_bridge(np); mpc83xx_add_bridge(np);
#endif #endif
mpc837xmds_usb_cfg();
} }
static struct of_device_id mpc837x_ids[] = { static struct of_device_id mpc837x_ids[] = {
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#define MPC83XX_SCCR_USB_DRCM_11 0x00300000 #define MPC83XX_SCCR_USB_DRCM_11 0x00300000
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000 #define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000
#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
/* system i/o configuration register low */ /* system i/o configuration register low */
#define MPC83XX_SICRL_OFFS 0x114 #define MPC83XX_SICRL_OFFS 0x114
...@@ -22,6 +23,8 @@ ...@@ -22,6 +23,8 @@
#define MPC834X_SICRL_USB1 0x20000000 #define MPC834X_SICRL_USB1 0x20000000
#define MPC831X_SICRL_USB_MASK 0x00000c00 #define MPC831X_SICRL_USB_MASK 0x00000c00
#define MPC831X_SICRL_USB_ULPI 0x00000800 #define MPC831X_SICRL_USB_ULPI 0x00000800
#define MPC837X_SICRL_USB_MASK 0xf0000000
#define MPC837X_SICRL_USB_ULPI 0x50000000
/* system i/o configuration register high */ /* system i/o configuration register high */
#define MPC83XX_SICRH_OFFS 0x118 #define MPC83XX_SICRH_OFFS 0x118
......
...@@ -179,3 +179,43 @@ int mpc831x_usb_cfg(void) ...@@ -179,3 +179,43 @@ int mpc831x_usb_cfg(void)
return ret; return ret;
} }
#endif /* CONFIG_PPC_MPC831x */ #endif /* CONFIG_PPC_MPC831x */
#ifdef CONFIG_PPC_MPC837x
int mpc837x_usb_cfg(void)
{
void __iomem *immap;
struct device_node *np = NULL;
const void *prop;
int ret = 0;
np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr");
if (!np)
return -ENODEV;
prop = of_get_property(np, "phy_type", NULL);
if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {
printk(KERN_WARNING "837x USB PHY type not supported\n");
of_node_put(np);
return -EINVAL;
}
/* Map IMMR space for pin and clock settings */
immap = ioremap(get_immrbase(), 0x1000);
if (!immap) {
of_node_put(np);
return -ENOMEM;
}
/* Configure clock */
clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,
MPC837X_SCCR_USB_DRCM_11);
/* Configure pin mux for ULPI/serial */
clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,
MPC837X_SICRL_USB_ULPI);
iounmap(immap);
of_node_put(np);
return ret;
}
#endif /* CONFIG_PPC_MPC837x */
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