Commit e85dd04e authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Ulf Hansson

mmc: tmio: remove Renesas specific #ifdef

This patch adds new TMIO_MMC_HAVE_CTL_DMA_REG flag,
and remove Renesas specific #ifdef from tmio driver
Tested-by: default avatarNguyen Xuan Nui <nx-nui@jinso.co.jp>
Tested-by: default avatarHiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 81e888da
...@@ -235,6 +235,11 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) ...@@ -235,6 +235,11 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
*/ */
mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK; mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
/*
* All SDHI have DMA control register
*/
mmc_data->flags |= TMIO_MMC_HAVE_CTL_DMA_REG;
if (of_id && of_id->data) { if (of_id && of_id->data) {
const struct sh_mobile_sdhi_of_data *of_data = of_id->data; const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
mmc_data->flags |= of_data->tmio_flags; mmc_data->flags |= of_data->tmio_flags;
......
...@@ -28,10 +28,8 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) ...@@ -28,10 +28,8 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
if (!host->chan_tx || !host->chan_rx) if (!host->chan_tx || !host->chan_rx)
return; return;
#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE) if (host->pdata->flags & TMIO_MMC_HAVE_CTL_DMA_REG)
/* Switch DMA mode on or off - SuperH specific? */ sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
#endif
} }
void tmio_mmc_abort_dma(struct tmio_mmc_host *host) void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
......
...@@ -94,6 +94,11 @@ ...@@ -94,6 +94,11 @@
*/ */
#define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8) #define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8)
/*
* Some controllers have DMA enable/disable register
*/
#define TMIO_MMC_HAVE_CTL_DMA_REG (1 << 9)
int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state); void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
......
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