Commit ef0c5009 authored by Jian Shen's avatar Jian Shen Committed by David S. Miller

net: hns3: Fix misleading parameter name

The input parameter "dev" of hns3_irq_handle() is indeed
used as a tqp vector, it is misleadin.

The struct member "flag" is used to indicate ring type,
so rename it.
Signed-off-by: default avatarJian Shen <shenjian15@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c79301d8
...@@ -62,9 +62,9 @@ static const struct pci_device_id hns3_pci_tbl[] = { ...@@ -62,9 +62,9 @@ static const struct pci_device_id hns3_pci_tbl[] = {
}; };
MODULE_DEVICE_TABLE(pci, hns3_pci_tbl); MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
static irqreturn_t hns3_irq_handle(int irq, void *dev) static irqreturn_t hns3_irq_handle(int irq, void *vector)
{ {
struct hns3_enet_tqp_vector *tqp_vector = dev; struct hns3_enet_tqp_vector *tqp_vector = vector;
napi_schedule(&tqp_vector->napi); napi_schedule(&tqp_vector->napi);
......
...@@ -72,7 +72,7 @@ static int hclge_alloc_cmd_queue(struct hclge_dev *hdev, int ring_type) ...@@ -72,7 +72,7 @@ static int hclge_alloc_cmd_queue(struct hclge_dev *hdev, int ring_type)
(ring_type == HCLGE_TYPE_CSQ) ? &hw->cmq.csq : &hw->cmq.crq; (ring_type == HCLGE_TYPE_CSQ) ? &hw->cmq.csq : &hw->cmq.crq;
int ret; int ret;
ring->flag = ring_type; ring->ring_type = ring_type;
ring->dev = hdev; ring->dev = hdev;
ret = hclge_alloc_cmd_desc(ring); ret = hclge_alloc_cmd_desc(ring);
...@@ -111,7 +111,7 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring) ...@@ -111,7 +111,7 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring)
struct hclge_dev *hdev = ring->dev; struct hclge_dev *hdev = ring->dev;
struct hclge_hw *hw = &hdev->hw; struct hclge_hw *hw = &hdev->hw;
if (ring->flag == HCLGE_TYPE_CSQ) { if (ring->ring_type == HCLGE_TYPE_CSQ) {
hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_L_REG, hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_L_REG,
lower_32_bits(dma)); lower_32_bits(dma));
hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_H_REG, hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_H_REG,
......
...@@ -45,7 +45,7 @@ struct hclge_cmq_ring { ...@@ -45,7 +45,7 @@ struct hclge_cmq_ring {
u16 desc_num; u16 desc_num;
int next_to_use; int next_to_use;
int next_to_clean; int next_to_clean;
u8 flag; u8 ring_type; /* cmq ring type */
spinlock_t lock; /* Command queue lock */ spinlock_t lock; /* Command queue lock */
}; };
......
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