Commit f3eef645 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k: optimize register access functions

By checking for NR_CPUS, the compiler can optimize out register access
serialization code on non-SMP kernels
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 99ac8cd6
...@@ -556,7 +556,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) ...@@ -556,7 +556,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
return -EIO; return -EIO;
} }
if (ah->config.serialize_regmode == SER_REG_MODE_AUTO) { if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI || if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
((AR_SREV_9160(ah) || AR_SREV_9280(ah)) && ((AR_SREV_9160(ah) || AR_SREV_9280(ah)) &&
!ah->is_pciexpress)) { !ah->is_pciexpress)) {
......
...@@ -172,7 +172,7 @@ static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) ...@@ -172,7 +172,7 @@ static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
struct ath_softc *sc = (struct ath_softc *) common->priv; struct ath_softc *sc = (struct ath_softc *) common->priv;
if (ah->config.serialize_regmode == SER_REG_MODE_ON) { if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&sc->sc_serial_rw, flags); spin_lock_irqsave(&sc->sc_serial_rw, flags);
iowrite32(val, sc->mem + reg_offset); iowrite32(val, sc->mem + reg_offset);
...@@ -188,7 +188,7 @@ static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset) ...@@ -188,7 +188,7 @@ static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
struct ath_softc *sc = (struct ath_softc *) common->priv; struct ath_softc *sc = (struct ath_softc *) common->priv;
u32 val; u32 val;
if (ah->config.serialize_regmode == SER_REG_MODE_ON) { if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&sc->sc_serial_rw, flags); spin_lock_irqsave(&sc->sc_serial_rw, flags);
val = ioread32(sc->mem + reg_offset); val = ioread32(sc->mem + reg_offset);
...@@ -219,7 +219,7 @@ static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 cl ...@@ -219,7 +219,7 @@ static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 cl
unsigned long uninitialized_var(flags); unsigned long uninitialized_var(flags);
u32 val; u32 val;
if (ah->config.serialize_regmode == SER_REG_MODE_ON) { if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) {
spin_lock_irqsave(&sc->sc_serial_rw, flags); spin_lock_irqsave(&sc->sc_serial_rw, flags);
val = __ath9k_reg_rmw(sc, reg_offset, set, clr); val = __ath9k_reg_rmw(sc, reg_offset, set, clr);
spin_unlock_irqrestore(&sc->sc_serial_rw, flags); spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
......
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