Commit f98551ae authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter

drm/i915: Keep vblank interrupts enabled while enabling/disabling planes

Because of the upcoming vblank interrupt driven watermark update
mechanism we will have use for vblank interrupts during plane
enabling/disabling. So don't call drm_vblank_off() until planes
are off, and call drm_vblank_on() just before we start to enable
the planes.

v2: Pimp commit message (Paulo)
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1938e59a
...@@ -3883,6 +3883,8 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc) ...@@ -3883,6 +3883,8 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc)
int pipe = intel_crtc->pipe; int pipe = intel_crtc->pipe;
int plane = intel_crtc->plane; int plane = intel_crtc->plane;
drm_vblank_on(dev, pipe);
intel_enable_primary_hw_plane(dev_priv, plane, pipe); intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc); intel_enable_planes(crtc);
/* The fixup needs to happen before cursor is enabled */ /* The fixup needs to happen before cursor is enabled */
...@@ -3908,7 +3910,6 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc) ...@@ -3908,7 +3910,6 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc)
int plane = intel_crtc->plane; int plane = intel_crtc->plane;
intel_crtc_wait_for_pending_flips(crtc); intel_crtc_wait_for_pending_flips(crtc);
drm_crtc_vblank_off(crtc);
if (dev_priv->fbc.plane == plane) if (dev_priv->fbc.plane == plane)
intel_disable_fbc(dev); intel_disable_fbc(dev);
...@@ -3919,6 +3920,8 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc) ...@@ -3919,6 +3920,8 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, false); intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc); intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe); intel_disable_primary_hw_plane(dev_priv, plane, pipe);
drm_vblank_off(dev, pipe);
} }
static void ironlake_crtc_enable(struct drm_crtc *crtc) static void ironlake_crtc_enable(struct drm_crtc *crtc)
...@@ -3997,8 +4000,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) ...@@ -3997,8 +4000,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
cpt_verify_modeset(dev, intel_crtc->pipe); cpt_verify_modeset(dev, intel_crtc->pipe);
intel_crtc_enable_planes(crtc); intel_crtc_enable_planes(crtc);
drm_crtc_vblank_on(crtc);
} }
/* IPS only exists on ULT machines and is tied to pipe A. */ /* IPS only exists on ULT machines and is tied to pipe A. */
...@@ -4112,8 +4113,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) ...@@ -4112,8 +4113,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
* to change the workaround. */ * to change the workaround. */
haswell_mode_set_planes_workaround(intel_crtc); haswell_mode_set_planes_workaround(intel_crtc);
intel_crtc_enable_planes(crtc); intel_crtc_enable_planes(crtc);
drm_crtc_vblank_on(crtc);
} }
static void ironlake_pfit_disable(struct intel_crtc *crtc) static void ironlake_pfit_disable(struct intel_crtc *crtc)
...@@ -4623,8 +4622,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) ...@@ -4623,8 +4622,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_crtc_enable_planes(crtc); intel_crtc_enable_planes(crtc);
drm_crtc_vblank_on(crtc);
/* Underruns don't raise interrupts, so check manually. */ /* Underruns don't raise interrupts, so check manually. */
i9xx_check_fifo_underruns(dev); i9xx_check_fifo_underruns(dev);
} }
...@@ -4717,8 +4714,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) ...@@ -4717,8 +4714,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
if (IS_GEN2(dev)) if (IS_GEN2(dev))
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
drm_crtc_vblank_on(crtc);
/* Underruns don't raise interrupts, so check manually. */ /* Underruns don't raise interrupts, so check manually. */
i9xx_check_fifo_underruns(dev); i9xx_check_fifo_underruns(dev);
} }
......
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