1. 26 Sep, 2020 34 commits
  2. 23 Sep, 2020 6 commits
    • Greg Kroah-Hartman's avatar
    • Adam Borowski's avatar
      x86/defconfig: Enable CONFIG_USB_XHCI_HCD=y · c3bba4b2
      Adam Borowski authored
      commit 72a9c673 upstream.
      
      A spanking new machine I just got has all but one USB ports wired as 3.0.
      Booting defconfig resulted in no keyboard or mouse, which was pretty
      uncool.  Let's enable that -- USB3 is ubiquitous rather than an oddity.
      As 'y' not 'm' -- recovering from initrd problems needs a keyboard.
      
      Also add it to the 32-bit defconfig.
      Signed-off-by: default avatarAdam Borowski <kilobyte@angband.pl>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-usb@vger.kernel.org
      Link: http://lkml.kernel.org/r/20181009062803.4332-1-kilobyte@angband.plSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c3bba4b2
    • Alexey Kardashevskiy's avatar
      powerpc/dma: Fix dma_map_ops::get_required_mask · 349c5add
      Alexey Kardashevskiy authored
      commit 437ef802 upstream.
      
      There are 2 problems with it:
        1. "<" vs expected "<<"
        2. the shift number is an IOMMU page number mask, not an address
        mask as the IOMMU page shift is missing.
      
      This did not hit us before f1565c24 ("powerpc: use the generic
      dma_ops_bypass mode") because we had additional code to handle bypass
      mask so this chunk (almost?) never executed.However there were
      reports that aacraid does not work with "iommu=nobypass".
      
      After f1565c24, aacraid (and probably others which call
      dma_get_required_mask() before setting the mask) was unable to enable
      64bit DMA and fall back to using IOMMU which was known not to work,
      one of the problems is double free of an IOMMU page.
      
      This fixes DMA for aacraid, both with and without "iommu=nobypass" in
      the kernel command line. Verified with "stress-ng -d 4".
      
      Fixes: 6a5c7be5 ("powerpc: Override dma_get_required_mask by platform hook and ops")
      Cc: stable@vger.kernel.org # v3.2+
      Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      Link: https://lore.kernel.org/r/20200908015106.79661-1-aik@ozlabs.ruSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      349c5add
    • Quentin Perret's avatar
      ehci-hcd: Move include to keep CRC stable · ad81a334
      Quentin Perret authored
      commit 29231826 upstream.
      
      The CRC calculation done by genksyms is triggered when the parser hits
      EXPORT_SYMBOL*() macros. At this point, genksyms recursively expands the
      types of the function parameters, and uses that as the input for the CRC
      calculation. In the case of forward-declared structs, the type expands
      to 'UNKNOWN'. Following this, it appears that the result of the
      expansion of each type is cached somewhere, and seems to be re-used
      when/if the same type is seen again for another exported symbol in the
      same C file.
      
      Unfortunately, this can cause CRC 'stability' issues when a struct
      definition becomes visible in the middle of a C file. For example, let's
      assume code with the following pattern:
      
          struct foo;
      
          int bar(struct foo *arg)
          {
      	/* Do work ... */
          }
          EXPORT_SYMBOL_GPL(bar);
      
          /* This contains struct foo's definition */
          #include "foo.h"
      
          int baz(struct foo *arg)
          {
      	/* Do more work ... */
          }
          EXPORT_SYMBOL_GPL(baz);
      
      Here, baz's CRC will be computed using the expansion of struct foo that
      was cached after bar's CRC calculation ('UNKOWN' here). But if
      EXPORT_SYMBOL_GPL(bar) is removed from the file (because of e.g. symbol
      trimming using CONFIG_TRIM_UNUSED_KSYMS), struct foo will be expanded
      late, during baz's CRC calculation, which now has visibility over the
      full struct definition, hence resulting in a different CRC for baz.
      
      The proper fix for this certainly is in genksyms, but that will take me
      some time to get right. In the meantime, we have seen one occurrence of
      this in the ehci-hcd code which hits this problem because of the way it
      includes C files halfway through the code together with an unlucky mix
      of symbol trimming.
      
      In order to workaround this, move the include done in ehci-hub.c early
      in ehci-hcd.c, hence making sure the struct definitions are visible to
      the entire file. This improves CRC stability of the ehci-hcd exports
      even when symbol trimming is enabled.
      Acked-by: default avatarAlan Stern <stern@rowland.harvard.edu>
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: default avatarQuentin Perret <qperret@google.com>
      Link: https://lore.kernel.org/r/20200916171825.3228122-1-qperret@google.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      ad81a334
    • Arvind Sankar's avatar
      x86/boot/compressed: Disable relocation relaxation · e8a0dc81
      Arvind Sankar authored
      commit 09e43968 upstream.
      
      The x86-64 psABI [0] specifies special relocation types
      (R_X86_64_[REX_]GOTPCRELX) for indirection through the Global Offset
      Table, semantically equivalent to R_X86_64_GOTPCREL, which the linker
      can take advantage of for optimization (relaxation) at link time. This
      is supported by LLD and binutils versions 2.26 onwards.
      
      The compressed kernel is position-independent code, however, when using
      LLD or binutils versions before 2.27, it must be linked without the -pie
      option. In this case, the linker may optimize certain instructions into
      a non-position-independent form, by converting foo@GOTPCREL(%rip) to $foo.
      
      This potential issue has been present with LLD and binutils-2.26 for a
      long time, but it has never manifested itself before now:
      
      - LLD and binutils-2.26 only relax
      	movq	foo@GOTPCREL(%rip), %reg
        to
      	leaq	foo(%rip), %reg
        which is still position-independent, rather than
      	mov	$foo, %reg
        which is permitted by the psABI when -pie is not enabled.
      
      - GCC happens to only generate GOTPCREL relocations on mov instructions.
      
      - CLang does generate GOTPCREL relocations on non-mov instructions, but
        when building the compressed kernel, it uses its integrated assembler
        (due to the redefinition of KBUILD_CFLAGS dropping -no-integrated-as),
        which has so far defaulted to not generating the GOTPCRELX
        relocations.
      
      Nick Desaulniers reports [1,2]:
      
        "A recent change [3] to a default value of configuration variable
         (ENABLE_X86_RELAX_RELOCATIONS OFF -> ON) in LLVM now causes Clang's
         integrated assembler to emit R_X86_64_GOTPCRELX/R_X86_64_REX_GOTPCRELX
         relocations. LLD will relax instructions with these relocations based
         on whether the image is being linked as position independent or not.
         When not, then LLD will relax these instructions to use absolute
         addressing mode (R_RELAX_GOT_PC_NOPIC). This causes kernels built with
         Clang and linked with LLD to fail to boot."
      
      Patch series [4] is a solution to allow the compressed kernel to be
      linked with -pie unconditionally, but even if merged is unlikely to be
      backported. As a simple solution that can be applied to stable as well,
      prevent the assembler from generating the relaxed relocation types using
      the -mrelax-relocations=no option. For ease of backporting, do this
      unconditionally.
      
      [0] https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/linker-optimization.tex#L65
      [1] https://lore.kernel.org/lkml/20200807194100.3570838-1-ndesaulniers@google.com/
      [2] https://github.com/ClangBuiltLinux/linux/issues/1121
      [3] https://reviews.llvm.org/rGc41a18cf61790fc898dcda1055c3efbf442c14c0
      [4] https://lore.kernel.org/lkml/20200731202738.2577854-1-nivedita@alum.mit.edu/Reported-by: default avatarNick Desaulniers <ndesaulniers@google.com>
      Signed-off-by: default avatarArvind Sankar <nivedita@alum.mit.edu>
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      Tested-by: default avatarNick Desaulniers <ndesaulniers@google.com>
      Tested-by: default avatarSedat Dilek <sedat.dilek@gmail.com>
      Acked-by: default avatarArd Biesheuvel <ardb@kernel.org>
      Reviewed-by: default avatarNick Desaulniers <ndesaulniers@google.com>
      Cc: stable@vger.kernel.org
      Link: https://lore.kernel.org/r/20200812004308.1448603-1-nivedita@alum.mit.eduSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e8a0dc81
    • Tobias Diedrich's avatar
      serial: 8250_pci: Add Realtek 816a and 816b · bafdc39d
      Tobias Diedrich authored
      commit 3c5a87be upstream.
      
      These serial ports are exposed by the OOB-management-engine on
      RealManage-enabled network cards (e.g. AMD DASH enabled systems using
      Realtek cards).
      
      Because these have 3 BARs, they fail the "num_iomem <= 1" check in
      serial_pci_guess_board.
      
      I've manually checked the two IOMEM regions and BAR 2 doesn't seem to
      respond to reads, but BAR 4 seems to be an MMIO version of the IO ports
      (untested).
      
      With this change, the ports are detected:
      0000:02:00.1: ttyS0 at I/O 0x2200 (irq = 82, base_baud = 115200) is a 16550A
      0000:02:00.2: ttyS1 at I/O 0x2100 (irq = 55, base_baud = 115200) is a 16550A
      
      lspci output:
      02:00.1 0700: 10ec:816a (rev 0e) (prog-if 02 [16550])
              Subsystem: 17aa:5082
              Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
              Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort- <MAbort- >SERR- <PERR- INTx-
              Interrupt: pin B routed to IRQ 82
              IOMMU group: 11
              Region 0: I/O ports at 2200 [size=256]
              Region 2: Memory at fd715000 (64-bit, non-prefetchable) [size=4K]
              Region 4: Memory at fd704000 (64-bit, non-prefetchable) [size=16K]
              Capabilities: [40] Power Management version 3
                      Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                      Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
              Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
                      Address: 0000000000000000  Data: 0000
              Capabilities: [70] Express (v2) Endpoint, MSI 01
                      DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us
                              ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
                      DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                              RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
                              MaxPayload 128 bytes, MaxReadReq 512 bytes
                      DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr+ TransPend-
                      LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 <64us
                              ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
                      LnkCtl: ASPM L1 Enabled; RCB 64 bytes, Disabled- CommClk+
                              ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                      LnkSta: Speed 2.5GT/s (ok), Width x1 (ok)
                              TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                      DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
                               10BitTagComp- 10BitTagReq- OBFF Via message/WAKE#, ExtFmt- EETLPPrefix-
                               EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
                               FRS- TPHComp- ExtTPHComp-
                               AtomicOpsCap: 32bit- 64bit- 128bitCAS-
                      DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,
                               AtomicOpsCtl: ReqEn-
                      LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
                               EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
                               Retimer- 2Retimers- CrosslinkRes: unsupported
              Capabilities: [b0] MSI-X: Enable- Count=4 Masked-
                      Vector table: BAR=4 offset=00000000
                      PBA: BAR=4 offset=00000800
              Capabilities: [d0] Vital Product Data
                      Not readable
              Capabilities: [100 v2] Advanced Error Reporting
                      UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                      UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                      UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
                      CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
                      CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
                      AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
                              MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                      HeaderLog: 00000000 00000000 00000000 00000000
              Capabilities: [160 v1] Device Serial Number 00-00-00-00-00-00-00-00
              Capabilities: [170 v1] Latency Tolerance Reporting
                      Max snoop latency: 0ns
                      Max no snoop latency: 0ns
              Capabilities: [178 v1] L1 PM Substates
                      L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
                                PortCommonModeRestoreTime=150us PortTPowerOnTime=150us
                      L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
                                 T_CommonMode=0us LTR1.2_Threshold=0ns
                      L1SubCtl2: T_PwrOn=10us
      02:00.2 0700: 10ec:816b (rev 0e)
      [...same...]
      Signed-off-by: default avatarTobias Diedrich <tobiasdiedrich@gmail.com>
      Cc: stable <stable@vger.kernel.org>
      Link: https://lore.kernel.org/r/20200914173628.GA22508@yamamaya.is-a-geek.orgSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      bafdc39d