- 19 Feb, 2013 5 commits
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Gabor Juhos authored
Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4943/Signed-off-by:
John Crispin <blogic@openwrt.org>
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Gabor Juhos authored
The patch allows to see kernel messages on the QCA955X SoCs in early boot stage. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by:
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Gabor Juhos authored
The '.start' field of the IRQ resource assigned twice in ar934x_wmac_setup(). The second assignment must set the '.end' field. Fix it. Signed-off-by:
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Corey Minyard authored
/proc/vmcore wasn't showing up in kdump kernels. It turns that that for Octeon, the memory used by elfcorehdr wasn't being set aside properly and it was getting clobbered before /proc/vmcore could get it. So reserve the memory if it shows up in a memory area managed by the kernel. Signed-off-by:
Corey Minyard <cminyard@mvista.com> Acked-by:
David Daney <ddaney@caviumnetworks.com> Cc: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/4936/
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Corey Minyard authored
Kernel memory isn't necessarily added to the memory tables, so it wouldn't show up in /proc/iomem. This was breaking kdump, which requires these memory addresses to work correctly. Signed-off-by:
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- 17 Feb, 2013 35 commits
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Gabor Juhos authored
The current code uses static resources and static platform device instances for the possible USB controllers in the system. These static variables contains initial values which leads to data segment pollution. Remove the static variables and use dynamically allocated structures instead. Signed-off-by:
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Gabor Juhos authored
Use the ATH79_MISC_IRQ() macro instead. Signed-off-by:
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Gabor Juhos authored
Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by:
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Gabor Juhos authored
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Gabor Juhos authored
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Gabor Juhos authored
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Gabor Juhos authored
The command register of the PCI controller is not initialized correctly by the bootloader on some boards and this leads to non working PCI bus. Add code to initialize the command register from the Linux code to avoid this. Signed-off-by:
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Gabor Juhos authored
Change to the code to use per-controller IRQ base. This is needed for multiple PCI controller support. Signed-off-by:
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Gabor Juhos authored
Static resources become impractical when multiple PCI controllers are present. Move the resources into the platform device registration code and change the probe routine to get those from there platform device's resources. Signed-off-by:
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Gabor Juhos authored
The current code uses static variables to store the PCI controller specific data. This works if the system contains one PCI controller only, however it becomes impractical when multiple PCI controllers are present. Move the variables into a dynamically allocated controller specific structure, and use that instead of the static variables. Signed-off-by:
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Gabor Juhos authored
This is needed for multiple PCI bus support. Signed-off-by:
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Gabor Juhos authored
The pci_load_of_ranges function is only available if CONFIG_OF is selected. If the function is used without CONFIG_OF being enabled it will cause a build error. Add a dummy inline function to avoid this. Signed-off-by:
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Gabor Juhos authored
The IO and memory resources of a PCI controller might already have a parent resource set when they are passed to 'register_pci_controller'. If the parent resource is set, the request_resource call will fail due to resource conflict and the current code will not be able to register the PCI controller. Use the parent resource if it is available in the request_resource call to avoid the isssue. Signed-off-by:
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Gabor Juhos authored
The functions are unused now, so remove them. Signed-off-by:
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Gabor Juhos authored
The pci-ar71xx and pci-ar724x drivers were converted into platform drivers. Register the corresponding platform devices for the PCI controllers instead of using the ar7{1x,24}x_pcibios_init functions. Signed-off-by: -
Gabor Juhos authored
The constants will be used by a subsequent patch. Signed-off-by:
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Gabor Juhos authored
The patch converts the pci-ar71xx driver into a platform driver. This makes it possible to register the PCI controller as a plain platform device. Signed-off-by:
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Gabor Juhos authored
The patch converts the pci-ar724x driver into a platform driver. This makes it possible to register the PCI controller as a plain platform device. Signed-off-by:
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Gabor Juhos authored
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF mappings. Signed-off-by:
David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4900/
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Gabor Juhos authored
Add code to load a irq_domain for the MIPS IRQ controller from a devicetree file. Signed-off-by:
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John Crispin authored
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John Crispin authored
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John Crispin authored
Add the Kbuild symbols and Makefiles needed to actually build the ralink code from this series Signed-off-by:
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John Crispin authored
This adds the devicetree file that describes the rt305x evaluation kit. Signed-off-by:
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John Crispin authored
Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by:
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John Crispin authored
Add the code needed to make early printk work. Signed-off-by:
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John Crispin authored
Until there is a generic MIPS way of handing the DTB over from bootloader to kernel we rely on a built in devicetrees. The OF code also remaps those register ranges that we use global in our drivers. Signed-off-by:
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John Crispin authored
These SoCs have a limited number of fixed rate clocks. Add support for the clk and clkdev api. Signed-off-by:
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John Crispin authored
Add minimal code to handle commandlines. Signed-off-by:
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John Crispin authored
Resetting these SoCs requires no real magic. The code is straight forward. Signed-off-by:
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John Crispin authored
All of the Ralink Wifi SoC currently supported by this series share the same interrupt controller (INTC). Signed-off-by:
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John Crispin authored
Before we start adding the platform code we add the common include files. Signed-off-by:
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John Crispin authored
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Gabor Juhos authored
The current code uses multiple if statements for demultiplexing the different interrupt sources. Additionally, the MISC interrupt controller has 32 interrupt sources and the current code does not handles all of them. Get rid of the if statements and process all interrupt sources in a loop to fix these issues. Signed-off-by:
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Gabor Juhos authored
Make ath79_gpio_function_{en,dis}able to be wrappers around ath79_gpio_function_setup. Signed-off-by:
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