- 03 Apr, 2013 4 commits
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Laurent Pinchart authored
The target is to get rid of function GPIOs completely. To reach this, make function GPIOs support optional by skipping the function GPIO chip registration if no function GPIOS are defined in SoC data. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Laurent Pinchart authored
The board has 3 LEDs connected to GPIOs. Add a led-gpio device to support them. Signed-off-by:
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Laurent Pinchart authored
Register the GPIO pin range, and request and free GPIO pins using the pinctrl API. Signed-off-by:
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Magnus Damm authored
This patch is V3 of a GPIO driver for the R-Car series of SoCs from Renesas. This driver is designed to be reusable between multiple SoCs that share the same basic building block, but so far it has only been used on R-Car H1 (r8a7779). Each driver instance handles 32 GPIOs with individually maskable IRQs. The driver operates on a single I/O memory range and the 32 GPIOs are hooked up a single interrupt. In the case of R-Car H1 either external IRQ pins or GPIOs with interrupts can be used for on-board interupts. For external IRQs 4 pins are supported, and in the case of GPIO there are 202 GPIOS as 202 interrupts hooked up via 6 driver instances and to the GIC and the Cortex-A9 Quad. At this point this driver is interfacing as a regular platform device driver. In the future DT support will be submitted as an incremental feature patch. Signed-off-by:
Magnus Damm <damm@opensource.se> Reviewed-by:
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- 02 Apr, 2013 36 commits
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Laurent Pinchart authored
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by:
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Laurent Pinchart authored
Refactor the GPIO macro magic to use GPIO numbers directly instead of the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum entries from the mach/r8a7779.h header. Signed-off-by:
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Laurent Pinchart authored
All r8a7779 platforms use the pinctrl API to control functions. Function GPIOs are unused and unneeded, remove them. Signed-off-by:
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Laurent Pinchart authored
struct resource is defined in linux/ioport.h. Include it. Signed-off-by:
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Laurent Pinchart authored
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a return. When CONFIG_BUG isn't set the function will thus have no return value. Fix it. Signed-off-by:
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Simon Horman authored
Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c This merge is to provide r8a73a4 SoC files, which are added in the soc branch and depended on by r8a73a4 pfc-changes which are to be added to the pinmux branch.
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Takashi Yoshii authored
The r8a7790 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by:
Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by:
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Takashi Yoshii authored
The r8a73a4 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by:
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Magnus Damm authored
Add a platform device for the r8a7790 PFC. Signed-off-by:
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Magnus Damm authored
Add IRQC interrupt controller support to r8a7790 by hooking up a single IRQC instances to handle 4 external IRQ signals. The IRQC controller is tied to SPIs of the GIC. On r8a7790 the external IRQ pins routing is handled by the PFC which is excluded from this patch. Both platform devices and DT devices are added in this patch. The platform device versions are used to provide a static interrupt map configuration for board code written in C. Signed-off-by:
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Magnus Damm authored
Add SCIF serial port support to the r8a7790 SoC by adding platform devices for SCIFA0 -> SCIFA2 as well as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF1 together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by:
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Magnus Damm authored
Add initial support for the r8a7790 SoC including: - Single Cortex-A15 CPU Core - GIC - Architecture timer No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. Signed-off-by:
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Kuninori Morimoto authored
There is no reason each CPU's own function has to exist in common.h. r8a7779_xxx() go to r8a7779.h Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by:
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Kuninori Morimoto authored
There is no reason each CPU's own function has to exist in common.h. r8a7740_xxx() go to r8a7740.h Signed-off-by:
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Kuninori Morimoto authored
There is no reason each CPU's own function has to exist in common.h. sh73a0_xxx() go to sh73a0.h Signed-off-by:
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Kuninori Morimoto authored
There is no reason each CPU's own function has to exist in common.h. sh7372_xxx() go to sh7372.h Signed-off-by:
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Kuninori Morimoto authored
R-Car H1 has many clocks, and it is possible to read/use clock ratio of these clocks from FRQMRx as DIV4 clocks. But, these ratio are fixed value and these are decided by MD pin status. This means that we can use fixed ratio clock via MD pin status, instead of DIV4 clocks. This patch reads MD pin status, and sets PLLA clock (= root clock), and used fixed ratio clock for other clocks. It was tesed on marzen board. Signed-off-by:
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Kuninori Morimoto authored
Current clock-r8a7740 is using own implement for each divX clocks. This patch switches to use fixed ratio clock, and was tesed on armadillo board. Signed-off-by:
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Kuninori Morimoto authored
Current clock-r8a7740's DIV4/DIV6/MSTP implemented area and its comment are mismatching. This patch tidyup its comment/implementation area. Signed-off-by:
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Kuninori Morimoto authored
Current clock-sh73a0 is using own implement for each divX clocks. This patch switches to use fixed ratio clock, and was tesed on kzm9g board. Signed-off-by:
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Kuninori Morimoto authored
Current clock-sh7372 is using own implement for each divX clocks. This patch switches to use fixed ratio clock, and was tesed on mackerel board. Signed-off-by:
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Kuninori Morimoto authored
Renesas chip has many clocks inside, and some of them are using fixed ratio via parent clock. Current shmobile clock code is using own divX_recalc function and divX_clk_ops. This patch can reduce these code Signed-off-by:
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Kuninori Morimoto authored
DIV4_ZT* clocks are for debugging and trace bus clock. It is not necessary to control it from Linux/Software. Signed-off-by:
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Kuninori Morimoto authored
DIV4_ZT* clocks are for debugging and trace bus clock. It is not necessary to control it from Linux/Software. Signed-off-by:
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Guennadi Liakhovetski authored
Add a TWD clock on sh73a0 for the smp_twd driver to properly update the clock's frequency upon cpufreq events. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
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Bastian Hecht authored
With the added capabilty of the intc_irqpin driver to handle shared external IRQs, all prerequisites are fulfilled and we are ready to migrate completely to GIC. This includes the following steps: - Kconfig: select ARM_GIC and RENESAS_INTC_IRQPIN - intc-r8a7740: Throw out all legacy INTC code and init the GIC. We need to mask out all shared IRQs as it is needed by the shared intc_irqpin driver. - setup-r8a7740: Add 4 irqpin devices to handle external IRQs and update all IRQ numbers to point to the GIC SPI. - board-armadillo: Update all IRQ numbers to point to the GIC SPI. - pfc-r8a7740: Update all IRQ numbers of the GPIOs to point to the GIC SPI. Signed-off-by:
Bastian Hecht <hechtb+renesas@gmail.com> Acked-by:
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Kuninori Morimoto authored
You can get current thermal by > cat /sys/class/thermal/thermal_zone?/temp Signed-off-by:
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Magnus Damm authored
Modify mach-shmobile to only select PINCTRL in case of ARCH_WANT_OPTIONAL_GPIOLIB is set. This fixes a build error triggered when adding a new SoC lacking GPIO software support (ARCH_WANT_OPTIONAL_GPIOLIB=n): CC drivers/tty/vt/keyboard.o In file included from drivers/pinctrl/core.c:30:0: include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep': include/asm-generic/gpio.h:270:2: error: implicit declaration of function '__gpio_get_value' include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep': include/asm-generic/gpio.h:276:2: error: implicit declaration of function '__gpio_set_value' drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range': drivers/pinctrl/core.c:297:9: error: implicit declaration of function 'gpio_to_chip' drivers/pinctrl/core.c:297:27: warning: initialization makes pointer from integer without a cast drivers/pinctrl/core.c:304:45: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:26: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:39: error: dereferencing pointer to incomplete type make[2]: *** [drivers/pinctrl/core.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make[1]: *** Waiting for unfinished jobs.... LD drivers/sh/built-in.o Signed-off-by:
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Guennadi Liakhovetski authored
Add DT nodes for the 4 irqpin interrupt controllers on sh73a0. We add them to sh73a0.dtsi, which is also used by configurations, doing all their device instantiation from board the .c code. We rely on the fact, that such configurations don't instantiate devices from the device-tree. Signed-off-by:
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Kuninori Morimoto authored
Add SCIF serial port support to the r8a7778 SoC by adding platform devices together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by:
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Kuninori Morimoto authored
Add initial support for the R8A7778 R-Car M1A SoC. No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. It is based on v1.0 datasheet Signed-off-by:
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Guennadi Liakhovetski authored
To reconfigure clocks, controlled by FRQCRA and FRQCRB, a kick bit has to be set and to make sure the setting has taken effect, it has to be read back repeatedly until it is cleared by the hardware. This patch adds the waiting part, that was missing until now. Signed-off-by:
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Magnus Damm authored
Add a platform device for the r8a73a4 PFC. Signed-off-by:
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Magnus Damm authored
Add IRQC interrupt controller support to r8a73a4 by hooking up two IRQC instances to handle 58 external IRQ signals. There IRQC controllers are tied to SPIs of the GIC. On r8a73a4 exact IRQ pin routing is handled by the PFC which is excluded from this patch. Both platform devices and DT devices are added in this patch. The platform device versions are used to provide a static interrupt map configuration for board code written in C. Signed-off-by:
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Magnus Damm authored
V3 of SCIF serial port support for the r8a73a4 SoC. This is done by adding platform devices for SCIFA0 -> SCIFA1 as well as SCIFB0 -> SCIFB3 together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by:
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Magnus Damm authored
V3 of initial support for the r8a73a4 SoC including: - Single Cortex-A15 CPU Core - GIC - Architecture timer No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. Signed-off-by:
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