- 23 Mar, 2020 5 commits
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Dmitry Osipenko authored
Boot CPU0 always handles DMA interrupts and under some rare circumstances it could stuck in uninterruptible state for a significant time (like in a case of KASAN + NFS root). In this case sibling CPU, which waits for DMA transfer completion, will get a DMA transfer timeout. In order to handle this rare condition, interrupt status needs to be polled until interrupt is handled. Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20200319212321.3297-2-digetx@gmail.comSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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Dmitry Osipenko authored
The interrupt is already disabled while interrupt handler is running, and thus, there is no need to save/restore the IRQ flags within the spinlock. Signed-off-by:
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YueHaibing authored
When CONFIG_PM is disabled, gcc warning this: drivers/dma/tegra20-apb-dma.c:1587:12: warning: 'tegra_dma_runtime_resume' defined but not used [-Wunused-function] drivers/dma/tegra20-apb-dma.c:1578:12: warning: 'tegra_dma_runtime_suspend' defined but not used [-Wunused-function] Make it as __maybe_unused to fix the warnings, also remove unneeded function declarations. Fixes: ec8a1586 ("dma: tegra: add dmaengine based dma driver") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200320071337.59756-1-yuehaibing@huawei.comSigned-off-by:
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Colin Ian King authored
There are a couple of spelling mistakes in dev_err error messages. Fix them. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200316091653.110984-1-colin.king@canonical.comSigned-off-by:
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Zhenfang Wang authored
On new Spreadtrum platforms, when the CPU enters idle, it will close the DMA controllers' clock to save power if the DMA controller is not busy. Moreover the DMA controller's busy signal depends on the DMA enable flag and the request pending flag. When DMA controller starts to transfer data, which means we already set the DMA enable flag, but now we should also set the request pending flag, in case the DMA clock will be closed accidentally if the CPU can not detect the DMA controller's busy signal. Signed-off-by:
Zhenfang Wang <zhenfang.wang@unisoc.com> Signed-off-by:
Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/02adbe4364ec436ec2c5bc8fd2386bab98edd884.1584019223.git.baolin.wang7@gmail.comSigned-off-by:
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- 11 Mar, 2020 7 commits
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Takashi Iwai authored
Since snprintf() returns the would-be-output size instead of the actual output size, the succeeding calls may go beyond the given buffer limit. Fix it by replacing with scnprintf(). Signed-off-by:
Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20200311071606.4485-1-tiwai@suse.deSigned-off-by:
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Dave Jiang authored
The global token_limit is not tied to group tokens_reserved and tokens_allowed parameters. Remove the check in order to allow independent configuration. Fixes: c52ca478 ("dmaengine: idxd: add configuration component of driver") Reported-by:
Yixin Zhang <yixin.zhang@intel.com> Signed-off-by:
Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/158386266911.11066.7545764533072221536.stgit@djiang5-desk3.ch.intel.comSigned-off-by:
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Dave Jiang authored
The traffic class are set to -1 at initialization until the user programs them. If the user choose not to, the driver will program appropriate defaults. The driver also needs to update the shadowed copies of the values after doing the programming. Fixes: c52ca478 ("dmaengine: idxd: add configuration component of driver") Reported-by:
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Tony Luck authored
We don't need a special structure just for batch descriptors. The layout matches the general form for other descriptors. Merge the desc_list_addr field into the union of other aliases for the the third quadword in the structure. Create a union to alias "xfer_size" with "desc_count". Signed-off-by:
Tony Luck <tony.luck@intel.com> Acked-by:
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Peter Ujfalusi authored
Create a placeholder directory for each registered DMA device. DMA drivers can use the dmaengine_get_debugfs_root() call to get their debugfs root and can populate with custom files to aim debugging. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200306142839.17910-4-peter.ujfalusi@ti.comSigned-off-by:
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Peter Ujfalusi authored
With the custom dbg_summary_show the driver can show useful information about the used channels. dma0 (285c0000.dma-controller): number of channels: 24 dma1 (31150000.dma-controller): number of channels: 84 dma1chan0 | 2b00000.mcasp:tx (MEM_TO_DEV, tchan16 [0x1010 -> 0xc400], PDMA[ ACC32 BURST ], TR mode) dma1chan1 | 2b00000.mcasp:rx (DEV_TO_MEM, rchan16 [0x4400 -> 0x9010], PDMA[ ACC32 BURST ], TR mode) dma1chan2 | 2ba0000.mcasp:tx (MEM_TO_DEV, tchan17 [0x1011 -> 0xc507], PDMA[ ACC32 BURST ], TR mode) dma1chan3 | 2ba0000.mcasp:rx (DEV_TO_MEM, rchan17 [0x4507 -> 0x9011], PDMA[ ACC32 BURST ], TR mode) dma1chan4 | in-use (MEM_TO_MEM, chan0 pair [0x1000 -> 0x9000], PSI-L Native, TR mode) dma1chan5 | in-use (MEM_TO_MEM, chan1 pair [0x1001 -> 0x9001], PSI-L Native, TR mode) dma1chan6 | in-use (MEM_TO_MEM, chan4 pair [0x1004 -> 0x9004], PSI-L Native, TR mode) dma1chan7 | in-use (MEM_TO_MEM, chan5 pair [0x1005 -> 0x9005], PSI-L Native, TR mode) Signed-off-by:
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Peter Ujfalusi authored
Via the /sys/kernel/debug/dmaengine/summary users can get information about the DMA devices and the used channels. Example output on am654-evm with audio using two channels and after running dmatest on 4 channels: dma0 (285c0000.dma-controller): number of channels: 96 dma1 (31150000.dma-controller): number of channels: 267 dma1chan0 | 2b00000.mcasp:tx dma1chan1 | 2b00000.mcasp:rx dma1chan2 | in-use dma1chan3 | in-use dma1chan4 | in-use dma1chan5 | in-use For slave channels we can show the device and the channel name a given channel is requested. For non slave devices the only information we know is that the channel is in use. DMA drivers can implement the optional dbg_summary_show callback to provide controller specific information instead of the generic one. It is easy to extend the generic dmaengine_summary_show() to print additional information about the used channels. I have taken the idea from gpiolib and clk subsystems. Signed-off-by:
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- 06 Mar, 2020 1 commit
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YueHaibing authored
drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c: In function dpaa2_qdma_shutdown: drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c:795:28: warning: variable dpaa2_qdma set but not used [-Wunused-but-set-variable] commit 3e0ca3c3 ("dmaengine: fsl-dpaa2-qdma: Adding shutdown hook") involved this, remove it. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
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- 02 Mar, 2020 12 commits
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Colin Ian King authored
Currently there is a dereference of the null pointer m_ddev. This appears to be a typo on the pointer, I believe s_ddev should be used instead. Fix this by using the correct pointer. Fixes: eb0249d5 ("dmaengine: ti: edma: Support for interleaved mem to mem transfer") Signed-off-by:
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Peng Ma authored
We need to ensure DMA engine could be stopped in order for kexec to start the next kernel. So add the shutdown operation support. Signed-off-by:
Peng Ma <peng.ma@nxp.com> Link: https://lore.kernel.org/r/20200227042841.18358-1-peng.ma@nxp.comSigned-off-by:
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Kunihiko Hayashi authored
This adds external DMA controller driver implemented in Socionext UniPhier SoCs. This driver supports DMA_MEMCPY and DMA_SLAVE modes. Since this driver does not support the the way to transfer size unaligned to burst width, 'src_maxburst' or 'dst_maxburst' of dma_slave_config must be 1 to transfer arbitrary size. If transfer size is unaligned to burst size, the transfer isn't started and the driver displays an error message. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1582271550-3403-3-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by:
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Kunihiko Hayashi authored
Add devicetree binding documentation for external DMA controller implemented on Socionext UniPhier SOCs. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1582271550-3403-2-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by:
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Peter Ujfalusi authored
The DT for virtualized hosts have dma-cells == 2 where the second parameter is the ATYPE for the channel. In case of dma-cells == 1 we can configure the ATYPE as 0 (reset value). The ATYPE defined for j721e are: 0: pointers are physical addresses (no translation) 1: pointers are intermediate addresses (PVU) 2: pointers are virtual addresses (SMMU) Signed-off-by:
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Peter Ujfalusi authored
In UDMA each channel can use different ATYPE value which tells UDMA how the addresses in the descriptors should be treated: 0: pointers are physical addresses (no translation) 1: pointers are intermediate addresses (PVU) 2: pointers are virtual addresses (SMMU) When virtualized environment is used then the dma binding should use additional cell to configure the desired ATYPE for the channel. Signed-off-by:
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Andy Shevchenko authored
There is no need to have 'break;' statement in the default case followed by return certain string literal when all other cases have returned the string literals. So, refactor it accordingly. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
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Andy Shevchenko authored
It's obvious that 'else' keyword is redundant in the code like if (foo) return bar; else if (baz) ... Drop it for good. Signed-off-by:
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Andy Shevchenko authored
When negative condition is in use we may decrease indentation level and make the main part of logic better visible. Signed-off-by:
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Andy Shevchenko authored
There is no need to have branch and temporary variable in the function. Simple convert it to be a set of bit and arithmetic operations. Signed-off-by:
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Dave Jiang authored
There are some capabilities for the device that are interesting to user apps that are interacting directly with the device. Expose gencap register in sysfs to allow that information. Signed-off-by:
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Dave Jiang authored
The returned result from the check_vma() function in the cdev ->mmap() call needs to be handled. Add the check and returning error. Fixes: 42d279f9 ("dmaengine: idxd: add char driver to expose submission portal to userland") Reported-by:
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- 25 Feb, 2020 15 commits
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Dmitry Osipenko authored
Technically it is possible that DMA could be misconfigured in a way that cyclic DMA transfer is processed slower than it takes to complete the cycle and in this case the DMA is getting aborted with a not very informative message about the problem, let's improve it. Suggested-by:
Jon Hunter <jonathanh@nvidia.com> Signed-off-by:
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Dmitry Osipenko authored
Remove unused function argument from handle_continuous_head_request(). Signed-off-by:
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Dmitry Osipenko authored
There is nothing arch-specific in the driver's code, so let's enable compile-testing for the driver. Signed-off-by:
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Dmitry Osipenko authored
Tegra APB DMA driver is an Open Firmware driver, so it uses OF alias naming scheme which overrides MODULE_ALIAS, meaning that MODULE_ALIAS does nothing and could be removed safely. Signed-off-by:
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Dmitry Osipenko authored
The driver's removal was fixed by a recent commit and module load/unload is working well now, tested on Tegra30. Signed-off-by:
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Dmitry Osipenko authored
The DMA controller shall be released on driver's removal. Signed-off-by:
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Dmitry Osipenko authored
It is enough to check whether hardware is busy on suspend and to reset it across of suspend-resume because: 1. Channel's configuration is fully re-programmed on each DMA transfer anyways. 2. Context save-restore of an active channel won't end up well without pausing transfer prior to the context's saving, but note that every channel shall be idling at the time of suspend, so save-restore is not needed at all. 3. The only case where context save-restore may be useful is when channel is in a paused state during suspend. But channel's pausing could be supported only on Tegra114+ and this functionality wasn't implemented by the driver for years now because there is no need for it in upstream kernel. Signed-off-by: -
Dmitry Osipenko authored
It's a bit impractical to enable hardware's clock at the time of DMA channel's allocation because most of DMA client drivers allocate DMA channel at the time of the driver's probing, and thus, DMA clock is kept always-enabled in practice, defeating the whole purpose of runtime PM. Signed-off-by:
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Dmitry Osipenko authored
There are few place in the code which check whether pending_sg_req list is empty despite of the check already being done. Let's remove the duplicated checks to keep code clean. Signed-off-by:
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Dmitry Osipenko authored
The runtime PM is always available on all Tegra SoCs since the commit 40b2bb1b ("ARM: tegra: enforce PM requirement"), so there is no need to handle the case of unavailable RPM in the code anymore. Signed-off-by:
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Dmitry Osipenko authored
There is no need to re-initialize the already initialized variables. The tdc->config_init=false after driver's probe and after channel's freeing, so there is no need to re-initialize it on the channel's allocation. Signed-off-by:
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Dmitry Osipenko authored
This patch fixes few dozens of coding style problems reported by checkpatch and prettifies code where makes sense. Signed-off-by:
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Dmitry Osipenko authored
Use resource-managed variant of request_irq for brevity. Signed-off-by:
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Dmitry Osipenko authored
Use devm_platform_ioremap_resource to keep code cleaner a tad. Signed-off-by:
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Dmitry Osipenko authored
There is no need to kill tasklet when driver's probe fails because tasklet can't be scheduled at this time. It is also cleaner to kill tasklet on channel's freeing rather than to kill it on driver's removal, otherwise tasklet could perform a dummy execution after channel's releasing, which isn't very nice. Signed-off-by:
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