1. 06 Aug, 2010 9 commits
  2. 05 Aug, 2010 14 commits
  3. 04 Aug, 2010 9 commits
  4. 02 Aug, 2010 8 commits
    • Rohit Hassan Sathyanarayan's avatar
      mtd: onenand:fix for page addr calculation based on device type · 42b0aab1
      Rohit Hassan Sathyanarayan authored
      Sending the patch for page address calculation based on device type. This resolves the
      OneNAND DDP device read problem as pointed by Enric.
      http://lists.infradead.org/pipermail/linux-mtd/2010-July/030920.htmlSigned-off-by: default avatarRohit HS <rohit.hs@samsung.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      42b0aab1
    • Brian Norris's avatar
      mtd: nand: update nand_default_block_markbad() · 02ed70bb
      Brian Norris authored
      This is an update that depends on the previous patches I sent.
      
      We can now write to all the appropriate BB marker locations (i.e.
      pages 1 AND 2, bytes 1 AND 6) with nand_default_block_markbad() if
      necessary, according to the flags marked in chip->options.
      
      Note that I removed the line:
      	ofs += mtd->oobsize;
      Unless I am wrong, this line was completely unnecessary in the
      first place.
      Signed-off-by: default avatarBrian Norris <norris@broadcom.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      02ed70bb
    • Dong, Chuanxiao's avatar
      mtd: denali.h: fixed checkpatch errors · 6ea9ad24
      Dong, Chuanxiao authored
      Fix all checkpatch.pl complaints.
      
      Artem: tweaked a little and fix tab indentations, so now this is not
             only about checkpatch, but also about making indentations look
             sane.
      Signed-off-by: default avatarChuanxiao Dong <chuanxiao.dong@intel.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      6ea9ad24
    • Sudhakar Rajashekhara's avatar
      mtd: nand: davinci: correct 4-bit error correction · 1c3275b6
      Sudhakar Rajashekhara authored
      On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the
      4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and
      before waiting for the NAND Flash status register to be equal to 1, 2 or
      3, we have to wait till the ECC HW goes to correction state.  Without this
      wait, ECC correction calculations will not be proper.
      
      This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365
      EVMs.
      Signed-off-by: default avatarSudhakar Rajashekhara <sudhakar.raj@ti.com>
      Acked-by: default avatarSneha Narnakaje <nsnehaprabha@ti.com>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      1c3275b6
    • Brian Norris's avatar
      mtd: nand: more BB Detection refactoring and dynamic scan options · 58373ff0
      Brian Norris authored
      This is a revision to PATCH 2/2 that I sent. Link:
      http://lists.infradead.org/pipermail/linux-mtd/2010-July/030911.html
      
      Added new flag for scanning of both bytes 1 and 6 of the OOB for
      a BB marker (instead of simply one or the other).
      
      The "check_pattern" and "check_short_pattern" functions were updated
      to include support for scanning the two different locations in the OOB.
      
      In order to handle increases in variety of necessary scanning patterns,
      I implemented dynamic memory allocation of nand_bbt_descr structs
      in new function 'nand_create_default_bbt_descr()'. This replaces
      some increasingly-unwieldy, statically-declared descriptors. It can
      replace several more (e.g. "flashbased" structs). However, I do not
      test the flashbased options personally.
      
      How this was tested:
      
      I referenced 30+ data sheets (covering 100+ parts), and I tested a
      selection of 10 different chips to varying degrees. Particularly, I
      tested the creation of bad-block descriptors and basic BB scanning on
      three parts:
      
      ST NAND04GW3B2D, 2K page
      ST NAND128W3A, 512B page
      Samsung K9F1G08U0A, 2K page
      
      To test these, I wrote some fake bad block markers to the flash (in OOB
      bytes 1, 6, and elsewhere) to see if the scanning routine would detect
      them properly. However, this method was somewhat limited because the
      driver I am using has some bugs in its OOB write functionality.
      Signed-off-by: default avatarBrian Norris <norris@broadcom.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      58373ff0
    • Brian Norris's avatar
      mtd: nand: refactor BB marker detection · c7b28e25
      Brian Norris authored
      Some level of support for various scanning locations was already built in,
      but this required clean-up. First, BB marker location cannot be determined
      _only_ by the page size. Instead, I implemented some heuristic detection
      based on data sheets from various manufacturers (all found in
      nand_base.c:nand_get_flash_type()).
      
      Second, once these options were identified, they were not handled properly
      by nand_bbt.c:nand_default_bbt(). I updated the static nand_bbt_desc structs
      to reflect the need for more combinations of detection. The memory allocation
      here probably needs to be done dynamically in the very near future (see next
      patches).
      Signed-off-by: default avatarBrian Norris <norris@broadcom.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      c7b28e25
    • Conke Hu's avatar
      mtd: s3c nand: parsing command-line partitions prior to set->partitions · 78d10224
      Conke Hu authored
      Current driver prevents command-line partitions from being parsed when built-in
      partitions are defined in s3c2410_nand_set object, but it is not desirable in some
      cases. This patch tries to parse commad-line partitions prior to the built-in.
      Signed-off-by: default avatarConke Hu <conke@maxwit.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      78d10224
    • Eric Bénard's avatar
      mtd: mxc_nand: fix unbalanced enable for IRQ · 6a8cfcfb
      Eric Bénard authored
      * preset should be done before sending the reset command
      
      * without this, I get the following error on an i.MX35 :
      [    0.900000] ------------[ cut here ]------------
      [    0.900000] WARNING: at kernel/irq/manage.c:290 __enable_irq+0x4c/0x88()
      [    0.900000] Unbalanced enable for IRQ 33
      [    0.900000] Modules linked in:
      [    0.900000] [<c002ffb8>] (unwind_backtrace+0x0/0xf0) from [<c02f7d0c>] (dump_stack+0x18/0x1c)
      [    0.900000] [<c02f7d0c>] (dump_stack+0x18/0x1c) from [<c0049a44>] (warn_slowpath_common+0x54/0x6c)
      [    0.900000] [<c0049a44>] (warn_slowpath_common+0x54/0x6c) from [<c0049b00>] (warn_slowpath_fmt+0x38/0x40)
      [    0.900000] [<c0049b00>] (warn_slowpath_fmt+0x38/0x40) from [<c008f65c>] (__enable_irq+0x4c/0x88)
      [    0.900000] [<c008f65c>] (__enable_irq+0x4c/0x88) from [<c008fca0>] (enable_irq+0x54/0x98)
      [    0.900000] [<c008fca0>] (enable_irq+0x54/0x98) from [<c021e618>] (wait_op_done+0x40/0x134)
      [    0.900000] [<c021e618>] (wait_op_done+0x40/0x134) from [<c021e808>] (send_cmd+0x30/0x38)
      [    0.900000] [<c021e808>] (send_cmd+0x30/0x38) from [<c021eb8c>] (mxc_nand_command+0x26c/0x328)
      [    0.900000] [<c021eb8c>] (mxc_nand_command+0x26c/0x328) from [<c021aa60>] (nand_scan_ident+0x188/0x6c0)
      [    0.900000] [<c021aa60>] (nand_scan_ident+0x188/0x6c0) from [<c001a9cc>] (mxcnd_probe+0x2b8/0x3d0)
      [    0.900000] [<c001a9cc>] (mxcnd_probe+0x2b8/0x3d0) from [<c01f9e88>] (platform_drv_probe+0x20/0x24)
      [    0.900000] [<c01f9e88>] (platform_drv_probe+0x20/0x24) from [<c01f8c38>] (driver_probe_device+0xb0/0x164)
      [    0.900000] [<c01f8c38>] (driver_probe_device+0xb0/0x164) from [<c01f8d54>] (__driver_attach+0x68/0x8c)
      [    0.900000] [<c01f8d54>] (__driver_attach+0x68/0x8c) from [<c01f8348>] (bus_for_each_dev+0x50/0x84)
      [    0.900000] [<c01f8348>] (bus_for_each_dev+0x50/0x84) from [<c01f8a9c>] (driver_attach+0x20/0x28)
      [    0.900000] [<c01f8a9c>] (driver_attach+0x20/0x28) from [<c01f7c00>] (bus_add_driver+0x144/0x2dc)
      [    0.900000] [<c01f7c00>] (bus_add_driver+0x144/0x2dc) from [<c01f906c>] (driver_register+0xb0/0x13c)
      [    0.900000] [<c01f906c>] (driver_register+0xb0/0x13c) from [<c01fa13c>] (platform_driver_register+0x4c/0x60)
      [    0.900000] [<c01fa13c>] (platform_driver_register+0x4c/0x60) from [<c01fa170>] (platform_driver_probe+0x20/0xa0)
      [    0.900000] [<c01fa170>] (platform_driver_probe+0x20/0xa0) from [<c001a708>] (mxc_nd_init+0x18/0x24)
      [    0.900000] [<c001a708>] (mxc_nd_init+0x18/0x24) from [<c002938c>] (do_one_initcall+0x64/0x1bc)
      [    0.900000] [<c002938c>] (do_one_initcall+0x64/0x1bc) from [<c00084c4>] (kernel_init+0xe8/0x1ac)
      [    0.900000] [<c00084c4>] (kernel_init+0xe8/0x1ac) from [<c002aee8>] (kernel_thread_exit+0x0/0x8)
      [    0.900000] ---[ end trace 8bf72ac6ba089a19 ]---
      [    1.140000] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron NAND 256MiB 3,3V 8-bit)
      Signed-off-by: default avatarEric Bénard <eric@eukrea.com>
      Signed-off-by: default avatarArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      6a8cfcfb