/* * Device Tree Source for the r8a7796 SoC * * Copyright (C) 2016 Renesas Electronics Corp. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #include <dt-bindings/clock/r8a7796-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/r8a7796-sysc.h> #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 / { compatible = "renesas,r8a7796"; #address-cells = <2>; #size-cells = <2>; aliases { i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; i2c6 = &i2c6; i2c7 = &i2c_dvfs; }; psci { compatible = "arm,psci-1.0", "arm,psci-0.2"; method = "smc"; }; cpus { #address-cells = <1>; #size-cells = <0>; a57_0: cpu@0 { compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_1: cpu@1 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a53_0: cpu@100 { compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x100>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_1: cpu@101 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x101>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_2: cpu@102 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x102>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA53_CPU2>; next-level-cache = <&L2_CA53>; enable-method = "psci"; }; a53_3: cpu@103 { compatible = "arm,cortex-a53","arm,armv8"; reg = <0x103>; device_type = "cpu"; power-domains = <&sysc R8A7796_PD_CA53_CPU3>; next-level-cache = <&L2_CA53>; enable-method = "psci"; }; L2_CA57: cache-controller-0 { compatible = "cache"; power-domains = <&sysc R8A7796_PD_CA57_SCU>; cache-unified; cache-level = <2>; }; L2_CA53: cache-controller-1 { compatible = "cache"; power-domains = <&sysc R8A7796_PD_CA53_SCU>; cache-unified; cache-level = <2>; }; }; extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; extalr_clk: extalr { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; }; /* * The external audio clocks are configured as 0 Hz fixed frequency * clocks by default. * Boards that provide audio clocks should override them. */ audio_clk_a: audio_clk_a { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; audio_clk_b: audio_clk_b { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; audio_clk_c: audio_clk_c { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; /* External CAN clock - to be overridden by boards that provide it */ can_clk: can { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; /* External SCIF clock - to be overridden by boards that provide it */ scif_clk: scif { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; /* External PCIe clock - can be overridden by the board */ pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; soc { compatible = "simple-bus"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; ranges; gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x0 0xf1010000 0 0x1000>, <0x0 0xf1020000 0 0x20000>, <0x0 0xf1040000 0 0x20000>, <0x0 0xf1060000 0 0x20000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; clocks = <&cpg CPG_MOD 408>; clock-names = "clk"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 408>; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; }; wdt0: watchdog@e6020000 { compatible = "renesas,r8a7796-wdt", "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 402>; status = "disabled"; }; gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6050000 0 0x50>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 16>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 912>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 912>; }; gpio1: gpio@e6051000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6051000 0 0x50>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 911>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 911>; }; gpio2: gpio@e6052000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6052000 0 0x50>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 15>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 910>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 910>; }; gpio3: gpio@e6053000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6053000 0 0x50>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 16>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 909>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 909>; }; gpio4: gpio@e6054000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6054000 0 0x50>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 18>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 908>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 908>; }; gpio5: gpio@e6055000 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6055000 0 0x50>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 26>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 907>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 907>; }; gpio6: gpio@e6055400 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6055400 0 0x50>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 192 32>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 906>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 906>; }; gpio7: gpio@e6055800 { compatible = "renesas,gpio-r8a7796", "renesas,rcar-gen3-gpio"; reg = <0 0xe6055800 0 0x50>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 224 4>; #interrupt-cells = <2>; interrupt-controller; clocks = <&cpg CPG_MOD 905>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 905>; }; pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7796"; reg = <0 0xe6060000 0 0x50c>; }; pmu_a57 { compatible = "arm,cortex-a57-pmu"; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&a57_0>, <&a57_1>; }; pmu_a53 { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; }; ipmmu_vi0: mmu@febd0000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xfebd0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 9>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_vc0: mmu@fe6b0000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xfe6b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 8>; power-domains = <&sysc R8A7796_PD_A3VC>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_pv0: mmu@fd800000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xfd800000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 5>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_pv1: mmu@fd950000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xfd950000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 6>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_ir: mmu@ff8b0000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xff8b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 3>; power-domains = <&sysc R8A7796_PD_A3IR>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_hc: mmu@e6570000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xe6570000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 2>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_rt: mmu@ffc80000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xffc80000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 7>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_mp: mmu@ec670000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xec670000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 4>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_ds0: mmu@e6740000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xe6740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 0>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_ds1: mmu@e7740000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xe7740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 1>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; ipmmu_mm: mmu@e67b0000 { compatible = "renesas,ipmmu-r8a7796"; reg = <0 0xe67b0000 0 0x1000>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; #iommu-cells = <1>; status = "disabled"; }; cpg: clock-controller@e6150000 { compatible = "renesas,r8a7796-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; clocks = <&extal_clk>, <&extalr_clk>; clock-names = "extal", "extalr"; #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; }; rst: reset-controller@e6160000 { compatible = "renesas,r8a7796-rst"; reg = <0 0xe6160000 0 0x0200>; }; prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; }; sysc: system-controller@e6180000 { compatible = "renesas,r8a7796-sysc"; reg = <0 0xe6180000 0 0x0400>; #power-domain-cells = <1>; }; intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 407>; }; i2c_dvfs: i2c@e60b0000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,iic-r8a7796", "renesas,rcar-gen3-iic", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x425>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 926>; dmas = <&dmac0 0x11>, <&dmac0 0x10>; dma-names = "tx", "rx"; status = "disabled"; }; pwm0: pwm@e6e30000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e30000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm1: pwm@e6e31000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e31000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm2: pwm@e6e32000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e32000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm3: pwm@e6e33000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e33000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm4: pwm@e6e34000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e34000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm5: pwm@e6e35000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e35000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; pwm6: pwm@e6e36000 { compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; reg = <0 0xe6e36000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; resets = <&cpg 523>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; i2c0: i2c@e6500000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe6500000 0 0x40>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 931>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 931>; dmas = <&dmac1 0x91>, <&dmac1 0x90>, <&dmac2 0x91>, <&dmac2 0x90>; dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; i2c1: i2c@e6508000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 930>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 930>; dmas = <&dmac1 0x93>, <&dmac1 0x92>, <&dmac2 0x93>, <&dmac2 0x92>; dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; i2c2: i2c@e6510000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe6510000 0 0x40>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 929>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 929>; dmas = <&dmac1 0x95>, <&dmac1 0x94>, <&dmac2 0x95>, <&dmac2 0x94>; dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; i2c3: i2c@e66d0000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe66d0000 0 0x40>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 928>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 928>; dmas = <&dmac0 0x97>, <&dmac0 0x96>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; i2c4: i2c@e66d8000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe66d8000 0 0x40>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 927>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 927>; dmas = <&dmac0 0x99>, <&dmac0 0x98>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; i2c5: i2c@e66e0000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe66e0000 0 0x40>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 919>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 919>; dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; i2c6: i2c@e66e8000 { #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7796", "renesas,rcar-gen3-i2c"; reg = <0 0xe66e8000 0 0x40>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 918>; dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; can0: can@e6c30000 { compatible = "renesas,can-r8a7796", "renesas,rcar-gen3-can"; reg = <0 0xe6c30000 0 0x1000>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7796_CLK_CANFD>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 916>; status = "disabled"; }; can1: can@e6c38000 { compatible = "renesas,can-r8a7796", "renesas,rcar-gen3-can"; reg = <0 0xe6c38000 0 0x1000>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7796_CLK_CANFD>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 915>; status = "disabled"; }; canfd: can@e66c0000 { compatible = "renesas,r8a7796-canfd", "renesas,rcar-gen3-canfd"; reg = <0 0xe66c0000 0 0x8000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 914>, <&cpg CPG_CORE R8A7796_CLK_CANFD>, <&can_clk>; clock-names = "fck", "canfd", "can_clk"; assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 914>; status = "disabled"; channel0 { status = "disabled"; }; channel1 { status = "disabled"; }; }; drif00: rif@e6f40000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f40000 0 0x64>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 515>; clock-names = "fck"; dmas = <&dmac1 0x20>, <&dmac2 0x20>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 515>; renesas,bonding = <&drif01>; status = "disabled"; }; drif01: rif@e6f50000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f50000 0 0x64>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 514>; clock-names = "fck"; dmas = <&dmac1 0x22>, <&dmac2 0x22>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 514>; renesas,bonding = <&drif00>; status = "disabled"; }; drif10: rif@e6f60000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f60000 0 0x64>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 513>; clock-names = "fck"; dmas = <&dmac1 0x24>, <&dmac2 0x24>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 513>; renesas,bonding = <&drif11>; status = "disabled"; }; drif11: rif@e6f70000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f70000 0 0x64>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 512>; clock-names = "fck"; dmas = <&dmac1 0x26>, <&dmac2 0x26>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 512>; renesas,bonding = <&drif10>; status = "disabled"; }; drif20: rif@e6f80000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f80000 0 0x64>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 511>; clock-names = "fck"; dmas = <&dmac1 0x28>, <&dmac2 0x28>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 511>; renesas,bonding = <&drif21>; status = "disabled"; }; drif21: rif@e6f90000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6f90000 0 0x64>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 510>; clock-names = "fck"; dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 510>; renesas,bonding = <&drif20>; status = "disabled"; }; drif30: rif@e6fa0000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6fa0000 0 0x64>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 509>; clock-names = "fck"; dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 509>; renesas,bonding = <&drif31>; status = "disabled"; }; drif31: rif@e6fb0000 { compatible = "renesas,r8a7796-drif", "renesas,rcar-gen3-drif"; reg = <0 0xe6fb0000 0 0x64>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 508>; clock-names = "fck"; dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; dma-names = "rx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 508>; renesas,bonding = <&drif30>; status = "disabled"; }; avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a7796", "renesas,etheravb-rcar-gen3"; reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii-txid"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a7796", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6540000 0 0x60>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 520>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>, <&dmac2 0x31>, <&dmac2 0x30>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 520>; status = "disabled"; }; hscif1: serial@e6550000 { compatible = "renesas,hscif-r8a7796", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6550000 0 0x60>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 519>; status = "disabled"; }; hscif2: serial@e6560000 { compatible = "renesas,hscif-r8a7796", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe6560000 0 0x60>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 518>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>, <&dmac2 0x35>, <&dmac2 0x34>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 518>; status = "disabled"; }; hscif3: serial@e66a0000 { compatible = "renesas,hscif-r8a7796", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe66a0000 0 0x60>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 517>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x37>, <&dmac0 0x36>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 517>; status = "disabled"; }; hscif4: serial@e66b0000 { compatible = "renesas,hscif-r8a7796", "renesas,rcar-gen3-hscif", "renesas,hscif"; reg = <0 0xe66b0000 0 0x60>; interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 516>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x38>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 516>; status = "disabled"; }; scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 207>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>, <&dmac2 0x51>, <&dmac2 0x50>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 207>; status = "disabled"; }; scif1: serial@e6e68000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 206>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>, <&dmac2 0x53>, <&dmac2 0x52>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 206>; status = "disabled"; }; scif2: serial@e6e88000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6e88000 0 64>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 310>; status = "disabled"; }; scif3: serial@e6c50000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6c50000 0 64>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 204>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x57>, <&dmac0 0x56>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 204>; status = "disabled"; }; scif4: serial@e6c40000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6c40000 0 64>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 203>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x59>, <&dmac0 0x58>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 203>; status = "disabled"; }; scif5: serial@e6f30000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; reg = <0 0xe6f30000 0 64>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 202>, <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, <&dmac2 0x5b>, <&dmac2 0x5a>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 202>; status = "disabled"; }; msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a7796", "renesas,rcar-gen3-msiof"; reg = <0 0xe6e90000 0 0x0064>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 211>; dmas = <&dmac1 0x41>, <&dmac1 0x40>, <&dmac2 0x41>, <&dmac2 0x40>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 211>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof1: spi@e6ea0000 { compatible = "renesas,msiof-r8a7796", "renesas,rcar-gen3-msiof"; reg = <0 0xe6ea0000 0 0x0064>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 210>; dmas = <&dmac1 0x43>, <&dmac1 0x42>, <&dmac2 0x43>, <&dmac2 0x42>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 210>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof2: spi@e6c00000 { compatible = "renesas,msiof-r8a7796", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c00000 0 0x0064>; interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 209>; dmas = <&dmac0 0x45>, <&dmac0 0x44>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 209>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; msiof3: spi@e6c10000 { compatible = "renesas,msiof-r8a7796", "renesas,rcar-gen3-msiof"; reg = <0 0xe6c10000 0 0x0064>; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 208>; dmas = <&dmac0 0x47>, <&dmac0 0x46>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 208>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 219>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 219>; #dma-cells = <1>; dma-channels = <16>; iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; }; dmac1: dma-controller@e7300000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 218>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <16>; iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; }; dmac2: dma-controller@e7310000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 217>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <16>; iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 502>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 502>; #dma-cells = <1>; dma-channels = <16>; iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, <&ipmmu_mp 2>, <&ipmmu_mp 3>, <&ipmmu_mp 4>, <&ipmmu_mp 5>, <&ipmmu_mp 6>, <&ipmmu_mp 7>, <&ipmmu_mp 8>, <&ipmmu_mp 9>, <&ipmmu_mp 10>, <&ipmmu_mp 11>, <&ipmmu_mp 12>, <&ipmmu_mp 13>, <&ipmmu_mp 14>, <&ipmmu_mp 15>; }; audma1: dma-controller@ec720000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15"; clocks = <&cpg CPG_MOD 501>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 501>; #dma-cells = <1>; dma-channels = <16>; iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, <&ipmmu_mp 18>, <&ipmmu_mp 19>, <&ipmmu_mp 20>, <&ipmmu_mp 21>, <&ipmmu_mp 22>, <&ipmmu_mp 23>, <&ipmmu_mp 24>, <&ipmmu_mp 25>, <&ipmmu_mp 26>, <&ipmmu_mp 27>, <&ipmmu_mp 28>, <&ipmmu_mp 29>, <&ipmmu_mp 30>, <&ipmmu_mp 31>; }; usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7796-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 330>; #dma-cells = <1>; dma-channels = <2>; }; usb_dmac1: dma-controller@e65b0000 { compatible = "renesas,r8a7796-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 331>; #dma-cells = <1>; dma-channels = <2>; }; hsusb: usb@e6590000 { compatible = "renesas,usbhs-r8a7796", "renesas,rcar-gen3-usbhs"; reg = <0 0xe6590000 0 0x100>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 704>; dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; phys = <&usb2_phy0>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 704>; status = "disabled"; }; xhci0: usb@ee000000 { compatible = "renesas,xhci-r8a7796", "renesas,rcar-gen3-xhci"; reg = <0 0xee000000 0 0xc00>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 328>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 328>; status = "disabled"; }; usb3_peri0: usb@ee020000 { compatible = "renesas,r8a7796-usb3-peri", "renesas,rcar-gen3-usb3-peri"; reg = <0 0xee020000 0 0x400>; interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 328>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 328>; status = "disabled"; }; ohci0: usb@ee080000 { compatible = "generic-ohci"; reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 703>; status = "disabled"; }; ehci0: usb@ee080100 { compatible = "generic-ehci"; reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>; phys = <&usb2_phy0>; phy-names = "usb"; companion= <&ohci0>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 703>; status = "disabled"; }; usb2_phy0: usb-phy@ee080200 { compatible = "renesas,usb2-phy-r8a7796", "renesas,rcar-gen3-usb2-phy"; reg = <0 0xee080200 0 0x700>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 703>; #phy-cells = <0>; status = "disabled"; }; ohci1: usb@ee0a0000 { compatible = "generic-ohci"; reg = <0 0xee0a0000 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 702>; status = "disabled"; }; ehci1: usb@ee0a0100 { compatible = "generic-ehci"; reg = <0 0xee0a0100 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; phys = <&usb2_phy1>; phy-names = "usb"; companion= <&ohci1>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 702>; status = "disabled"; }; usb2_phy1: usb-phy@ee0a0200 { compatible = "renesas,usb2-phy-r8a7796", "renesas,rcar-gen3-usb2-phy"; reg = <0 0xee0a0200 0 0x700>; clocks = <&cpg CPG_MOD 702>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 702>; #phy-cells = <0>; status = "disabled"; }; sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7796", "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 314>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 314>; status = "disabled"; }; sdhi1: sd@ee120000 { compatible = "renesas,sdhi-r8a7796", "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 313>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 313>; status = "disabled"; }; sdhi2: sd@ee140000 { compatible = "renesas,sdhi-r8a7796", "renesas,rcar-gen3-sdhi"; reg = <0 0xee140000 0 0x2000>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 312>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 312>; status = "disabled"; }; sdhi3: sd@ee160000 { compatible = "renesas,sdhi-r8a7796", "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 311>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 311>; status = "disabled"; }; tsc: thermal@e6198000 { compatible = "renesas,r8a7796-thermal"; reg = <0 0xe6198000 0 0x68>, <0 0xe61a0000 0 0x5c>, <0 0xe61a8000 0 0x5c>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 522>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 522>; #thermal-sensor-cells = <1>; status = "okay"; }; thermal-zones { sensor_thermal1: sensor-thermal1 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; trips { sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <2000>; type = "critical"; }; }; }; sensor_thermal2: sensor-thermal2 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; trips { sensor2_crit: sensor2-crit { temperature = <120000>; hysteresis = <2000>; type = "critical"; }; }; }; sensor_thermal3: sensor-thermal3 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; trips { sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <2000>; type = "critical"; }; }; }; }; rcar_sound: sound@ec500000 { /* * #sound-dai-cells is required * * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; */ /* * #clock-cells is required for audio_clkout0/1/2/3 * * clkout : #clock-cells = <0>; <&rcar_sound>; * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; */ compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ <0 0xec541000 0 0x280>, /* SSI */ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; clocks = <&cpg CPG_MOD 1005>, <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&cpg CPG_CORE R8A7796_CLK_S0D4>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", "src.9", "src.8", "src.7", "src.6", "src.5", "src.4", "src.3", "src.2", "src.1", "src.0", "mix.1", "mix.0", "ctu.1", "ctu.0", "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 1005>, <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, <&cpg 1014>, <&cpg 1015>; reset-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; status = "disabled"; rcar_sound,dvc { dvc0: dvc-0 { dmas = <&audma1 0xbc>; dma-names = "tx"; }; dvc1: dvc-1 { dmas = <&audma1 0xbe>; dma-names = "tx"; }; }; rcar_sound,mix { mix0: mix-0 { }; mix1: mix-1 { }; }; rcar_sound,ctu { ctu00: ctu-0 { }; ctu01: ctu-1 { }; ctu02: ctu-2 { }; ctu03: ctu-3 { }; ctu10: ctu-4 { }; ctu11: ctu-5 { }; ctu12: ctu-6 { }; ctu13: ctu-7 { }; }; rcar_sound,src { src0: src-0 { interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x85>, <&audma1 0x9a>; dma-names = "rx", "tx"; }; src1: src-1 { interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x87>, <&audma1 0x9c>; dma-names = "rx", "tx"; }; src2: src-2 { interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x89>, <&audma1 0x9e>; dma-names = "rx", "tx"; }; src3: src-3 { interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x8b>, <&audma1 0xa0>; dma-names = "rx", "tx"; }; src4: src-4 { interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x8d>, <&audma1 0xb0>; dma-names = "rx", "tx"; }; src5: src-5 { interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x8f>, <&audma1 0xb2>; dma-names = "rx", "tx"; }; src6: src-6 { interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x91>, <&audma1 0xb4>; dma-names = "rx", "tx"; }; src7: src-7 { interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x93>, <&audma1 0xb6>; dma-names = "rx", "tx"; }; src8: src-8 { interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x95>, <&audma1 0xb8>; dma-names = "rx", "tx"; }; src9: src-9 { interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x97>, <&audma1 0xba>; dma-names = "rx", "tx"; }; }; rcar_sound,ssi { ssi0: ssi-0 { interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi1: ssi-1 { interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi2: ssi-2 { interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi3: ssi-3 { interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi4: ssi-4 { interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi5: ssi-5 { interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi6: ssi-6 { interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi7: ssi-7 { interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi8: ssi-8 { interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi9: ssi-9 { interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; dma-names = "rx", "tx", "rxu", "txu"; }; }; }; pciec0: pcie@fe000000 { /* placeholder */ }; pciec1: pcie@ee800000 { /* placeholder */ }; fdp1@fe940000 { compatible = "renesas,fdp1"; reg = <0 0xfe940000 0 0x2400>; interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 119>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 119>; renesas,fcp = <&fcpf0>; }; fcpf0: fcp@fe950000 { compatible = "renesas,fcpf"; reg = <0 0xfe950000 0 0x200>; clocks = <&cpg CPG_MOD 615>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 615>; }; vspb: vsp@fe960000 { compatible = "renesas,vsp2"; reg = <0 0xfe960000 0 0x8000>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 626>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 626>; renesas,fcp = <&fcpvb0>; }; fcpvb0: fcp@fe96f000 { compatible = "renesas,fcpv"; reg = <0 0xfe96f000 0 0x200>; clocks = <&cpg CPG_MOD 607>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 607>; }; vspi0: vsp@fe9a0000 { compatible = "renesas,vsp2"; reg = <0 0xfe9a0000 0 0x8000>; interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 631>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 631>; renesas,fcp = <&fcpvi0>; }; fcpvi0: fcp@fe9af000 { compatible = "renesas,fcpv"; reg = <0 0xfe9af000 0 0x200>; clocks = <&cpg CPG_MOD 611>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 611>; iommus = <&ipmmu_vc0 19>; }; vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x4000>; interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 623>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 623>; renesas,fcp = <&fcpvd0>; }; fcpvd0: fcp@fea27000 { compatible = "renesas,fcpv"; reg = <0 0xfea27000 0 0x200>; clocks = <&cpg CPG_MOD 603>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 603>; iommus = <&ipmmu_vi0 8>; }; vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; reg = <0 0xfea28000 0 0x4000>; interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 622>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 622>; renesas,fcp = <&fcpvd1>; }; fcpvd1: fcp@fea2f000 { compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>; clocks = <&cpg CPG_MOD 602>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 602>; iommus = <&ipmmu_vi0 9>; }; vspd2: vsp@fea30000 { compatible = "renesas,vsp2"; reg = <0 0xfea30000 0 0x4000>; interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 621>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 621>; renesas,fcp = <&fcpvd2>; }; fcpvd2: fcp@fea37000 { compatible = "renesas,fcpv"; reg = <0 0xfea37000 0 0x200>; clocks = <&cpg CPG_MOD 601>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 601>; iommus = <&ipmmu_vi0 10>; }; hdmi0: hdmi@fead0000 { compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; reg = <0 0xfead0000 0 0x10000>; interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; clock-names = "iahb", "isfr"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 729>; status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dw_hdmi0_in: endpoint { remote-endpoint = <&du_out_hdmi0>; }; }; port@1 { reg = <1>; }; }; }; du: display@feb00000 { compatible = "renesas,du-r8a7796"; reg = <0 0xfeb00000 0 0x70000>, <0 0xfeb90000 0 0x14>; reg-names = "du", "lvds.0"; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, <&cpg CPG_MOD 727>; clock-names = "du.0", "du.1", "du.2", "lvds.0"; status = "disabled"; vsps = <&vspd0 &vspd1 &vspd2>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; du_out_rgb: endpoint { }; }; port@1 { reg = <1>; du_out_hdmi0: endpoint { remote-endpoint = <&dw_hdmi0_in>; }; }; port@2 { reg = <2>; du_out_lvds0: endpoint { }; }; }; }; imr-lx4@fe860000 { compatible = "renesas,r8a7796-imr-lx4", "renesas,imr-lx4"; reg = <0 0xfe860000 0 0x2000>; interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 823>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 823>; }; imr-lx4@fe870000 { compatible = "renesas,r8a7796-imr-lx4", "renesas,imr-lx4"; reg = <0 0xfe870000 0 0x2000>; interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 822>; power-domains = <&sysc R8A7796_PD_A3VC>; resets = <&cpg 822>; }; }; };