| Rule Violations |
Count |
| Clearance Constraint (Gap=0.5mm) (InNamedPolygon('L5_NotNet') OR InNamedPolygon('L6_NotNet') OR InNamedPolygon('L4_NotNet') OR InNamedPolygon('L7_NotNet')OR InNamedPolygon('L3_NotNet')),(All) |
0 |
| Clearance Constraint (Gap=0.2mm) (InNamedPolygon('L4-+12V-2')OR InNamedPolygon('L4-+12V')OR InNamedPolygon('BOTTOM+12V')OR InNamedPolygon('BOTTOM+12V-1')),(All) |
0 |
| Clearance Constraint (Gap=0.1mm) (InNetClass('DiffPairNetClass')),(All) |
0 |
| Clearance Constraint (Gap=0.12mm) (All),(IsVia) |
0 |
| Clearance Constraint (Gap=0.6mm) (InNetClass('50OhmsL1toL2')),(InPolygon) |
0 |
| Clearance Constraint (Gap=0.21mm) (InNetClass('50OhmsL8toL5')),(InPolygon) |
0 |
| Clearance Constraint (Gap=0.5mm) (InNetClass('50OhmsL8tol4')),(InPolygon) |
0 |
| Clearance Constraint (Gap=0.12mm) (InNetClass('DiffPairNetClass100Ohms_1_2')),(InPolygon) |
0 |
| Clearance Constraint (Gap=0.22mm) (InPolyGon),(All) |
0 |
| Clearance Constraint (Gap=0.1mm) (All),(All) |
0 |
| Width Constraint (Min=0.1mm) (Max=10mm) (Preferred=0.254mm) (All) |
0 |
| Matched Net Lengths(Tolerance=0.3mm) (InNetClass('POENetClass1')) |
0 |
| Matched Net Lengths(Tolerance=0.5mm) (InNetClass('POENetClass2')) |
0 |
| Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) |
0 |
| Short-Circuit Constraint (Allowed=No) (All),(All) |
0 |
| Un-Routed Net Constraint ( (All) ) |
0 |
| Hole Size Constraint (Min=0.02mm) (Max=3.5mm) (All) |
0 |
| Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) |
0 |
| Hole To Hole Clearance (Gap=0.25mm) (All),(All) |
0 |
| Minimum Solder Mask Sliver (Gap=0.05mm) (All),(All) |
0 |
| Silk To Solder Mask (Clearance=0.2mm) (Disabled)(IsPad),(All) |
0 |
| Silk to Silk (Clearance=0.2mm) (Disabled)(All),(All) |
0 |
| Net Antennae (Tolerance=0mm) (Disabled)(All) |
0 |
| Total |
0 |
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