cmd/objdump: updates from golang.org/x/arch/ppc64/ppc64asm

Update the ppc64x disassembly code for use by objdump
from golang.org/x/arch/ppc64/ppc64asm commit fcea5ea.
Enable the objdump testcase for external linking on ppc64le
make a minor fix to the expected output.

Fixes #17447

Change-Id: I769cc7f8bfade594690a476dfe77ab33677ac03b
Reviewed-on: https://go-review.googlesource.com/32015
Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>

src/cmd/objdump/objdump_test.go

@@ -54,7 +54,7 @@ var ppcNeed = []string{
 	"fmthello.go:6",
 	"TEXT main.main(SB)",
 	"BR main.main(SB)",
-	"BL fmt.Println(SB)",
+	"CALL fmt.Println(SB)",
 	"RET",
 }
 
@@ -143,7 +143,7 @@ func TestDisasmExtld(t *testing.T) {
 		t.Skipf("skipping on %s", runtime.GOOS)
 	}
 	switch runtime.GOARCH {
-	case "ppc64", "ppc64le":
+	case "ppc64":
 		t.Skipf("skipping on %s, no support for external linking, issue 9038", runtime.GOARCH)
 	case "arm64":
 		t.Skipf("skipping on %s, issue 10106", runtime.GOARCH)

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go

@@ -52,6 +52,8 @@ func (a argField) Parse(i uint32) Arg {
 		return F0 + Reg(a.BitFields.Parse(i))
 	case TypeVecReg:
 		return V0 + Reg(a.BitFields.Parse(i))
+	case TypeVecSReg:
+		return VS0 + Reg(a.BitFields.Parse(i))
 	case TypeSpReg:
 		return SpReg(a.BitFields.Parse(i))
 	case TypeImmSigned:
@@ -78,6 +80,7 @@ const (
 	TypeCondRegField         // conditional register field (0-7)
 	TypeFPReg                // floating point register
 	TypeVecReg               // vector register
+	TypeVecSReg              // VSX register
 	TypeSpReg                // special register (depends on Op)
 	TypeImmSigned            // signed immediate
 	TypeImmUnsigned          // unsigned immediate/flag/mask, this is the catch-all type
@@ -101,6 +104,8 @@ func (t ArgType) String() string {
 		return "FPReg"
 	case TypeVecReg:
 		return "VecReg"
+	case TypeVecSReg:
+		return "VecSReg"
 	case TypeSpReg:
 		return "SpReg"
 	case TypeImmSigned:

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ext_test.go

@@ -176,7 +176,7 @@ func testExtDis(
 	t.Logf("%d test cases, %d expected mismatches, %d failures; %.0f cases/second", totalTests, totalSkips, totalErrors, float64(totalTests)/time.Since(start).Seconds())
 
 	if err := <-errc; err != nil {
-		t.Fatal("external disassembler: %v", err)
+		t.Fatalf("external disassembler: %v", err)
 	}
 
 }

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/inst.go

@@ -156,38 +156,70 @@ const (
 	V29
 	V30
 	V31
-	V32
-	V33
-	V34
-	V35
-	V36
-	V37
-	V38
-	V39
-	V40
-	V41
-	V42
-	V43
-	V44
-	V45
-	V46
-	V47
-	V48
-	V49
-	V50
-	V51
-	V52
-	V53
-	V54
-	V55
-	V56
-	V57
-	V58
-	V59
-	V60
-	V61
-	V62
-	V63
+	VS0
+	VS1
+	VS2
+	VS3
+	VS4
+	VS5
+	VS6
+	VS7
+	VS8
+	VS9
+	VS10
+	VS11
+	VS12
+	VS13
+	VS14
+	VS15
+	VS16
+	VS17
+	VS18
+	VS19
+	VS20
+	VS21
+	VS22
+	VS23
+	VS24
+	VS25
+	VS26
+	VS27
+	VS28
+	VS29
+	VS30
+	VS31
+	VS32
+	VS33
+	VS34
+	VS35
+	VS36
+	VS37
+	VS38
+	VS39
+	VS40
+	VS41
+	VS42
+	VS43
+	VS44
+	VS45
+	VS46
+	VS47
+	VS48
+	VS49
+	VS50
+	VS51
+	VS52
+	VS53
+	VS54
+	VS55
+	VS56
+	VS57
+	VS58
+	VS59
+	VS60
+	VS61
+	VS62
+	VS63
 )
 
 func (Reg) IsArg() {}
@@ -197,10 +229,12 @@ func (r Reg) String() string {
 		return fmt.Sprintf("r%d", int(r-R0))
 	case F0 <= r && r <= F31:
 		return fmt.Sprintf("f%d", int(r-F0))
-	case V0 <= r && r <= V63:
+	case V0 <= r && r <= V31:
 		return fmt.Sprintf("v%d", int(r-V0))
+	case VS0 <= r && r <= VS63:
+		return fmt.Sprintf("vs%d", int(r-VS0))
 	default:
-		return fmt.Sprint("Reg(%d)", int(r))
+		return fmt.Sprintf("Reg(%d)", int(r))
 	}
 }
 

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/objdump_test.go

@@ -12,7 +12,10 @@ import (
 
 func TestObjdumpPowerTestdata(t *testing.T) { testObjdump(t, testdataCases(t)) }
 func TestObjdumpPowerManual(t *testing.T)   { testObjdump(t, hexCases(t, objdumpManualTests)) }
-func TestObjdumpPowerRandom(t *testing.T)   { testObjdump(t, randomCases(t)) }
+
+// Disable this for now since generating all possible bit combinations within a word
+// generates lots of ppc64x instructions not possible with golang so not worth supporting..
+//func TestObjdumpPowerRandom(t *testing.T)   { testObjdump(t, randomCases(t)) }
 
 // objdumpManualTests holds test cases that will be run by TestObjdumpARMManual.
 // If you are debugging a few cases that turned up in a longer run, it can be useful

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/objdumpext_test.go

@@ -19,7 +19,7 @@ import (
 	"testing"
 )
 
-const objdumpPath = "/usr/local/bin/powerpc64-unknown-linux-gnu-objdump"
+const objdumpPath = "/usr/bin/objdump"
 
 func testObjdump(t *testing.T, generate func(func([]byte))) {
 	if testing.Short() {

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

@@ -148,16 +148,25 @@ var revCondMap = map[string]string{
 
 // plan9OpMap maps an Op to its Plan 9 mnemonics, if different than its GNU mnemonics.
 var plan9OpMap = map[Op]string{
+	LWARX: "LWAR", STWCX_: "STWCCC",
+	LDARX: "LDAR", STDCX_: "STDCCC",
+	LHARX: "LHAR", STHCX_: "STHCCC",
+	LBARX: "LBAR", STBCX_: "STBCCC",
+	ADDI: "ADD",
+	ADD_: "ADDCC",
 	LBZ:  "MOVBZ", STB: "MOVB",
 	LBZU: "MOVBZU", STBU: "MOVBU", // TODO(minux): indexed forms are not handled
 	LHZ: "MOVHZ", LHA: "MOVH", STH: "MOVH",
 	LHZU: "MOVHZU", STHU: "MOVHU",
+	LI:  "MOVD",
+	LIS: "ADDIS",
 	LWZ: "MOVWZ", LWA: "MOVW", STW: "MOVW",
 	LWZU: "MOVWZU", STWU: "MOVWU",
 	LD: "MOVD", STD: "MOVD",
 	LDU: "MOVDU", STDU: "MOVDU",
-	MTSPR: "MOV", MFSPR: "MOV", // the width is ambiguous for SPRs
+	MTSPR: "MOVD", MFSPR: "MOVD", // the width is ambiguous for SPRs
 	B:     "BR",
+	BL:    "CALL",
 	CMPLD: "CMPU", CMPLW: "CMPWU",
 	CMPD: "CMP", CMPW: "CMPW",
 }

src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/testdata/decode.txt

@@ -13,7 +13,7 @@ c61bb730|	gnu	lfsu f16,-18640(r27)
 a9a912c1|	gnu	lha r13,4801(r9)
 ebb24fd1|	gnu	ldu r29,20432(r18)
 b1ce0612|	gnu	sth r14,1554(r14)
-f3d74322|	gnu	xvcvdpuxws v30,v40
+f3c04322|	gnu	xvcvdpuxws vs30,vs40
 945c62a2|	gnu	stwu r2,25250(r28)
 9c8156e3|	gnu	stbu r4,22243(r1)
 f91b9c7a|	gnu	stq r8,-25480(r27)