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Commit 8fb63581 authored by Josh Bleecher Snyder's avatar Josh Bleecher Snyder
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[dev.ssa] cmd/compile: don't generate zero values for ssa ops 

Shorter code, easier to read, no pointless empty slices.

Change-Id: Id410364b4f6924b5665188af3373a5e914117c38
Reviewed-on: https://go-review.googlesource.com/12480Reviewed-by: default avatarKeith Randall <khr@golang.org>
parent ac1935b3
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Inline Side-by-side
Showing with 131 additions and 719 deletions
src/cmd/compile/internal/ssa/gen/main.go
View file @ 8fb63581
...@@ -112,26 +112,37 @@ func genOp() { ...@@ -112,26 +112,37 @@ func genOp() {
for _, v := range a.ops { for _, v := range a.ops {
fmt.Fprintln(w, "{") fmt.Fprintln(w, "{")
fmt.Fprintf(w, "name:\"%s\",\n", v.name) fmt.Fprintf(w, "name:\"%s\",\n", v.name)
if a.name == "generic" {
fmt.Fprintln(w, "generic:true,")
fmt.Fprintln(w, "},") // close op
// generic ops have no reg info or asm
continue
}
if v.asm != "" { if v.asm != "" {
fmt.Fprintf(w, "asm: x86.A%s,\n", v.asm) fmt.Fprintf(w, "asm: x86.A%s,\n", v.asm)
} }
fmt.Fprintln(w, "reg:regInfo{") fmt.Fprintln(w, "reg:regInfo{")
fmt.Fprintln(w, "inputs: []regMask{") // reg inputs
for _, r := range v.reg.inputs { if len(v.reg.inputs) > 0 {
fmt.Fprintf(w, "%d,%s\n", r, a.regMaskComment(r)) fmt.Fprintln(w, "inputs: []regMask{")
for _, r := range v.reg.inputs {
fmt.Fprintf(w, "%d,%s\n", r, a.regMaskComment(r))
}
fmt.Fprintln(w, "},")
} }
fmt.Fprintln(w, "},") if v.reg.clobbers > 0 {
fmt.Fprintf(w, "clobbers: %d,%s\n", v.reg.clobbers, a.regMaskComment(v.reg.clobbers)) fmt.Fprintf(w, "clobbers: %d,%s\n", v.reg.clobbers, a.regMaskComment(v.reg.clobbers))
fmt.Fprintln(w, "outputs: []regMask{")
for _, r := range v.reg.outputs {
fmt.Fprintf(w, "%d,%s\n", r, a.regMaskComment(r))
} }
fmt.Fprintln(w, "},") // reg outputs
fmt.Fprintln(w, "},") if len(v.reg.outputs) > 0 {
if a.name == "generic" { fmt.Fprintln(w, "outputs: []regMask{")
fmt.Fprintln(w, "generic:true,") for _, r := range v.reg.outputs {
fmt.Fprintf(w, "%d,%s\n", r, a.regMaskComment(r))
}
fmt.Fprintln(w, "},")
} }
fmt.Fprintln(w, "},") fmt.Fprintln(w, "},") // close reg info
fmt.Fprintln(w, "},") // close op
} }
} }
fmt.Fprintln(w, "}") fmt.Fprintln(w, "}")
......
src/cmd/compile/internal/ssa/opGen.go
View file @ 8fb63581
...@@ -231,7 +231,6 @@ var opcodeTable = [...]opInfo{ ...@@ -231,7 +231,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -243,7 +242,6 @@ var opcodeTable = [...]opInfo{ ...@@ -243,7 +242,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -257,7 +255,6 @@ var opcodeTable = [...]opInfo{ ...@@ -257,7 +255,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -270,7 +267,6 @@ var opcodeTable = [...]opInfo{ ...@@ -270,7 +267,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -284,7 +280,6 @@ var opcodeTable = [...]opInfo{ ...@@ -284,7 +280,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -297,7 +292,6 @@ var opcodeTable = [...]opInfo{ ...@@ -297,7 +292,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -311,7 +305,6 @@ var opcodeTable = [...]opInfo{ ...@@ -311,7 +305,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -324,7 +317,6 @@ var opcodeTable = [...]opInfo{ ...@@ -324,7 +317,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -338,7 +330,6 @@ var opcodeTable = [...]opInfo{ ...@@ -338,7 +330,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
2, // .CX 2, // .CX
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -351,7 +342,6 @@ var opcodeTable = [...]opInfo{ ...@@ -351,7 +342,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -365,7 +355,6 @@ var opcodeTable = [...]opInfo{ ...@@ -365,7 +355,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
2, // .CX 2, // .CX
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -378,7 +367,6 @@ var opcodeTable = [...]opInfo{ ...@@ -378,7 +367,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -392,7 +380,6 @@ var opcodeTable = [...]opInfo{ ...@@ -392,7 +380,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
2, // .CX 2, // .CX
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -405,7 +392,6 @@ var opcodeTable = [...]opInfo{ ...@@ -405,7 +392,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -417,7 +403,6 @@ var opcodeTable = [...]opInfo{ ...@@ -417,7 +403,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -430,7 +415,6 @@ var opcodeTable = [...]opInfo{ ...@@ -430,7 +415,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -444,7 +428,6 @@ var opcodeTable = [...]opInfo{ ...@@ -444,7 +428,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
...@@ -457,7 +440,6 @@ var opcodeTable = [...]opInfo{ ...@@ -457,7 +440,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
...@@ -471,7 +453,6 @@ var opcodeTable = [...]opInfo{ ...@@ -471,7 +453,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
...@@ -485,7 +466,6 @@ var opcodeTable = [...]opInfo{ ...@@ -485,7 +466,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
...@@ -498,7 +478,6 @@ var opcodeTable = [...]opInfo{ ...@@ -498,7 +478,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -511,7 +490,6 @@ var opcodeTable = [...]opInfo{ ...@@ -511,7 +490,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -524,7 +502,6 @@ var opcodeTable = [...]opInfo{ ...@@ -524,7 +502,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -537,7 +514,6 @@ var opcodeTable = [...]opInfo{ ...@@ -537,7 +514,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -550,7 +526,6 @@ var opcodeTable = [...]opInfo{ ...@@ -550,7 +526,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -563,7 +538,6 @@ var opcodeTable = [...]opInfo{ ...@@ -563,7 +538,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -576,7 +550,6 @@ var opcodeTable = [...]opInfo{ ...@@ -576,7 +550,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -589,7 +562,6 @@ var opcodeTable = [...]opInfo{ ...@@ -589,7 +562,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
8589934592, // .FLAGS 8589934592, // .FLAGS
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -603,7 +575,6 @@ var opcodeTable = [...]opInfo{ ...@@ -603,7 +575,6 @@ var opcodeTable = [...]opInfo{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -616,7 +587,6 @@ var opcodeTable = [...]opInfo{ ...@@ -616,7 +587,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -629,7 +599,6 @@ var opcodeTable = [...]opInfo{ ...@@ -629,7 +599,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -642,7 +611,6 @@ var opcodeTable = [...]opInfo{ ...@@ -642,7 +611,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -651,8 +619,6 @@ var opcodeTable = [...]opInfo{ ...@@ -651,8 +619,6 @@ var opcodeTable = [...]opInfo{
{ {
name: "MOVQconst", name: "MOVQconst",
reg: regInfo{ reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -664,7 +630,6 @@ var opcodeTable = [...]opInfo{ ...@@ -664,7 +630,6 @@ var opcodeTable = [...]opInfo{
inputs: []regMask{ inputs: []regMask{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -677,7 +642,6 @@ var opcodeTable = [...]opInfo{ ...@@ -677,7 +642,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -690,7 +654,6 @@ var opcodeTable = [...]opInfo{ ...@@ -690,7 +654,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -703,7 +666,6 @@ var opcodeTable = [...]opInfo{ ...@@ -703,7 +666,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -716,7 +678,6 @@ var opcodeTable = [...]opInfo{ ...@@ -716,7 +678,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -730,7 +691,6 @@ var opcodeTable = [...]opInfo{ ...@@ -730,7 +691,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -743,7 +703,6 @@ var opcodeTable = [...]opInfo{ ...@@ -743,7 +703,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -756,7 +715,6 @@ var opcodeTable = [...]opInfo{ ...@@ -756,7 +715,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -770,7 +728,6 @@ var opcodeTable = [...]opInfo{ ...@@ -770,7 +728,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -784,7 +741,6 @@ var opcodeTable = [...]opInfo{ ...@@ -784,7 +741,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -798,7 +754,6 @@ var opcodeTable = [...]opInfo{ ...@@ -798,7 +754,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -813,7 +768,6 @@ var opcodeTable = [...]opInfo{ ...@@ -813,7 +768,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -828,8 +782,6 @@ var opcodeTable = [...]opInfo{ ...@@ -828,8 +782,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -841,8 +793,6 @@ var opcodeTable = [...]opInfo{ ...@@ -841,8 +793,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -854,8 +804,6 @@ var opcodeTable = [...]opInfo{ ...@@ -854,8 +804,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -867,8 +815,6 @@ var opcodeTable = [...]opInfo{ ...@@ -867,8 +815,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -880,8 +826,6 @@ var opcodeTable = [...]opInfo{ ...@@ -880,8 +826,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -891,8 +835,6 @@ var opcodeTable = [...]opInfo{ ...@@ -891,8 +835,6 @@ var opcodeTable = [...]opInfo{
4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB 4295032831, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 .SB
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -903,32 +845,19 @@ var opcodeTable = [...]opInfo{ ...@@ -903,32 +845,19 @@ var opcodeTable = [...]opInfo{
2, // .CX 2, // .CX
}, },
clobbers: 131, // .AX .CX .DI clobbers: 131, // .AX .CX .DI
outputs: []regMask{},
}, },
}, },
{ {
name: "MOVQloadglobal", name: "MOVQloadglobal",
reg: regInfo{ reg: regInfo{},
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
}, },
{ {
name: "MOVQstoreglobal", name: "MOVQstoreglobal",
reg: regInfo{ reg: regInfo{},
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
}, },
{ {
name: "CALLstatic", name: "CALLstatic",
reg: regInfo{ reg: regInfo{},
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
}, },
{ {
name: "CALLclosure", name: "CALLclosure",
...@@ -938,8 +867,6 @@ var opcodeTable = [...]opInfo{ ...@@ -938,8 +867,6 @@ var opcodeTable = [...]opInfo{
4, // .DX 4, // .DX
0, 0,
}, },
clobbers: 0,
outputs: []regMask{},
}, },
}, },
{ {
...@@ -951,7 +878,6 @@ var opcodeTable = [...]opInfo{ ...@@ -951,7 +878,6 @@ var opcodeTable = [...]opInfo{
2, // .CX 2, // .CX
}, },
clobbers: 194, // .CX .SI .DI clobbers: 194, // .CX .SI .DI
outputs: []regMask{},
}, },
}, },
{ {
...@@ -962,7 +888,6 @@ var opcodeTable = [...]opInfo{ ...@@ -962,7 +888,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -976,7 +901,6 @@ var opcodeTable = [...]opInfo{ ...@@ -976,7 +901,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -990,7 +914,6 @@ var opcodeTable = [...]opInfo{ ...@@ -990,7 +914,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -1004,7 +927,6 @@ var opcodeTable = [...]opInfo{ ...@@ -1004,7 +927,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -1018,7 +940,6 @@ var opcodeTable = [...]opInfo{ ...@@ -1018,7 +940,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -1032,7 +953,6 @@ var opcodeTable = [...]opInfo{ ...@@ -1032,7 +953,6 @@ var opcodeTable = [...]opInfo{
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65535, // .AX .CX .DX .BX .SP .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
clobbers: 0,
outputs: []regMask{ outputs: []regMask{
65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15 65519, // .AX .CX .DX .BX .BP .SI .DI .R8 .R9 .R10 .R11 .R12 .R13 .R14 .R15
}, },
...@@ -1040,938 +960,419 @@ var opcodeTable = [...]opInfo{ ...@@ -1040,938 +960,419 @@ var opcodeTable = [...]opInfo{
}, },
{ {
name: "InvertFlags", name: "InvertFlags",
reg: regInfo{ reg: regInfo{},
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
}, },
{ {
name: "Add8", name: "Add8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add16", name: "Add16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add32", name: "Add32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add64", name: "Add64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add8U", name: "Add8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add16U", name: "Add16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add32U", name: "Add32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Add64U", name: "Add64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "AddPtr", name: "AddPtr",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub8", name: "Sub8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub16", name: "Sub16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub32", name: "Sub32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub64", name: "Sub64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub8U", name: "Sub8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub16U", name: "Sub16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub32U", name: "Sub32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Sub64U", name: "Sub64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Mul", name: "Mul",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Lsh8", name: "Lsh8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Lsh16", name: "Lsh16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Lsh32", name: "Lsh32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Lsh64", name: "Lsh64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh8", name: "Rsh8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh8U", name: "Rsh8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh16", name: "Rsh16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh16U", name: "Rsh16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh32", name: "Rsh32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh32U", name: "Rsh32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh64", name: "Rsh64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Rsh64U", name: "Rsh64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Eq8", name: "Eq8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Eq16", name: "Eq16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Eq32", name: "Eq32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Eq64", name: "Eq64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Neq8", name: "Neq8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Neq16", name: "Neq16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Neq32", name: "Neq32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Neq64", name: "Neq64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less8", name: "Less8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less8U", name: "Less8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less16", name: "Less16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less16U", name: "Less16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less32", name: "Less32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less32U", name: "Less32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less64", name: "Less64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Less64U", name: "Less64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq8", name: "Leq8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq8U", name: "Leq8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq16", name: "Leq16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq16U", name: "Leq16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq32", name: "Leq32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq32U", name: "Leq32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq64", name: "Leq64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Leq64U", name: "Leq64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater8", name: "Greater8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater8U", name: "Greater8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater16", name: "Greater16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater16U", name: "Greater16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater32", name: "Greater32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater32U", name: "Greater32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater64", name: "Greater64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Greater64U", name: "Greater64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq8", name: "Geq8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq8U", name: "Geq8U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq16", name: "Geq16",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq16U", name: "Geq16U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq32", name: "Geq32",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq32U", name: "Geq32U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq64", name: "Geq64",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Geq64U", name: "Geq64U",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Not", name: "Not",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Phi", name: "Phi",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Copy", name: "Copy",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Const", name: "Const",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Arg", name: "Arg",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Addr", name: "Addr",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SP", name: "SP",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SB", name: "SB",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Func", name: "Func",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Load", name: "Load",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Store", name: "Store",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Move", name: "Move",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Zero", name: "Zero",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "ClosureCall", name: "ClosureCall",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StaticCall", name: "StaticCall",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "Convert", name: "Convert",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "ConvNop", name: "ConvNop",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "IsNonNil", name: "IsNonNil",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "IsInBounds", name: "IsInBounds",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "ArrayIndex", name: "ArrayIndex",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "PtrIndex", name: "PtrIndex",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "OffPtr", name: "OffPtr",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StructSelect", name: "StructSelect",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SliceMake", name: "SliceMake",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SlicePtr", name: "SlicePtr",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SliceLen", name: "SliceLen",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "SliceCap", name: "SliceCap",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StringMake", name: "StringMake",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StringPtr", name: "StringPtr",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StringLen", name: "StringLen",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "StoreReg8", name: "StoreReg8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "LoadReg8", name: "LoadReg8",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
{ {
name: "FwdRef", name: "FwdRef",
reg: regInfo{
inputs: []regMask{},
clobbers: 0,
outputs: []regMask{},
},
generic: true, generic: true,
}, },
} }
......
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