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KTLA Study
Commit 3b4c3b8d authored by Kirill Smelkov's avatar Kirill Smelkov
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1Bit.tla 0 → 100644
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-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--fair algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "7c28162a" /\ chksum(tla) = "b89f1da2")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == /\ Init /\ [][Next]_vars
/\ WF_vars(Next)
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:21:36 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/.project 0 → 100644
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>1Bit</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>toolbox.builder.TLAParserBuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>toolbox.natures.TLANature</nature>
</natures>
<linkedResources>
<link>
<name>1Bit.tla</name>
<type>1</type>
<locationURI>PARENT-1-PROJECT_LOC/1Bit.tla</locationURI>
</link>
<link>
<name>MutualExclusionSpec.tla</name>
<type>1</type>
<location>/home/kirr/study/tla+/pluscal/ME/MutualExclusionSpec.tla</location>
</link>
</linkedResources>
</projectDescription>
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ProjectRootFile=PARENT-1-PROJECT_LOC/1Bit.tla
eclipse.preferences.version=1
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\relax
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This is pdfTeX, Version 3.14159265-2.6-1.40.21 (TeX Live 2020/Debian) (preloaded format=pdflatex 2021.6.9) 9 FEB 2022 21:12
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Here is how much of TeX's memory you used:
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\batchmode %% Suppresses most terminal output.
\documentclass{article}
\usepackage{color}
\definecolor{boxshade}{gray}{0.85}
\setlength{\textwidth}{360pt}
\setlength{\textheight}{541pt}
\usepackage{latexsym}
\usepackage{ifthen}
% \usepackage{color}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SWITCHES %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newboolean{shading}
\setboolean{shading}{false}
\makeatletter
%% this is needed only when inserted into the file, not when
%% used as a package file.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% DEFINITIONS OF SYMBOL-PRODUCING COMMANDS %
% %
% TLA+ LaTeX %
% symbol command %
% ------ ------- %
% => \implies %
% <: \ltcolon %
% :> \colongt %
% == \defeq %
% .. \dotdot %
% :: \coloncolon %
% =| \eqdash %
% ++ \pp %
% -- \mm %
% ** \stst %
% // \slsl %
% ^ \ct %
% \A \A %
% \E \E %
% \AA \AA %
% \EE \EE %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newlength{\symlength}
\newcommand{\implies}{\Rightarrow}
\newcommand{\ltcolon}{\mathrel{<\!\!\mbox{:}}}
\newcommand{\colongt}{\mathrel{\!\mbox{:}\!\!>}}
\newcommand{\defeq}{\;\mathrel{\smash %% keep this symbol from being too tall
{{\stackrel{\scriptscriptstyle\Delta}{=}}}}\;}
\newcommand{\dotdot}{\mathrel{\ldotp\ldotp}}
\newcommand{\coloncolon}{\mathrel{::\;}}
\newcommand{\eqdash}{\mathrel = \joinrel \hspace{-.28em}|}
\newcommand{\pp}{\mathbin{++}}
\newcommand{\mm}{\mathbin{--}}
\newcommand{\stst}{*\!*}
\newcommand{\slsl}{/\!/}
\newcommand{\ct}{\hat{\hspace{.4em}}}
\newcommand{\A}{\forall}
\newcommand{\E}{\exists}
\renewcommand{\AA}{\makebox{$\raisebox{.05em}{\makebox[0pt][l]{%
$\forall\hspace{-.517em}\forall\hspace{-.517em}\forall$}}%
\forall\hspace{-.517em}\forall \hspace{-.517em}\forall\,$}}
\newcommand{\EE}{\makebox{$\raisebox{.05em}{\makebox[0pt][l]{%
$\exists\hspace{-.517em}\exists\hspace{-.517em}\exists$}}%
\exists\hspace{-.517em}\exists\hspace{-.517em}\exists\,$}}
\newcommand{\whileop}{\.{\stackrel
{\mbox{\raisebox{-.3em}[0pt][0pt]{$\scriptscriptstyle+\;\,$}}}%
{-\hspace{-.16em}\triangleright}}}
% Commands are defined to produce the upper-case keywords.
% Note that some have space after them.
\newcommand{\ASSUME}{\textsc{assume }}
\newcommand{\ASSUMPTION}{\textsc{assumption }}
\newcommand{\AXIOM}{\textsc{axiom }}
\newcommand{\BOOLEAN}{\textsc{boolean }}
\newcommand{\CASE}{\textsc{case }}
\newcommand{\CONSTANT}{\textsc{constant }}
\newcommand{\CONSTANTS}{\textsc{constants }}
\newcommand{\ELSE}{\settowidth{\symlength}{\THEN}%
\makebox[\symlength][l]{\textsc{ else}}}
\newcommand{\EXCEPT}{\textsc{ except }}
\newcommand{\EXTENDS}{\textsc{extends }}
\newcommand{\FALSE}{\textsc{false}}
\newcommand{\IF}{\textsc{if }}
\newcommand{\IN}{\settowidth{\symlength}{\LET}%
\makebox[\symlength][l]{\textsc{in}}}
\newcommand{\INSTANCE}{\textsc{instance }}
\newcommand{\LET}{\textsc{let }}
\newcommand{\LOCAL}{\textsc{local }}
\newcommand{\MODULE}{\textsc{module }}
\newcommand{\OTHER}{\textsc{other }}
\newcommand{\STRING}{\textsc{string}}
\newcommand{\THEN}{\textsc{ then }}
\newcommand{\THEOREM}{\textsc{theorem }}
\newcommand{\LEMMA}{\textsc{lemma }}
\newcommand{\PROPOSITION}{\textsc{proposition }}
\newcommand{\COROLLARY}{\textsc{corollary }}
\newcommand{\TRUE}{\textsc{true}}
\newcommand{\VARIABLE}{\textsc{variable }}
\newcommand{\VARIABLES}{\textsc{variables }}
\newcommand{\WITH}{\textsc{ with }}
\newcommand{\WF}{\textrm{WF}}
\newcommand{\SF}{\textrm{SF}}
\newcommand{\CHOOSE}{\textsc{choose }}
\newcommand{\ENABLED}{\textsc{enabled }}
\newcommand{\UNCHANGED}{\textsc{unchanged }}
\newcommand{\SUBSET}{\textsc{subset }}
\newcommand{\UNION}{\textsc{union }}
\newcommand{\DOMAIN}{\textsc{domain }}
% Added for tla2tex
\newcommand{\BY}{\textsc{by }}
\newcommand{\OBVIOUS}{\textsc{obvious }}
\newcommand{\HAVE}{\textsc{have }}
\newcommand{\QED}{\textsc{qed }}
\newcommand{\TAKE}{\textsc{take }}
\newcommand{\DEF}{\textsc{ def }}
\newcommand{\HIDE}{\textsc{hide }}
\newcommand{\RECURSIVE}{\textsc{recursive }}
\newcommand{\USE}{\textsc{use }}
\newcommand{\DEFINE}{\textsc{define }}
\newcommand{\PROOF}{\textsc{proof }}
\newcommand{\WITNESS}{\textsc{witness }}
\newcommand{\PICK}{\textsc{pick }}
\newcommand{\DEFS}{\textsc{defs }}
\newcommand{\PROVE}{\settowidth{\symlength}{\ASSUME}%
\makebox[\symlength][l]{\textsc{prove}}\@s{-4.1}}%
%% The \@s{-4.1) is a kludge added on 24 Oct 2009 [happy birthday, Ellen]
%% so the correct alignment occurs if the user types
%% ASSUME X
%% PROVE Y
%% because it cancels the extra 4.1 pts added because of the
%% extra space after the PROVE. This seems to works OK.
%% However, the 4.1 equals Parameters.LaTeXLeftSpace(1) and
%% should be changed if that method ever changes.
\newcommand{\SUFFICES}{\textsc{suffices }}
\newcommand{\NEW}{\textsc{new }}
\newcommand{\LAMBDA}{\textsc{lambda }}
\newcommand{\STATE}{\textsc{state }}
\newcommand{\ACTION}{\textsc{action }}
\newcommand{\TEMPORAL}{\textsc{temporal }}
\newcommand{\ONLY}{\textsc{only }} %% added by LL on 2 Oct 2009
\newcommand{\OMITTED}{\textsc{omitted }} %% added by LL on 31 Oct 2009
\newcommand{\@pfstepnum}[2]{\ensuremath{\langle#1\rangle}\textrm{#2}}
\newcommand{\bang}{\@s{1}\mbox{\small !}\@s{1}}
%% We should format || differently in PlusCal code than in TLA+ formulas.
\newcommand{\p@barbar}{\ifpcalsymbols
\,\,\rule[-.25em]{.075em}{1em}\hspace*{.2em}\rule[-.25em]{.075em}{1em}\,\,%
\else \,||\,\fi}
%% PlusCal keywords
\newcommand{\p@fair}{\textbf{fair }}
\newcommand{\p@semicolon}{\textbf{\,; }}
\newcommand{\p@algorithm}{\textbf{algorithm }}
\newcommand{\p@mmfair}{\textbf{-{}-fair }}
\newcommand{\p@mmalgorithm}{\textbf{-{}-algorithm }}
\newcommand{\p@assert}{\textbf{assert }}
\newcommand{\p@await}{\textbf{await }}
\newcommand{\p@begin}{\textbf{begin }}
\newcommand{\p@end}{\textbf{end }}
\newcommand{\p@call}{\textbf{call }}
\newcommand{\p@define}{\textbf{define }}
\newcommand{\p@do}{\textbf{ do }}
\newcommand{\p@either}{\textbf{either }}
\newcommand{\p@or}{\textbf{or }}
\newcommand{\p@goto}{\textbf{goto }}
\newcommand{\p@if}{\textbf{if }}
\newcommand{\p@then}{\,\,\textbf{then }}
\newcommand{\p@else}{\ifcsyntax \textbf{else } \else \,\,\textbf{else }\fi}
\newcommand{\p@elsif}{\,\,\textbf{elsif }}
\newcommand{\p@macro}{\textbf{macro }}
\newcommand{\p@print}{\textbf{print }}
\newcommand{\p@procedure}{\textbf{procedure }}
\newcommand{\p@process}{\textbf{process }}
\newcommand{\p@return}{\textbf{return}}
\newcommand{\p@skip}{\textbf{skip}}
\newcommand{\p@variable}{\textbf{variable }}
\newcommand{\p@variables}{\textbf{variables }}
\newcommand{\p@while}{\textbf{while }}
\newcommand{\p@when}{\textbf{when }}
\newcommand{\p@with}{\textbf{with }}
\newcommand{\p@lparen}{\textbf{(\,\,}}
\newcommand{\p@rparen}{\textbf{\,\,) }}
\newcommand{\p@lbrace}{\textbf{\{\,\,}}
\newcommand{\p@rbrace}{\textbf{\,\,\} }}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% REDEFINE STANDARD COMMANDS TO MAKE THEM FORMAT BETTER %
% %
% We redefine \in and \notin %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\renewcommand{\_}{\rule{.4em}{.06em}\hspace{.05em}}
\newlength{\equalswidth}
\let\oldin=\in
\let\oldnotin=\notin
\renewcommand{\in}{%
{\settowidth{\equalswidth}{$\.{=}$}\makebox[\equalswidth][c]{$\oldin$}}}
\renewcommand{\notin}{%
{\settowidth{\equalswidth}{$\.{=}$}\makebox[\equalswidth]{$\oldnotin$}}}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% HORIZONTAL BARS: %
% %
% \moduleLeftDash |~~~~~~~~~~ %
% \moduleRightDash ~~~~~~~~~~| %
% \midbar |----------| %
% \bottombar |__________| %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newlength{\charwidth}\settowidth{\charwidth}{{\small\tt M}}
\newlength{\boxrulewd}\setlength{\boxrulewd}{.4pt}
\newlength{\boxlineht}\setlength{\boxlineht}{.5\baselineskip}
\newcommand{\boxsep}{\charwidth}
\newlength{\boxruleht}\setlength{\boxruleht}{.5ex}
\newlength{\boxruledp}\setlength{\boxruledp}{-\boxruleht}
\addtolength{\boxruledp}{\boxrulewd}
\newcommand{\boxrule}{\leaders\hrule height \boxruleht depth \boxruledp
\hfill\mbox{}}
\newcommand{\@computerule}{%
\setlength{\boxruleht}{.5ex}%
\setlength{\boxruledp}{-\boxruleht}%
\addtolength{\boxruledp}{\boxrulewd}}
\newcommand{\bottombar}{\hspace{-\boxsep}%
\raisebox{-\boxrulewd}[0pt][0pt]{\rule[.5ex]{\boxrulewd}{\boxlineht}}%
\boxrule
\raisebox{-\boxrulewd}[0pt][0pt]{%
\rule[.5ex]{\boxrulewd}{\boxlineht}}\hspace{-\boxsep}\vspace{0pt}}
\newcommand{\moduleLeftDash}%
{\hspace*{-\boxsep}%
\raisebox{-\boxlineht}[0pt][0pt]{\rule[.5ex]{\boxrulewd
}{\boxlineht}}%
\boxrule\hspace*{.4em }}
\newcommand{\moduleRightDash}%
{\hspace*{.4em}\boxrule
\raisebox{-\boxlineht}[0pt][0pt]{\rule[.5ex]{\boxrulewd
}{\boxlineht}}\hspace{-\boxsep}}%\vspace{.2em}
\newcommand{\midbar}{\hspace{-\boxsep}\raisebox{-.5\boxlineht}[0pt][0pt]{%
\rule[.5ex]{\boxrulewd}{\boxlineht}}\boxrule\raisebox{-.5\boxlineht%
}[0pt][0pt]{\rule[.5ex]{\boxrulewd}{\boxlineht}}\hspace{-\boxsep}}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% FORMATING COMMANDS %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% PLUSCAL SHADING %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% The TeX pcalshading switch is set on to cause PlusCal shading to be
% performed. This changes the behavior of the following commands and
% environments to cause full-width shading to be performed on all lines.
%
% \tstrut \@x cpar mcom \@pvspace
%
% The TeX pcalsymbols switch is turned on when typesetting a PlusCal algorithm,
% whether or not shading is being performed. It causes symbols (other than
% parentheses and braces and PlusCal-only keywords) that should be typeset
% differently depending on whether they are in an algorithm to be typeset
% appropriately. Currently, the only such symbol is "||".
%
% The TeX csyntax switch is turned on when typesetting a PlusCal algorithm in
% c-syntax. This allows symbols to be format differently in the two syntaxes.
% The "else" keyword is the only one that is.
\newif\ifpcalshading \pcalshadingfalse
\newif\ifpcalsymbols \pcalsymbolsfalse
\newif\ifcsyntax \csyntaxtrue
% The \@pvspace command makes a vertical space. It uses \vspace
% except with \ifpcalshading, in which case it sets \pvcalvspace
% and the space is added by a following \@x command.
%
\newlength{\pcalvspace}\setlength{\pcalvspace}{0pt}%
\newcommand{\@pvspace}[1]{%
\ifpcalshading
\par\global\setlength{\pcalvspace}{#1}%
\else
\par\vspace{#1}%
\fi
}
% The lcom environment was changed to set \lcomindent equal to
% the indentation it produces. This length is used by the
% cpar environment to make shading extend for the full width
% of the line. This assumes that lcom environments are not
% nested. I hope TLATeX does not nest them.
%
\newlength{\lcomindent}%
\setlength{\lcomindent}{0pt}%
%\tstrut: A strut to produce inter-paragraph space in a comment.
%\rstrut: A strut to extend the bottom of a one-line comment so
% there's no break in the shading between comments on
% successive lines.
\newcommand\tstrut%
{\raisebox{\vshadelen}{\raisebox{-.25em}{\rule{0pt}{1.15em}}}%
\global\setlength{\vshadelen}{0pt}}
\newcommand\rstrut{\raisebox{-.25em}{\rule{0pt}{1.15em}}%
\global\setlength{\vshadelen}{0pt}}
% \.{op} formats operator op in math mode with empty boxes on either side.
% Used because TeX otherwise vary the amount of space it leaves around op.
\renewcommand{\.}[1]{\ensuremath{\mbox{}#1\mbox{}}}
% \@s{n} produces an n-point space
\newcommand{\@s}[1]{\hspace{#1pt}}
% \@x{txt} starts a specification line in the beginning with txt
% in the final LaTeX source.
\newlength{\@xlen}
\newcommand\xtstrut%
{\setlength{\@xlen}{1.05em}%
\addtolength{\@xlen}{\pcalvspace}%
\raisebox{\vshadelen}{\raisebox{-.25em}{\rule{0pt}{\@xlen}}}%
\global\setlength{\vshadelen}{0pt}%
\global\setlength{\pcalvspace}{0pt}}
\newcommand{\@x}[1]{\par
\ifpcalshading
\makebox[0pt][l]{\shadebox{\xtstrut\hspace*{\textwidth}}}%
\fi
\mbox{$\mbox{}#1\mbox{}$}}
% \@xx{txt} continues a specification line with the text txt.
\newcommand{\@xx}[1]{\mbox{$\mbox{}#1\mbox{}$}}
% \@y{cmt} produces a one-line comment.
\newcommand{\@y}[1]{\mbox{\footnotesize\hspace{.65em}%
\ifthenelse{\boolean{shading}}{%
\shadebox{#1\hspace{-\the\lastskip}\rstrut}}%
{#1\hspace{-\the\lastskip}\rstrut}}}
% \@z{cmt} produces a zero-width one-line comment.
\newcommand{\@z}[1]{\makebox[0pt][l]{\footnotesize
\ifthenelse{\boolean{shading}}{%
\shadebox{#1\hspace{-\the\lastskip}\rstrut}}%
{#1\hspace{-\the\lastskip}\rstrut}}}
% \@w{str} produces the TLA+ string "str".
\newcommand{\@w}[1]{\textsf{``{#1}''}}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SHADING %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\def\graymargin{1}
% The number of points of margin in the shaded box.
% \definecolor{boxshade}{gray}{.85}
% Defines the darkness of the shading: 1 = white, 0 = black
% Added by TLATeX only if needed.
% \shadebox{txt} puts txt in a shaded box.
\newlength{\templena}
\newlength{\templenb}
\newsavebox{\tempboxa}
\newcommand{\shadebox}[1]{{\setlength{\fboxsep}{\graymargin pt}%
\savebox{\tempboxa}{#1}%
\settoheight{\templena}{\usebox{\tempboxa}}%
\settodepth{\templenb}{\usebox{\tempboxa}}%
\hspace*{-\fboxsep}\raisebox{0pt}[\templena][\templenb]%
{\colorbox{boxshade}{\usebox{\tempboxa}}}\hspace*{-\fboxsep}}}
% \vshade{n} makes an n-point inter-paragraph space, with
% shading if the `shading' flag is true.
\newlength{\vshadelen}
\setlength{\vshadelen}{0pt}
\newcommand{\vshade}[1]{\ifthenelse{\boolean{shading}}%
{\global\setlength{\vshadelen}{#1pt}}%
{\vspace{#1pt}}}
\newlength{\boxwidth}
\newlength{\multicommentdepth}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% THE cpar ENVIRONMENT %
% ^^^^^^^^^^^^^^^^^^^^ %
% The LaTeX input %
% %
% \begin{cpar}{pop}{nest}{isLabel}{d}{e}{arg6} %
% XXXXXXXXXXXXXXX %
% XXXXXXXXXXXXXXX %
% XXXXXXXXXXXXXXX %
% \end{cpar} %
% %
% produces one of two possible results. If isLabel is the letter "T", %
% it produces the following, where [label] is the result of typesetting %
% arg6 in an LR box, and d is is a number representing a distance in %
% points. %
% %
% prevailing |<-- d -->[label]<- e ->XXXXXXXXXXXXXXX %
% left | XXXXXXXXXXXXXXX %
% margin | XXXXXXXXXXXXXXX %
% %
% If isLabel is the letter "F", then it produces %
% %
% prevailing |<-- d -->XXXXXXXXXXXXXXXXXXXXXXX %
% left | <- e ->XXXXXXXXXXXXXXXX %
% margin | XXXXXXXXXXXXXXXX %
% %
% where d and e are numbers representing distances in points. %
% %
% The prevailing left margin is the one in effect before the most recent %
% pop (argument 1) cpar environments with "T" as the nest argument, where %
% pop is a number \geq 0. %
% %
% If the nest argument is the letter "T", then the prevailing left %
% margin is moved to the left of the second (and following) lines of %
% X's. Otherwise, the prevailing left margin is left unchanged. %
% %
% An \unnest{n} command moves the prevailing left margin to where it was %
% before the most recent n cpar environments with "T" as the nesting %
% argument. %
% %
% The environment leaves no vertical space above or below it, or between %
% its paragraphs. (TLATeX inserts the proper amount of vertical space.) %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newcounter{pardepth}
\setcounter{pardepth}{0}
% \setgmargin{txt} defines \gmarginN to be txt, where N is \roman{pardepth}.
% \thegmargin equals \gmarginN, where N is \roman{pardepth}.
\newcommand{\setgmargin}[1]{%
\expandafter\xdef\csname gmargin\roman{pardepth}\endcsname{#1}}
\newcommand{\thegmargin}{\csname gmargin\roman{pardepth}\endcsname}
\newcommand{\gmargin}{0pt}
\newsavebox{\tempsbox}
\newlength{\@cparht}
\newlength{\@cpardp}
\newenvironment{cpar}[6]{%
\addtocounter{pardepth}{-#1}%
\ifthenelse{\boolean{shading}}{\par\begin{lrbox}{\tempsbox}%
\begin{minipage}[t]{\linewidth}}{}%
\begin{list}{}{%
\edef\temp{\thegmargin}
\ifthenelse{\equal{#3}{T}}%
{\settowidth{\leftmargin}{\hspace{\temp}\footnotesize #6\hspace{#5pt}}%
\addtolength{\leftmargin}{#4pt}}%
{\setlength{\leftmargin}{#4pt}%
\addtolength{\leftmargin}{#5pt}%
\addtolength{\leftmargin}{\temp}%
\setlength{\itemindent}{-#5pt}}%
\ifthenelse{\equal{#2}{T}}{\addtocounter{pardepth}{1}%
\setgmargin{\the\leftmargin}}{}%
\setlength{\labelwidth}{0pt}%
\setlength{\labelsep}{0pt}%
\setlength{\itemindent}{-\leftmargin}%
\setlength{\topsep}{0pt}%
\setlength{\parsep}{0pt}%
\setlength{\partopsep}{0pt}%
\setlength{\parskip}{0pt}%
\setlength{\itemsep}{0pt}
\setlength{\itemindent}{#4pt}%
\addtolength{\itemindent}{-\leftmargin}}%
\ifthenelse{\equal{#3}{T}}%
{\item[\tstrut\footnotesize \hspace{\temp}{#6}\hspace{#5pt}]
}%
{\item[\tstrut\hspace{\temp}]%
}%
\footnotesize}
{\hspace{-\the\lastskip}\tstrut
\end{list}%
\ifthenelse{\boolean{shading}}%
{\end{minipage}%
\end{lrbox}%
\ifpcalshading
\setlength{\@cparht}{\ht\tempsbox}%
\setlength{\@cpardp}{\dp\tempsbox}%
\addtolength{\@cparht}{.15em}%
\addtolength{\@cpardp}{.2em}%
\addtolength{\@cparht}{\@cpardp}%
% I don't know what's going on here. I want to add a
% \pcalvspace high shaded line, but I don't know how to
% do it. A little trial and error shows that the following
% does a reasonable job approximating that, eliminating
% the line if \pcalvspace is small.
\addtolength{\@cparht}{\pcalvspace}%
\ifdim \pcalvspace > .8em
\addtolength{\pcalvspace}{-.2em}%
\hspace*{-\lcomindent}%
\shadebox{\rule{0pt}{\pcalvspace}\hspace*{\textwidth}}\par
\global\setlength{\pcalvspace}{0pt}%
\fi
\hspace*{-\lcomindent}%
\makebox[0pt][l]{\raisebox{-\@cpardp}[0pt][0pt]{%
\shadebox{\rule{0pt}{\@cparht}\hspace*{\textwidth}}}}%
\hspace*{\lcomindent}\usebox{\tempsbox}%
\par
\else
\shadebox{\usebox{\tempsbox}}\par
\fi}%
{}%
}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% THE ppar ENVIRONMENT %
% ^^^^^^^^^^^^^^^^^^^^ %
% The environment %
% %
% \begin{ppar} ... \end{ppar} %
% %
% is equivalent to %
% %
% \begin{cpar}{0}{F}{F}{0}{0}{} ... \end{cpar} %
% %
% The environment is put around each line of the output for a PlusCal %
% algorithm. %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%\newenvironment{ppar}{%
% \ifthenelse{\boolean{shading}}{\par\begin{lrbox}{\tempsbox}%
% \begin{minipage}[t]{\linewidth}}{}%
% \begin{list}{}{%
% \edef\temp{\thegmargin}
% \setlength{\leftmargin}{0pt}%
% \addtolength{\leftmargin}{\temp}%
% \setlength{\itemindent}{0pt}%
% \setlength{\labelwidth}{0pt}%
% \setlength{\labelsep}{0pt}%
% \setlength{\itemindent}{-\leftmargin}%
% \setlength{\topsep}{0pt}%
% \setlength{\parsep}{0pt}%
% \setlength{\partopsep}{0pt}%
% \setlength{\parskip}{0pt}%
% \setlength{\itemsep}{0pt}
% \setlength{\itemindent}{0pt}%
% \addtolength{\itemindent}{-\leftmargin}}%
% \item[\tstrut\hspace{\temp}]}%
% {\hspace{-\the\lastskip}\tstrut
% \end{list}%
% \ifthenelse{\boolean{shading}}{\end{minipage}
% \end{lrbox}%
% \shadebox{\usebox{\tempsbox}}\par}{}%
% }
%%% TESTING
\newcommand{\xtest}[1]{\par
\makebox[0pt][l]{\shadebox{\xtstrut\hspace*{\textwidth}}}%
\mbox{$\mbox{}#1\mbox{}$}}
% \newcommand{\xxtest}[1]{\par
% \makebox[0pt][l]{\shadebox{\xtstrut{#1}\hspace*{\textwidth}}}%
% \mbox{$\mbox{}#1\mbox{}$}}
%\newlength{\pcalvspace}
%\setlength{\pcalvspace}{0pt}
% \newlength{\xxtestlen}
% \setlength{\xxtestlen}{0pt}
% \newcommand\xtstrut%
% {\setlength{\xxtestlen}{1.15em}%
% \addtolength{\xxtestlen}{\pcalvspace}%
% \raisebox{\vshadelen}{\raisebox{-.25em}{\rule{0pt}{\xxtestlen}}}%
% \global\setlength{\vshadelen}{0pt}%
% \global\setlength{\pcalvspace}{0pt}}
%%%% TESTING
%% The xcpar environment
%% Note: overloaded use of \pcalvspace for testing.
%%
% \newlength{\xcparht}%
% \newlength{\xcpardp}%
% \newenvironment{xcpar}[6]{%
% \addtocounter{pardepth}{-#1}%
% \ifthenelse{\boolean{shading}}{\par\begin{lrbox}{\tempsbox}%
% \begin{minipage}[t]{\linewidth}}{}%
% \begin{list}{}{%
% \edef\temp{\thegmargin}%
% \ifthenelse{\equal{#3}{T}}%
% {\settowidth{\leftmargin}{\hspace{\temp}\footnotesize #6\hspace{#5pt}}%
% \addtolength{\leftmargin}{#4pt}}%
% {\setlength{\leftmargin}{#4pt}%
% \addtolength{\leftmargin}{#5pt}%
% \addtolength{\leftmargin}{\temp}%
% \setlength{\itemindent}{-#5pt}}%
% \ifthenelse{\equal{#2}{T}}{\addtocounter{pardepth}{1}%
% \setgmargin{\the\leftmargin}}{}%
% \setlength{\labelwidth}{0pt}%
% \setlength{\labelsep}{0pt}%
% \setlength{\itemindent}{-\leftmargin}%
% \setlength{\topsep}{0pt}%
% \setlength{\parsep}{0pt}%
% \setlength{\partopsep}{0pt}%
% \setlength{\parskip}{0pt}%
% \setlength{\itemsep}{0pt}%
% \setlength{\itemindent}{#4pt}%
% \addtolength{\itemindent}{-\leftmargin}}%
% \ifthenelse{\equal{#3}{T}}%
% {\item[\xtstrut\footnotesize \hspace{\temp}{#6}\hspace{#5pt}]%
% }%
% {\item[\xtstrut\hspace{\temp}]%
% }%
% \footnotesize}
% {\hspace{-\the\lastskip}\tstrut
% \end{list}%
% \ifthenelse{\boolean{shading}}{\end{minipage}
% \end{lrbox}%
% \setlength{\xcparht}{\ht\tempsbox}%
% \setlength{\xcpardp}{\dp\tempsbox}%
% \addtolength{\xcparht}{.15em}%
% \addtolength{\xcpardp}{.2em}%
% \addtolength{\xcparht}{\xcpardp}%
% \hspace*{-\lcomindent}%
% \makebox[0pt][l]{\raisebox{-\xcpardp}[0pt][0pt]{%
% \shadebox{\rule{0pt}{\xcparht}\hspace*{\textwidth}}}}%
% \hspace*{\lcomindent}\usebox{\tempsbox}%
% \par}{}%
% }
%
% \newlength{\xmcomlen}
%\newenvironment{xmcom}[1]{%
% \setcounter{pardepth}{0}%
% \hspace{.65em}%
% \begin{lrbox}{\alignbox}\sloppypar%
% \setboolean{shading}{false}%
% \setlength{\boxwidth}{#1pt}%
% \addtolength{\boxwidth}{-.65em}%
% \begin{minipage}[t]{\boxwidth}\footnotesize
% \parskip=0pt\relax}%
% {\end{minipage}\end{lrbox}%
% \setlength{\xmcomlen}{\textwidth}%
% \addtolength{\xmcomlen}{-\wd\alignbox}%
% \settodepth{\alignwidth}{\usebox{\alignbox}}%
% \global\setlength{\multicommentdepth}{\alignwidth}%
% \setlength{\boxwidth}{\alignwidth}%
% \global\addtolength{\alignwidth}{-\maxdepth}%
% \addtolength{\boxwidth}{.1em}%
% \raisebox{0pt}[0pt][0pt]{%
% \ifthenelse{\boolean{shading}}%
% {\hspace*{-\xmcomlen}\shadebox{\rule[-\boxwidth]{0pt}{0pt}%
% \hspace*{\xmcomlen}\usebox{\alignbox}}}%
% {\usebox{\alignbox}}}%
% \vspace*{\alignwidth}\pagebreak[0]\vspace{-\alignwidth}\par}
% % a multi-line comment, whose first argument is its width in points.
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% THE lcom ENVIRONMENT %
% ^^^^^^^^^^^^^^^^^^^^ %
% A multi-line comment with no text to its left is typeset in an lcom %
% environment, whose argument is a number representing the indentation %
% of the left margin, in points. All the text of the comment should be %
% inside cpar environments. %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newenvironment{lcom}[1]{%
\setlength{\lcomindent}{#1pt} % Added for PlusCal handling.
\par\vspace{.2em}%
\sloppypar
\setcounter{pardepth}{0}%
\footnotesize
\begin{list}{}{%
\setlength{\leftmargin}{#1pt}
\setlength{\labelwidth}{0pt}%
\setlength{\labelsep}{0pt}%
\setlength{\itemindent}{0pt}%
\setlength{\topsep}{0pt}%
\setlength{\parsep}{0pt}%
\setlength{\partopsep}{0pt}%
\setlength{\parskip}{0pt}}
\item[]}%
{\end{list}\vspace{.3em}\setlength{\lcomindent}{0pt}%
}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% THE mcom ENVIRONMENT AND \mutivspace COMMAND %
% ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ %
% %
% A part of the spec containing a right-comment of the form %
% %
% xxxx (*************) %
% yyyy (* ccccccccc *) %
% ... (* ccccccccc *) %
% (* ccccccccc *) %
% (* ccccccccc *) %
% (*************) %
% %
% is typeset by %
% %
% XXXX \begin{mcom}{d} %
% CCCC ... CCC %
% \end{mcom} %
% YYYY ... %
% \multivspace{n} %
% %
% where the number d is the width in points of the comment, n is the %
% number of xxxx, yyyy, ... lines to the left of the comment. %
% All the text of the comment should be typeset in cpar environments. %
% %
% This puts the comment into a single box (so no page breaks can occur %
% within it). The entire box is shaded iff the shading flag is true. %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\newlength{\xmcomlen}%
\newenvironment{mcom}[1]{%
\setcounter{pardepth}{0}%
\hspace{.65em}%
\begin{lrbox}{\alignbox}\sloppypar%
\setboolean{shading}{false}%
\setlength{\boxwidth}{#1pt}%
\addtolength{\boxwidth}{-.65em}%
\begin{minipage}[t]{\boxwidth}\footnotesize
\parskip=0pt\relax}%
{\end{minipage}\end{lrbox}%
\setlength{\xmcomlen}{\textwidth}% % For PlusCal shading
\addtolength{\xmcomlen}{-\wd\alignbox}% % For PlusCal shading
\settodepth{\alignwidth}{\usebox{\alignbox}}%
\global\setlength{\multicommentdepth}{\alignwidth}%
\setlength{\boxwidth}{\alignwidth}% % For PlusCal shading
\global\addtolength{\alignwidth}{-\maxdepth}%
\addtolength{\boxwidth}{.1em}% % For PlusCal shading
\raisebox{0pt}[0pt][0pt]{%
\ifthenelse{\boolean{shading}}%
{\ifpcalshading
\hspace*{-\xmcomlen}%
\shadebox{\rule[-\boxwidth]{0pt}{0pt}\hspace*{\xmcomlen}%
\usebox{\alignbox}}%
\else
\shadebox{\usebox{\alignbox}}
\fi
}%
{\usebox{\alignbox}}}%
\vspace*{\alignwidth}\pagebreak[0]\vspace{-\alignwidth}\par}
% a multi-line comment, whose first argument is its width in points.
% \multispace{n} produces the vertical space indicated by "|"s in
% this situation
%
% xxxx (*************)
% xxxx (* ccccccccc *)
% | (* ccccccccc *)
% | (* ccccccccc *)
% | (* ccccccccc *)
% | (*************)
%
% where n is the number of "xxxx" lines.
\newcommand{\multivspace}[1]{\addtolength{\multicommentdepth}{-#1\baselineskip}%
\addtolength{\multicommentdepth}{1.2em}%
\ifthenelse{\lengthtest{\multicommentdepth > 0pt}}%
{\par\vspace{\multicommentdepth}\par}{}}
%\newenvironment{hpar}[2]{%
% \begin{list}{}{\setlength{\leftmargin}{#1pt}%
% \addtolength{\leftmargin}{#2pt}%
% \setlength{\itemindent}{-#2pt}%
% \setlength{\topsep}{0pt}%
% \setlength{\parsep}{0pt}%
% \setlength{\partopsep}{0pt}%
% \setlength{\parskip}{0pt}%
% \addtolength{\labelsep}{0pt}}%
% \item[]\footnotesize}{\end{list}}
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% % Typesets a sequence of paragraphs like this: %
% % %
% % left |<-- d1 --> XXXXXXXXXXXXXXXXXXXXXXXX %
% % margin | <- d2 -> XXXXXXXXXXXXXXX %
% % | XXXXXXXXXXXXXXX %
% % | %
% % | XXXXXXXXXXXXXXX %
% % | XXXXXXXXXXXXXXX %
% % %
% % where d1 = #1pt and d2 = #2pt, but with no vspace between %
% % paragraphs. %
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Commands for repeated characters that produce dashes. %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% \raisedDash{wd}{ht}{thk} makes a horizontal line wd characters wide,
% raised a distance ht ex's above the baseline, with a thickness of
% thk em's.
\newcommand{\raisedDash}[3]{\raisebox{#2ex}{\setlength{\alignwidth}{.5em}%
\rule{#1\alignwidth}{#3em}}}
% The following commands take a single argument n and produce the
% output for n repeated characters, as follows
% \cdash: -
% \tdash: ~
% \ceqdash: =
% \usdash: _
\newcommand{\cdash}[1]{\raisedDash{#1}{.5}{.04}}
\newcommand{\usdash}[1]{\raisedDash{#1}{0}{.04}}
\newcommand{\ceqdash}[1]{\raisedDash{#1}{.5}{.08}}
\newcommand{\tdash}[1]{\raisedDash{#1}{1}{.08}}
\newlength{\spacewidth}
\setlength{\spacewidth}{.2em}
\newcommand{\e}[1]{\hspace{#1\spacewidth}}
%% \e{i} produces space corresponding to i input spaces.
%% Alignment-file Commands
\newlength{\alignboxwidth}
\newlength{\alignwidth}
\newsavebox{\alignbox}
% \al{i}{j}{txt} is used in the alignment file to put "%{i}{j}{wd}"
% in the log file, where wd is the width of the line up to that point,
% and txt is the following text.
\newcommand{\al}[3]{%
\typeout{\%{#1}{#2}{\the\alignwidth}}%
\cl{#3}}
%% \cl{txt} continues a specification line in the alignment file
%% with text txt.
\newcommand{\cl}[1]{%
\savebox{\alignbox}{\mbox{$\mbox{}#1\mbox{}$}}%
\settowidth{\alignboxwidth}{\usebox{\alignbox}}%
\addtolength{\alignwidth}{\alignboxwidth}%
\usebox{\alignbox}}
% \fl{txt} in the alignment file begins a specification line that
% starts with the text txt.
\newcommand{\fl}[1]{%
\par
\savebox{\alignbox}{\mbox{$\mbox{}#1\mbox{}$}}%
\settowidth{\alignwidth}{\usebox{\alignbox}}%
\usebox{\alignbox}}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Ordinarily, TeX typesets letters in math mode in a special math italic %
% font. This makes it typeset "it" to look like the product of the %
% variables i and t, rather than like the word "it". The following %
% commands tell TeX to use an ordinary italic font instead. %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\ifx\documentclass\undefined
\else
\DeclareSymbolFont{tlaitalics}{\encodingdefault}{cmr}{m}{it}
\let\itfam\symtlaitalics
\fi
\makeatletter
\newcommand{\tlx@c}{\c@tlx@ctr\advance\c@tlx@ctr\@ne}
\newcounter{tlx@ctr}
\c@tlx@ctr=\itfam \multiply\c@tlx@ctr"100\relax \advance\c@tlx@ctr "7061\relax
\mathcode`a=\tlx@c \mathcode`b=\tlx@c \mathcode`c=\tlx@c \mathcode`d=\tlx@c
\mathcode`e=\tlx@c \mathcode`f=\tlx@c \mathcode`g=\tlx@c \mathcode`h=\tlx@c
\mathcode`i=\tlx@c \mathcode`j=\tlx@c \mathcode`k=\tlx@c \mathcode`l=\tlx@c
\mathcode`m=\tlx@c \mathcode`n=\tlx@c \mathcode`o=\tlx@c \mathcode`p=\tlx@c
\mathcode`q=\tlx@c \mathcode`r=\tlx@c \mathcode`s=\tlx@c \mathcode`t=\tlx@c
\mathcode`u=\tlx@c \mathcode`v=\tlx@c \mathcode`w=\tlx@c \mathcode`x=\tlx@c
\mathcode`y=\tlx@c \mathcode`z=\tlx@c
\c@tlx@ctr=\itfam \multiply\c@tlx@ctr"100\relax \advance\c@tlx@ctr "7041\relax
\mathcode`A=\tlx@c \mathcode`B=\tlx@c \mathcode`C=\tlx@c \mathcode`D=\tlx@c
\mathcode`E=\tlx@c \mathcode`F=\tlx@c \mathcode`G=\tlx@c \mathcode`H=\tlx@c
\mathcode`I=\tlx@c \mathcode`J=\tlx@c \mathcode`K=\tlx@c \mathcode`L=\tlx@c
\mathcode`M=\tlx@c \mathcode`N=\tlx@c \mathcode`O=\tlx@c \mathcode`P=\tlx@c
\mathcode`Q=\tlx@c \mathcode`R=\tlx@c \mathcode`S=\tlx@c \mathcode`T=\tlx@c
\mathcode`U=\tlx@c \mathcode`V=\tlx@c \mathcode`W=\tlx@c \mathcode`X=\tlx@c
\mathcode`Y=\tlx@c \mathcode`Z=\tlx@c
\makeatother
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% THE describe ENVIRONMENT %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%
%
% It is like the description environment except it takes an argument
% ARG that should be the text of the widest label. It adjusts the
% indentation so each item with label LABEL produces
%% LABEL blah blah blah
%% <- width of ARG ->blah blah blah
%% blah blah blah
\newenvironment{describe}[1]%
{\begin{list}{}{\settowidth{\labelwidth}{#1}%
\setlength{\labelsep}{.5em}%
\setlength{\leftmargin}{\labelwidth}%
\addtolength{\leftmargin}{\labelsep}%
\addtolength{\leftmargin}{\parindent}%
\def\makelabel##1{\rm ##1\hfill}}%
\setlength{\topsep}{0pt}}%%
% Sets \topsep to 0 to reduce vertical space above
% and below embedded displayed equations
{\end{list}}
% For tlatex.TeX
\usepackage{verbatim}
\makeatletter
\def\tla{\let\%\relax%
\@bsphack
\typeout{\%{\the\linewidth}}%
\let\do\@makeother\dospecials\catcode`\^^M\active
\let\verbatim@startline\relax
\let\verbatim@addtoline\@gobble
\let\verbatim@processline\relax
\let\verbatim@finish\relax
\verbatim@}
\let\endtla=\@esphack
\let\pcal=\tla
\let\endpcal=\endtla
\let\ppcal=\tla
\let\endppcal=\endtla
% The tlatex environment is used by TLATeX.TeX to typeset TLA+.
% TLATeX.TLA starts its files by writing a \tlatex command. This
% command/environment sets \parindent to 0 and defines \% to its
% standard definition because the writing of the log files is messed up
% if \% is defined to be something else. It also executes
% \@computerule to determine the dimensions for the TLA horizonatl
% bars.
\newenvironment{tlatex}{\@computerule%
\setlength{\parindent}{0pt}%
\makeatletter\chardef\%=`\%}{}
% The notla environment produces no output. You can turn a
% tla environment to a notla environment to prevent tlatex.TeX from
% re-formatting the environment.
\def\notla{\let\%\relax%
\@bsphack
\let\do\@makeother\dospecials\catcode`\^^M\active
\let\verbatim@startline\relax
\let\verbatim@addtoline\@gobble
\let\verbatim@processline\relax
\let\verbatim@finish\relax
\verbatim@}
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1Bit.toolbox/1Bit___Model_1.launch 0 → 100644
View file @ 3b4c3b8d
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1Bit.toolbox/1Bit___Model_1_SnapShot_1644430443440.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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1Bit.toolbox/1Bit___Model_1_SnapShot_1644430451766.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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1Bit.toolbox/1Bit___Model_1_SnapShot_1644430485644.launch 0 → 100644
View file @ 3b4c3b8d
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1Bit.toolbox/1Bit___Model_1_SnapShot_1644430510155.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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1Bit.toolbox/1Bit___Model_1_SnapShot_1644430518151.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="0ME!Spec"/>
<listEntry value="1ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/1Bit___Model_1_SnapShot_1644430537188.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.lamport.tla.toolbox.tool.tlc.modelCheck">
<stringAttribute key="TLCCmdLineParameters" value=""/>
<stringAttribute key="alias" value=""/>
<intAttribute key="collectCoverage" value="1"/>
<stringAttribute key="configurationName" value="Model_1_SnapShot_1644430537188"/>
<booleanAttribute key="deferLiveness" value="false"/>
<intAttribute key="dfidDepth" value="100"/>
<booleanAttribute key="dfidMode" value="false"/>
<intAttribute key="distributedFPSetCount" value="0"/>
<stringAttribute key="distributedNetworkInterface" value="192.168.122.1"/>
<intAttribute key="distributedNodesCount" value="1"/>
<stringAttribute key="distributedTLC" value="off"/>
<stringAttribute key="distributedTLCVMArgs" value=""/>
<intAttribute key="fpBits" value="1"/>
<intAttribute key="fpIndex" value="4"/>
<booleanAttribute key="fpIndexRandom" value="true"/>
<intAttribute key="maxHeapSize" value="25"/>
<intAttribute key="maxSetSize" value="1000000"/>
<booleanAttribute key="mcMode" value="true"/>
<stringAttribute key="modelBehaviorInit" value=""/>
<stringAttribute key="modelBehaviorNext" value=""/>
<stringAttribute key="modelBehaviorSpec" value="Spec"/>
<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="0ME!Spec"/>
<listEntry value="1ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/1Bit___Model_1_SnapShot_1644430548616.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.lamport.tla.toolbox.tool.tlc.modelCheck">
<stringAttribute key="TLCCmdLineParameters" value=""/>
<stringAttribute key="alias" value=""/>
<intAttribute key="collectCoverage" value="1"/>
<stringAttribute key="configurationName" value="Model_1_SnapShot_1644430548616"/>
<booleanAttribute key="deferLiveness" value="false"/>
<intAttribute key="dfidDepth" value="100"/>
<booleanAttribute key="dfidMode" value="false"/>
<intAttribute key="distributedFPSetCount" value="0"/>
<stringAttribute key="distributedNetworkInterface" value="192.168.122.1"/>
<intAttribute key="distributedNodesCount" value="1"/>
<stringAttribute key="distributedTLC" value="off"/>
<stringAttribute key="distributedTLCVMArgs" value=""/>
<intAttribute key="fpBits" value="1"/>
<intAttribute key="fpIndex" value="70"/>
<booleanAttribute key="fpIndexRandom" value="true"/>
<intAttribute key="maxHeapSize" value="25"/>
<intAttribute key="maxSetSize" value="1000000"/>
<booleanAttribute key="mcMode" value="true"/>
<stringAttribute key="modelBehaviorInit" value=""/>
<stringAttribute key="modelBehaviorNext" value=""/>
<stringAttribute key="modelBehaviorSpec" value="Spec"/>
<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="0ME!Spec"/>
<listEntry value="0ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/1Bit___Model_1_SnapShot_1644430556719.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.lamport.tla.toolbox.tool.tlc.modelCheck">
<stringAttribute key="TLCCmdLineParameters" value=""/>
<stringAttribute key="alias" value=""/>
<intAttribute key="collectCoverage" value="1"/>
<stringAttribute key="configurationName" value="Model_1_SnapShot_1644430556719"/>
<booleanAttribute key="deferLiveness" value="false"/>
<intAttribute key="dfidDepth" value="100"/>
<booleanAttribute key="dfidMode" value="false"/>
<intAttribute key="distributedFPSetCount" value="0"/>
<stringAttribute key="distributedNetworkInterface" value="192.168.122.1"/>
<intAttribute key="distributedNodesCount" value="1"/>
<stringAttribute key="distributedTLC" value="off"/>
<stringAttribute key="distributedTLCVMArgs" value=""/>
<intAttribute key="fpBits" value="1"/>
<intAttribute key="fpIndex" value="76"/>
<booleanAttribute key="fpIndexRandom" value="true"/>
<intAttribute key="maxHeapSize" value="25"/>
<intAttribute key="maxSetSize" value="1000000"/>
<booleanAttribute key="mcMode" value="true"/>
<stringAttribute key="modelBehaviorInit" value=""/>
<stringAttribute key="modelBehaviorNext" value=""/>
<stringAttribute key="modelBehaviorSpec" value="Spec"/>
<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="1ME!Spec"/>
<listEntry value="0ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/1Bit___Model_1_SnapShot_1644430725151.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.lamport.tla.toolbox.tool.tlc.modelCheck">
<stringAttribute key="TLCCmdLineParameters" value=""/>
<stringAttribute key="alias" value=""/>
<intAttribute key="collectCoverage" value="1"/>
<stringAttribute key="configurationName" value="Model_1_SnapShot_1644430725151"/>
<booleanAttribute key="deferLiveness" value="false"/>
<intAttribute key="dfidDepth" value="100"/>
<booleanAttribute key="dfidMode" value="false"/>
<intAttribute key="distributedFPSetCount" value="0"/>
<stringAttribute key="distributedNetworkInterface" value="192.168.122.1"/>
<intAttribute key="distributedNodesCount" value="1"/>
<stringAttribute key="distributedTLC" value="off"/>
<stringAttribute key="distributedTLCVMArgs" value=""/>
<intAttribute key="fpBits" value="1"/>
<intAttribute key="fpIndex" value="44"/>
<booleanAttribute key="fpIndexRandom" value="true"/>
<intAttribute key="maxHeapSize" value="25"/>
<intAttribute key="maxSetSize" value="1000000"/>
<booleanAttribute key="mcMode" value="true"/>
<stringAttribute key="modelBehaviorInit" value=""/>
<stringAttribute key="modelBehaviorNext" value=""/>
<stringAttribute key="modelBehaviorSpec" value="Spec"/>
<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="0ME!Spec"/>
<listEntry value="1ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/1Bit___Model_1_SnapShot_1644430854275.launch 0 → 100644
View file @ 3b4c3b8d
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.lamport.tla.toolbox.tool.tlc.modelCheck">
<stringAttribute key="TLCCmdLineParameters" value=""/>
<stringAttribute key="alias" value=""/>
<intAttribute key="collectCoverage" value="1"/>
<stringAttribute key="configurationName" value="Model_1_SnapShot_1644430854275"/>
<booleanAttribute key="deferLiveness" value="false"/>
<intAttribute key="dfidDepth" value="100"/>
<booleanAttribute key="dfidMode" value="false"/>
<intAttribute key="distributedFPSetCount" value="0"/>
<stringAttribute key="distributedNetworkInterface" value="192.168.122.1"/>
<intAttribute key="distributedNodesCount" value="1"/>
<stringAttribute key="distributedTLC" value="off"/>
<stringAttribute key="distributedTLCVMArgs" value=""/>
<intAttribute key="fpBits" value="1"/>
<intAttribute key="fpIndex" value="37"/>
<booleanAttribute key="fpIndexRandom" value="true"/>
<intAttribute key="maxHeapSize" value="25"/>
<intAttribute key="maxSetSize" value="1000000"/>
<booleanAttribute key="mcMode" value="true"/>
<stringAttribute key="modelBehaviorInit" value=""/>
<stringAttribute key="modelBehaviorNext" value=""/>
<stringAttribute key="modelBehaviorSpec" value="Spec"/>
<intAttribute key="modelBehaviorSpecType" value="1"/>
<stringAttribute key="modelBehaviorVars" value="flag, pc"/>
<stringAttribute key="modelComments" value=""/>
<booleanAttribute key="modelCorrectnessCheckDeadlock" value="true"/>
<listAttribute key="modelCorrectnessInvariants">
<listEntry value="1ME!MutualExclusion"/>
<listEntry value="1Inv"/>
</listAttribute>
<listAttribute key="modelCorrectnessProperties">
<listEntry value="0ME!Spec"/>
<listEntry value="1ME!Liveness"/>
</listAttribute>
<intAttribute key="modelEditorOpenTabs" value="8"/>
<stringAttribute key="modelExpressionEval" value=""/>
<listAttribute key="modelParameterConstants">
<listEntry value="N;;1;0;0"/>
</listAttribute>
<intAttribute key="modelVersion" value="20191005"/>
<intAttribute key="numberOfWorkers" value="2"/>
<stringAttribute key="postCondition" value=""/>
<booleanAttribute key="recover" value="false"/>
<stringAttribute key="result.mail.address" value=""/>
<intAttribute key="simuAril" value="-1"/>
<intAttribute key="simuDepth" value="100"/>
<stringAttribute key="simuNumTraces" value="9223372036854775807"/>
<intAttribute key="simuSeed" value="-1"/>
<stringAttribute key="specName" value="1Bit"/>
<stringAttribute key="tlcResourcesProfile" value="local custom"/>
<stringAttribute key="view" value=""/>
<booleanAttribute key="visualizeStateGraph" value="true"/>
</launchConfiguration>
1Bit.toolbox/Model_1/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:20:48 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430852007674000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430852007675000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430852007677000
\* Generated on Wed Feb 09 21:20:52 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 37 and seed 2858152806069431466 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79207] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:20:52)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:20:53.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:20:53: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:20:53)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:20:53
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:20:53
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 36, col 17 to line 36, col 44 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:18
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 93
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 38, col 17 to line 38, col 24 of module 1Bit: 75
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 39, col 17 to line 39, col 20 of module 1Bit: 18
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 18
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 18
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:15
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 88
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
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Progress(9) at 2022-02-09 21:20:53: 65 states generated (2 685 s/min), 32 distinct states found (1 322 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1466ms at (2022-02-09 21:20:53)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430852007674000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430852007675000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430852007677000 ==
ME!Liveness
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:20:52 MSK 2022 by kirr
1Bit.toolbox/Model_1/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 37 and seed 2858152806069431466 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79207] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:20:52)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
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@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:20:53.
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@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:20:53: 65 states generated, 32 distinct states found, 0 states left on queue.
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Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:20:53)
@!@!@ENDMSG 2192 @!@!@
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Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
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The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
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@!@!@ENDMSG 2217 @!@!@
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3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
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Finished checking temporal properties in 00s at 2022-02-09 21:20:53
@!@!@ENDMSG 2267 @!@!@
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The coverage statistics at 2022-02-09 21:20:53
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:20:53: 65 states generated (2 685 s/min), 32 distinct states found (1 322 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1466ms at (2022-02-09 21:20:53)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1/Model_1.dot 0 → 100644
View file @ 3b4c3b8d
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1Bit.toolbox/Model_1/Model_1_liveness.dot 0 → 100644
View file @ 3b4c3b8d
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}
\ No newline at end of file
1Bit.toolbox/Model_1/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430443440/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2"} -> "csentry" \* XXX +e3
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:13:48 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430443440/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430441430619000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430441430620000
Inv
\* Generated on Wed Feb 09 21:14:01 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430443440/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 82 and seed -655975556858912913 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78566] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:01)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:02.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:02
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
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||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
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|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
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|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
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||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:02: 65 states generated (3 025 s/min), 32 distinct states found (1 489 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1297ms at (2022-02-09 21:14:02)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430443440/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430441430619000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430441430620000 ==
ME!MutualExclusion
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:14:01 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430443440/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 82 and seed -655975556858912913 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78566] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:01)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:02.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:02
@!@!@ENDMSG 2201 @!@!@
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|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 79, col 8 to line 79, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 25 to line 79, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 26 to line 79, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 44 to line 79, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 44 to line 79, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 56 to line 79, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 56 to line 79, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 70 to line 79, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 17 to line 79, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:02: 65 states generated (3 025 s/min), 32 distinct states found (1 489 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1297ms at (2022-02-09 21:14:02)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430443440/Model_1_SnapShot_1644430443440.dot 0 → 100644
View file @ 3b4c3b8d
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\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430443440/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430451766/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2"} -> "csentry" \* XXX +e3
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:13:48 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430451766/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430449414626000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430449414627000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430449414629000
\* Generated on Wed Feb 09 21:14:09 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430451766/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 119 and seed 5300682053200386809 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78619] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
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Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:09)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:10.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2112:1 @!@!@
Action property line 38, col 12 to line 38, col 24 of module MutualExclusionSpec is violated.
@!@!@ENDMSG 2112 @!@!@
@!@!@STARTMSG 2121:1 @!@!@
The behavior up to this point is:
@!@!@ENDMSG 2121 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e2" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e3" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:10
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
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|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 36, col 17 to line 36, col 44 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 7:11
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 47
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 38, col 17 to line 38, col 24 of module 1Bit: 36
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 39, col 17 to line 39, col 20 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 6:10
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 44
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 43, col 19 to line 43, col 26 of module 1Bit: 34
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 44, col 19 to line 44, col 54 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 4:9
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 39
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 49, col 27 to line 49, col 58 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 49, col 33 to line 49, col 58 of module 1Bit: 3
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 50, col 24 to line 50, col 58 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 7
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 51, col 24 to line 51, col 27 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 0:0
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 53, col 16 to line 53, col 30 of module 1Bit: 29
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 54, col 16 to line 54, col 52 of module 1Bit: 0
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@!@!@STARTMSG 2221:0 @!@!@
line 55, col 16 to line 55, col 50 of module 1Bit: 0
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@!@!@STARTMSG 2772:0 @!@!@
<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 2:4
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 33
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 29
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 0:2
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 31
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 29
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430449414627000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 20
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 83, col 23 to line 85, col 90 of module 1Bit: 109:144
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 83, col 33 to line 83, col 37 of module 1Bit: 109
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 82, col 1 to line 85, col 90 of module 1Bit: 50
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 20
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 80
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 80
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 40
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 40
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 40
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 20
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 79, col 8 to line 79, col 94 of module 1Bit: 20
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 25 to line 79, col 94 of module 1Bit: 40
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 26 to line 79, col 37 of module 1Bit: 40
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 44 to line 79, col 93 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 44 to line 79, col 50 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 56 to line 79, col 92 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 56 to line 79, col 65 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 70 to line 79, col 92 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 17 to line 79, col 21 of module 1Bit: 20
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(7) at 2022-02-09 21:14:10: 30 states generated (1 348 s/min), 20 distinct states found (898 ds/min), 3 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
30 states generated, 20 distinct states found, 3 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 7.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1342ms at (2022-02-09 21:14:10)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430451766/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430449414626000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430449414627000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430449414629000 ==
ME!Spec
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:14:09 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430451766/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 119 and seed 5300682053200386809 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78619] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:09)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:10.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2112:1 @!@!@
Action property line 38, col 12 to line 38, col 24 of module MutualExclusionSpec is violated.
@!@!@ENDMSG 2112 @!@!@
@!@!@STARTMSG 2121:1 @!@!@
The behavior up to this point is:
@!@!@ENDMSG 2121 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e2" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e3" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:10
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 36, col 12 to line 36, col 44 of module 1Bit: 2
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 7:11
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line 38, col 17 to line 38, col 32 of module 1Bit: 47
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line 40, col 17 to line 40, col 51 of module 1Bit: 11
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line 41, col 17 to line 41, col 28 of module 1Bit: 11
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<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 6:10
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line 43, col 19 to line 43, col 36 of module 1Bit: 44
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line 44, col 19 to line 44, col 54 of module 1Bit: 10
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line 45, col 19 to line 45, col 50 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 4:9
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 39
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@!@!@ENDMSG 2221 @!@!@
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line 48, col 19 to line 48, col 30 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
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line 49, col 27 to line 49, col 58 of module 1Bit: 1
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|line 49, col 33 to line 49, col 58 of module 1Bit: 3
@!@!@ENDMSG 2221 @!@!@
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line 50, col 24 to line 50, col 58 of module 1Bit: 6
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 7
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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|line 79, col 17 to line 79, col 21 of module 1Bit: 20
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@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(7) at 2022-02-09 21:14:10: 30 states generated (1 348 s/min), 20 distinct states found (898 ds/min), 3 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
30 states generated, 20 distinct states found, 3 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 7.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1342ms at (2022-02-09 21:14:10)
@!@!@ENDMSG 2186 @!@!@
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-5687246051361371229 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e3\")"];
6355215896392948780 -> 1062096503402119812;
1062096503402119812 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e2\")"];
6355215896392948780 -> 6355215896392948780;
6355215896392948780 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e2\")"];
{rank = same; -8180625305189782138;}
{rank = same; -4383264161169425949;-7609163839008188290;}
{rank = same; -3675294217639243219;9018875693532074086;-7922199982538667910;}
{rank = same; 3988182878549589540;-5035101028236171738;-7793968603789164143;-3874340436594278200;}
{rank = same; 4253599211768313444;-2834413970213349273;3711068830523647112;}
{rank = same; 6355215896392948780;-1929385232942358230;}
}
}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430451766/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430485644/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:14:33 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430485644/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430483467630000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430483467631000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430483467633000
\* Generated on Wed Feb 09 21:14:43 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430485644/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 31 and seed 6430506849743774763 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78688] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:43)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:44.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:44: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking temporal properties for the complete state space with 32 total distinct states at (2022-02-09 21:14:44)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:14:44
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:44
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 36, col 17 to line 36, col 44 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 4:14
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 81
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 38, col 17 to line 38, col 24 of module 1Bit: 67
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 39, col 17 to line 39, col 20 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 8:13
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 78
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 43, col 19 to line 43, col 26 of module 1Bit: 65
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 44, col 19 to line 44, col 54 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 77
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 65
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 49, col 24 to line 49, col 58 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 50, col 24 to line 50, col 58 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 53, col 16 to line 53, col 30 of module 1Bit: 77
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 53, col 16 to line 53, col 23 of module 1Bit: 65
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 54, col 16 to line 54, col 52 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 55, col 16 to line 55, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 6:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 73
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 65
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 73
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 65
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430483467631000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 83, col 23 to line 85, col 90 of module 1Bit: 244:376
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 83, col 33 to line 83, col 37 of module 1Bit: 244
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 82, col 1 to line 85, col 90 of module 1Bit: 97
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 79, col 8 to line 79, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 25 to line 79, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 26 to line 79, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 44 to line 79, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 44 to line 79, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 56 to line 79, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 56 to line 79, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 70 to line 79, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 17 to line 79, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:44: 65 states generated (2 809 s/min), 32 distinct states found (1 383 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1394ms at (2022-02-09 21:14:44)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430485644/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430483467630000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430483467631000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430483467633000 ==
ME!Spec
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:14:43 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430485644/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 31 and seed 6430506849743774763 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78688] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:14:43)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:14:44.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:44: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking temporal properties for the complete state space with 32 total distinct states at (2022-02-09 21:14:44)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:14:44
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:14:44
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 4:14
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line 38, col 17 to line 38, col 32 of module 1Bit: 81
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<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 8:13
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line 43, col 19 to line 43, col 36 of module 1Bit: 78
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line 47, col 16 to line 47, col 30 of module 1Bit: 77
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line 53, col 16 to line 53, col 30 of module 1Bit: 77
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
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line 62, col 18 to line 62, col 34 of module 1Bit: 73
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line 63, col 18 to line 63, col 54 of module 1Bit: 8
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line 64, col 18 to line 64, col 50 of module 1Bit: 8
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<inv_1644430483467631000 line 10, col 1 to line 10, col 23 of module MC>
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line 11, col 1 to line 11, col 18 of module MC: 32
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|line 83, col 23 to line 85, col 90 of module 1Bit: 244:376
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<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
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line 79, col 8 to line 79, col 94 of module 1Bit: 32
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||line 79, col 26 to line 79, col 37 of module 1Bit: 64
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||line 79, col 44 to line 79, col 93 of module 1Bit: 8
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|||line 79, col 44 to line 79, col 50 of module 1Bit: 8
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|||line 79, col 56 to line 79, col 92 of module 1Bit: 8
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:14:44: 65 states generated (2 809 s/min), 32 distinct states found (1 383 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1394ms at (2022-02-09 21:14:44)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430485644/Model_1_SnapShot_1644430485644.dot 0 → 100644
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{rank = same; -8964303785423021614;}
{rank = same; 4530045777437271313;-4023483181235787275;}
{rank = same; -2033649034712785780;-4430473893592713178;-8544194819155234587;}
{rank = same; 4045106221932510508;-2877520370756086329;3676406703460468266;-4886816695501758117;}
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{rank = same; -5327088271902616357;-2439232103282102573;-5278761048179753467;-5899718588920292357;4036052116671491312;-1433128988881287457;}
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{rank = same; -273595742504748242;-8133272252339626888;4729473713143910851;-5848236219372145199;}
{rank = same; -5754328925578825777;-7880734702324856887;}
}
subgraph cluster_legend {graph[style=bold];label = "Next State Actions" style="solid"
node [ labeljust="l",colorscheme="paired12",style=filled,shape=record ]
cs [label="cs",fillcolor=5]
exit [label="exit",fillcolor=6]
enter [label="enter",fillcolor=3]
e2 [label="e2",fillcolor=4]
e3 [label="e3",fillcolor=7]
ncs [label="ncs",fillcolor=2]
}}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430485644/Model_1_liveness.dot 0 → 100644
View file @ 3b4c3b8d
digraph DiskGraph {
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-7880734702324856887 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"ncs\")"];
{rank = same; -8964303785423021614;}
{rank = same; 4530045777437271313;-4023483181235787275;}
{rank = same; -2033649034712785780;-4430473893592713178;-8544194819155234587;}
{rank = same; 4045106221932510508;-2877520370756086329;3676406703460468266;-4886816695501758117;}
{rank = same; -4272457737377053902;-3942143380667776268;2996597356402699211;-2161939503493106014;277764073825938;}
{rank = same; -5327088271902616357;-2439232103282102573;-5278761048179753467;-5899718588920292357;4036052116671491312;-1433128988881287457;}
{rank = same; -6040127771597728796;-8172712548417917753;-4316315513978459668;-6914657696728467550;5378915508399061785;}
{rank = same; -273595742504748242;-8133272252339626888;4729473713143910851;-5848236219372145199;}
{rank = same; -5754328925578825777;-7880734702324856887;}
}
}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430485644/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430510155/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:14:33 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430510155/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430508144637000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430508144638000
Inv
\* Generated on Wed Feb 09 21:15:08 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430510155/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 30 and seed 8284908516444942695 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78747] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:08)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:09.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:09
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 1:1
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 1:2
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 8:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 39, col 17 to line 39, col 20 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 41, col 17 to line 41, col 28 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 44, col 19 to line 44, col 54 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 45, col 19 to line 45, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 8:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
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line 48, col 19 to line 48, col 30 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 49, col 24 to line 49, col 58 of module 1Bit: 8
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line 50, col 24 to line 50, col 58 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
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line 51, col 16 to line 51, col 27 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
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line 53, col 16 to line 53, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 53, col 16 to line 53, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
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line 54, col 16 to line 54, col 52 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 55, col 16 to line 55, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 4:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430508144638000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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|line 79, col 17 to line 79, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:09: 65 states generated (2 947 s/min), 32 distinct states found (1 451 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1330ms at (2022-02-09 21:15:09)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430510155/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430508144637000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430508144638000 ==
ME!MutualExclusion
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:15:08 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430510155/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 30 and seed 8284908516444942695 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78747] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:08)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:09.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:09
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 1:1
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line 35, col 19 to line 35, col 41 of module 1Bit: 1:2
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line 36, col 12 to line 36, col 44 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
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|line 36, col 17 to line 36, col 44 of module 1Bit: 1:2
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@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 8:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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|line 38, col 17 to line 38, col 24 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
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line 39, col 17 to line 39, col 20 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 40, col 17 to line 40, col 51 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 41, col 17 to line 41, col 28 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:12
@!@!@ENDMSG 2772 @!@!@
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line 43, col 19 to line 43, col 36 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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|line 43, col 19 to line 43, col 26 of module 1Bit: 64
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line 44, col 19 to line 44, col 54 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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line 45, col 19 to line 45, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 8:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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|line 47, col 16 to line 47, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
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line 48, col 19 to line 48, col 30 of module 1Bit: 12
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line 49, col 24 to line 49, col 58 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 50, col 24 to line 50, col 58 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
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line 51, col 16 to line 51, col 27 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
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<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
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line 53, col 16 to line 53, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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|line 53, col 16 to line 53, col 23 of module 1Bit: 64
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line 54, col 16 to line 54, col 52 of module 1Bit: 12
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line 55, col 16 to line 55, col 50 of module 1Bit: 12
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<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 4:8
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line 57, col 16 to line 57, col 30 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
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|line 57, col 16 to line 57, col 23 of module 1Bit: 64
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line 58, col 16 to line 58, col 19 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 59, col 16 to line 59, col 49 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 60, col 16 to line 60, col 27 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
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|line 62, col 18 to line 62, col 25 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
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line 63, col 18 to line 63, col 54 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430508144638000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
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|line 83, col 23 to line 85, col 90 of module 1Bit: 32
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|line 82, col 1 to line 85, col 90 of module 1Bit: 32
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|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
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||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
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|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
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|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
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||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
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|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 79, col 8 to line 79, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 25 to line 79, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 26 to line 79, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 44 to line 79, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 44 to line 79, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 56 to line 79, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 56 to line 79, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 70 to line 79, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 17 to line 79, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:09: 65 states generated (2 947 s/min), 32 distinct states found (1 451 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1330ms at (2022-02-09 21:15:09)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430510155/Model_1_SnapShot_1644430510155.dot 0 → 100644
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{rank = same; 2085942450272519150;4944980547195993037;-9199678861996253596;6374315077046870841;}
{rank = same; -5313569148024031452;4120876439759263350;}
}
subgraph cluster_legend {graph[style=bold];label = "Next State Actions" style="solid"
node [ labeljust="l",colorscheme="paired12",style=filled,shape=record ]
cs [label="cs",fillcolor=5]
exit [label="exit",fillcolor=6]
enter [label="enter",fillcolor=3]
e2 [label="e2",fillcolor=4]
e3 [label="e3",fillcolor=7]
ncs [label="ncs",fillcolor=2]
}}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430510155/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430518151/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:14:33 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430518151/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430515753644000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430515753645000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430515753647000
\* Generated on Wed Feb 09 21:15:15 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430518151/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 93 and seed 3026727181919614077 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78796] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:16)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:17.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:17: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:15:17)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
3: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:17
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:17
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 36, col 17 to line 36, col 44 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:17
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 90
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 38, col 17 to line 38, col 24 of module 1Bit: 73
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 39, col 17 to line 39, col 20 of module 1Bit: 17
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 17
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 17
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:14
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 86
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 43, col 19 to line 43, col 26 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 44, col 19 to line 44, col 54 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 84
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 49, col 24 to line 49, col 58 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 50, col 24 to line 50, col 58 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 53, col 16 to line 53, col 30 of module 1Bit: 84
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 53, col 16 to line 53, col 23 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 54, col 16 to line 54, col 52 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 55, col 16 to line 55, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 5:10
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 82
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 10
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 80
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430515753645000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 83, col 23 to line 85, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 82, col 1 to line 85, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 79, col 1 to line 79, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
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line 79, col 8 to line 79, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 25 to line 79, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 26 to line 79, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 79, col 44 to line 79, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 79, col 56 to line 79, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 56 to line 79, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 79, col 70 to line 79, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 79, col 17 to line 79, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:17: 65 states generated (2 706 s/min), 32 distinct states found (1 332 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1458ms at (2022-02-09 21:15:17)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430518151/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430515753644000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430515753645000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430515753647000 ==
ME!Liveness
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:15:15 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430518151/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 93 and seed 3026727181919614077 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78796] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:16)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:17.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:17: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:15:17)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
3: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:17
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:17
@!@!@ENDMSG 2201 @!@!@
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<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:17
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<inv_1644430515753645000 line 10, col 1 to line 10, col 23 of module MC>
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
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Progress(9) at 2022-02-09 21:15:17: 65 states generated (2 706 s/min), 32 distinct states found (1 332 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
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The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1458ms at (2022-02-09 21:15:17)
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#8576019821852960722.2#"];
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#1573756106550850553.2#"];
"-8410849823587358928.1" -> "-8410849823587358928.0";
"-8410849823587358928.0" [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e3\")
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"-8410849823587358928.1" -> "-8410849823587358928.1";
"-8410849823587358928.1" [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e3\")
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"-8410849823587358928.1" -> "8576019821852960722.1";
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}label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"ncs\")
#-8850555836875767044.1#"];
}
}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430518151/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430537188/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--fair algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "7c28162a" /\ chksum(tla) = "b89f1da2")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == /\ Init /\ [][Next]_vars
/\ WF_vars(Next)
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:15:31 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430537188/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430535178648000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430535178649000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430535178651000
\* Generated on Wed Feb 09 21:15:35 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430537188/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 4 and seed 2000308313193243541 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78871] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:35)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:36.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:36: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:15:36)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e3" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
7: <e3 line 53, col 13 to line 55, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
8: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "cs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
9: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "exit")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
2: Back to state: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:36
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:36
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
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||line 36, col 27 to line 36, col 33 of module 1Bit: 2
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:18
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line 38, col 17 to line 38, col 32 of module 1Bit: 104
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line 43, col 19 to line 43, col 36 of module 1Bit: 103
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line 63, col 18 to line 63, col 54 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
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line 64, col 18 to line 64, col 50 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
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<inv_1644430535178649000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
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|line 84, col 23 to line 86, col 90 of module 1Bit: 32
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||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
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|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
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|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
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||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
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<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
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line 80, col 8 to line 80, col 94 of module 1Bit: 32
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:36: 65 states generated (2 733 s/min), 32 distinct states found (1 345 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1442ms at (2022-02-09 21:15:36)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430537188/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430535178648000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430535178649000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430535178651000 ==
ME!Liveness
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:15:35 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430537188/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 4 and seed 2000308313193243541 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78871] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:35)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:36.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:36: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:15:36)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> FALSE)
/\ pc = (0 :> "e2" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e2" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> TRUE @@ 1 :> TRUE)
/\ pc = (0 :> "e3" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
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7: <e3 line 53, col 13 to line 55, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
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8: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
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@!@!@ENDMSG 2217 @!@!@
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9: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "exit")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
2: Back to state: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:36
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:36
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:18
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<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:16
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<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:13
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<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 5:11
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line 57, col 16 to line 57, col 30 of module 1Bit: 90
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line 58, col 16 to line 58, col 19 of module 1Bit: 11
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line 59, col 16 to line 59, col 49 of module 1Bit: 11
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line 60, col 16 to line 60, col 27 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:9
@!@!@ENDMSG 2772 @!@!@
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line 62, col 18 to line 62, col 34 of module 1Bit: 87
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<inv_1644430535178649000 line 10, col 1 to line 10, col 23 of module MC>
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line 11, col 1 to line 11, col 18 of module MC: 32
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<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
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|line 80, col 17 to line 80, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:36: 65 states generated (2 733 s/min), 32 distinct states found (1 345 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1442ms at (2022-02-09 21:15:36)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430537188/Model_1_SnapShot_1644430537188.dot 0 → 100644
View file @ 3b4c3b8d
strict digraph DiskGraph {
edge [colorscheme="paired12"]
nodesep=0.35;
subgraph cluster_graph {
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1Bit.toolbox/Model_1_SnapShot_1644430537188/Model_1_liveness.dot 0 → 100644
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}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430537188/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430548616/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--fair algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "7c28162a" /\ chksum(tla) = "b89f1da2")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == /\ Init /\ [][Next]_vars
/\ WF_vars(Next)
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:15:31 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430548616/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430546606655000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430546606656000
Inv
\* Generated on Wed Feb 09 21:15:46 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430548616/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 70 and seed 335625962150299577 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78923] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:47)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:47.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:47
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 1:1
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 1:2
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
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line 36, col 12 to line 36, col 44 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 1
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 3:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 41, col 17 to line 41, col 28 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 8:12
@!@!@ENDMSG 2772 @!@!@
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line 43, col 19 to line 43, col 36 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 44, col 19 to line 44, col 54 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 10:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 49, col 24 to line 49, col 58 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 50, col 24 to line 50, col 58 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
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line 53, col 16 to line 53, col 30 of module 1Bit: 76
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 54, col 16 to line 54, col 52 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 55, col 16 to line 55, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
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@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430546606656000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 84, col 23 to line 86, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
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@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 80, col 8 to line 80, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 25 to line 80, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 26 to line 80, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 44 to line 80, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 44 to line 80, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 56 to line 80, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 56 to line 80, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 70 to line 80, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 17 to line 80, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:47: 65 states generated (3 025 s/min), 32 distinct states found (1 489 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1301ms at (2022-02-09 21:15:47)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430548616/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430546606655000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430546606656000 ==
ME!MutualExclusion
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:15:46 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430548616/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 70 and seed 335625962150299577 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78923] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:47)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:47.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2193:0 @!@!@
Model checking completed. No error has been found.
Estimates of the probability that TLC did not check all reachable states
because two distinct states had the same fingerprint:
calculated (optimistic): val = 5.7E-17
@!@!@ENDMSG 2193 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:47
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 1:1
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line 53, col 16 to line 53, col 30 of module 1Bit: 76
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line 55, col 16 to line 55, col 50 of module 1Bit: 12
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@!@!@ENDMSG 2772 @!@!@
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line 57, col 16 to line 57, col 30 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
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line 60, col 16 to line 60, col 27 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430546606656000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 84, col 23 to line 86, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
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|line 83, col 1 to line 86, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
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<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 80, col 8 to line 80, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 25 to line 80, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 26 to line 80, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 44 to line 80, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 44 to line 80, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 56 to line 80, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 56 to line 80, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 70 to line 80, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 17 to line 80, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:47: 65 states generated (3 025 s/min), 32 distinct states found (1 489 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2268:0 @!@!@
The average outdegree of the complete state graph is 1 (minimum is 0, the maximum 2 and the 95th percentile is 2).
@!@!@ENDMSG 2268 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1301ms at (2022-02-09 21:15:47)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430548616/Model_1_SnapShot_1644430548616.dot 0 → 100644
View file @ 3b4c3b8d
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node [ labeljust="l",colorscheme="paired12",style=filled,shape=record ]
cs [label="cs",fillcolor=5]
exit [label="exit",fillcolor=7]
enter [label="enter",fillcolor=3]
e2 [label="e2",fillcolor=4]
e3 [label="e3",fillcolor=6]
ncs [label="ncs",fillcolor=2]
}}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430548616/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430556719/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--fair algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "7c28162a" /\ chksum(tla) = "b89f1da2")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == /\ Init /\ [][Next]_vars
/\ WF_vars(Next)
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:15:31 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430556719/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430554364662000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430554365663000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430554365665000
\* Generated on Wed Feb 09 21:15:54 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430556719/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 76 and seed 7718090864724317436 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78975] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:54)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:55.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:55: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking temporal properties for the complete state space with 32 total distinct states at (2022-02-09 21:15:55)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "cs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "exit")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
2: Back to state: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:55
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:55
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:14
@!@!@ENDMSG 2772 @!@!@
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line 38, col 17 to line 38, col 32 of module 1Bit: 89
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@!@!@ENDMSG 2221 @!@!@
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line 39, col 17 to line 39, col 20 of module 1Bit: 14
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line 40, col 17 to line 40, col 51 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 14
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:18
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 91
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 43, col 19 to line 43, col 26 of module 1Bit: 73
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 44, col 19 to line 44, col 54 of module 1Bit: 18
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 18
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:13
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 85
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 72
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 13
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line 49, col 24 to line 49, col 58 of module 1Bit: 8
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@!@!@STARTMSG 2221:0 @!@!@
line 50, col 24 to line 50, col 58 of module 1Bit: 5
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
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line 53, col 16 to line 53, col 30 of module 1Bit: 83
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<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 5:9
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line 57, col 16 to line 57, col 30 of module 1Bit: 80
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line 58, col 16 to line 58, col 19 of module 1Bit: 9
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@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:9
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 79
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 70
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430554365663000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 84, col 23 to line 86, col 90 of module 1Bit: 244:376
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 84, col 33 to line 84, col 37 of module 1Bit: 244
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 83, col 1 to line 86, col 90 of module 1Bit: 97
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 80, col 8 to line 80, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 25 to line 80, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 26 to line 80, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 44 to line 80, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 44 to line 80, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 56 to line 80, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 56 to line 80, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 70 to line 80, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 17 to line 80, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:55: 65 states generated (2 848 s/min), 32 distinct states found (1 402 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1379ms at (2022-02-09 21:15:55)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430556719/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430554364662000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430554365663000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430554365665000 ==
ME!Spec
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:15:54 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430556719/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 76 and seed 7718090864724317436 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 78975] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:15:54)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 1 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:15:55.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:15:55: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking temporal properties for the complete state space with 32 total distinct states at (2022-02-09 21:15:55)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "cs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "exit")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
2: Back to state: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:15:55
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:15:55
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
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End of statistics.
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Progress(9) at 2022-02-09 21:15:55: 65 states generated (2 848 s/min), 32 distinct states found (1 402 ds/min), 0 states left on queue.
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65 states generated, 32 distinct states found, 0 states left on queue.
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The depth of the complete state graph search is 9.
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Finished in 1379ms at (2022-02-09 21:15:55)
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{rank = same; -7533900032052814667;-3568915870172113595;-4250933335396210700;-5835616441049197006;}
{rank = same; 6712711972881168166;-8766391399773016596;7752879455823545502;-6787228893796628969;8851920569126505647;}
{rank = same; -4734358730020332029;4529260692786243806;2293875469432381173;-4650238674329948055;-3417457743136802344;7798642515178381564;}
{rank = same; 1443046615084444532;-7741199525569126999;2898387751023723661;7746763128469735352;-1443774378318819939;}
{rank = same; 3152128076155065661;3423145029900952521;-1512992311993241021;7882495026418781796;}
{rank = same; 6292295775528482716;1721838085270383208;}
}
subgraph cluster_legend {graph[style=bold];label = "Next State Actions" style="solid"
node [ labeljust="l",colorscheme="paired12",style=filled,shape=record ]
cs [label="cs",fillcolor=5]
exit [label="exit",fillcolor=6]
enter [label="enter",fillcolor=3]
e2 [label="e2",fillcolor=4]
e3 [label="e3",fillcolor=7]
ncs [label="ncs",fillcolor=2]
}}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430556719/Model_1_liveness.dot 0 → 100644
View file @ 3b4c3b8d
digraph DiskGraph {
nodesep=0.35;
subgraph cluster_graph {
color="white";
-5844199479782010727 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"ncs\")",style = filled]
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-5736222265815938827 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"enter\")"];
-5844199479782010727 -> -5844199479782010727;
-5844199479782010727 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"ncs\")"];
-5844199479782010727 -> 2937350363632584253;
2937350363632584253 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"ncs\")"];
2937350363632584253 -> -6957647860963232484;
-6957647860963232484 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"enter\")"];
2937350363632584253 -> 2937350363632584253;
2937350363632584253 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"ncs\")"];
2937350363632584253 -> 6213040944845915838;
6213040944845915838 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"ncs\")"];
-5736222265815938827 -> -5736222265815938827;
-5736222265815938827 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"enter\")"];
-5736222265815938827 -> 6045606258322181657;
6045606258322181657 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e2\")"];
-5736222265815938827 -> -6957647860963232484;
-6957647860963232484 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"enter\")"];
6213040944845915838 -> -4250933335396210700;
-4250933335396210700 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"enter\")"];
6213040944845915838 -> -3568915870172113595;
-3568915870172113595 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"ncs\")"];
6213040944845915838 -> 6213040944845915838;
6213040944845915838 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"ncs\")"];
-6957647860963232484 -> -5835616441049197006;
-5835616441049197006 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"e2\")"];
-6957647860963232484 -> -4250933335396210700;
-4250933335396210700 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"enter\")"];
-6957647860963232484 -> -6957647860963232484;
-6957647860963232484 [label="/\\ flag = (0 :> FALSE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"enter\")"];
-3568915870172113595 -> -3568915870172113595;
-3568915870172113595 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"ncs\")"];
-3568915870172113595 -> 6712711972881168166;
6712711972881168166 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"ncs\")"];
-3568915870172113595 -> -8766391399773016596;
-8766391399773016596 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"enter\")"];
-4250933335396210700 -> -4250933335396210700;
-4250933335396210700 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"enter\")"];
-4250933335396210700 -> -8766391399773016596;
-8766391399773016596 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"enter\")"];
-4250933335396210700 -> 8851920569126505647;
8851920569126505647 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"e2\")"];
6045606258322181657 -> -5835616441049197006;
-5835616441049197006 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"e2\")"];
6045606258322181657 -> -7533900032052814667;
-7533900032052814667 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"cs\")"];
6045606258322181657 -> 6045606258322181657;
6045606258322181657 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e2\")"];
6712711972881168166 -> 2293875469432381173;
2293875469432381173 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"enter\")"];
6712711972881168166 -> 6712711972881168166;
6712711972881168166 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"ncs\")"];
6712711972881168166 -> -5844199479782010727;
-5835616441049197006 -> -5835616441049197006;
-5835616441049197006 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"e2\")"];
-5835616441049197006 -> 7752879455823545502;
7752879455823545502 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"cs\")"];
-5835616441049197006 -> 8851920569126505647;
8851920569126505647 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"e2\")"];
-8766391399773016596 -> 2293875469432381173;
2293875469432381173 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"enter\")"];
-8766391399773016596 -> 7798642515178381564;
7798642515178381564 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e2\")"];
-8766391399773016596 -> -8766391399773016596;
-8766391399773016596 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"enter\")"];
8851920569126505647 -> -3417457743136802344;
-3417457743136802344 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"e2\")"];
8851920569126505647 -> 4529260692786243806;
4529260692786243806 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"e3\")"];
8851920569126505647 -> 8851920569126505647;
8851920569126505647 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"e2\")"];
-7533900032052814667 -> -7533900032052814667;
-7533900032052814667 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"cs\")"];
-7533900032052814667 -> -6787228893796628969;
-6787228893796628969 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"exit\")"];
-7533900032052814667 -> 7752879455823545502;
7752879455823545502 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"cs\")"];
2293875469432381173 -> -5736222265815938827;
2293875469432381173 -> 2293875469432381173;
2293875469432381173 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"enter\")"];
2293875469432381173 -> 7746763128469735352;
7746763128469735352 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e2\")"];
7752879455823545502 -> -4734358730020332029;
-4734358730020332029 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"cs\")"];
7752879455823545502 -> -4650238674329948055;
-4650238674329948055 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"exit\")"];
7752879455823545502 -> 7752879455823545502;
7752879455823545502 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"cs\")"];
-3417457743136802344 -> -5835616441049197006;
-3417457743136802344 -> -3417457743136802344;
-3417457743136802344 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"e2\")"];
-3417457743136802344 -> -7741199525569126999;
-7741199525569126999 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"e3\")"];
7798642515178381564 -> 7746763128469735352;
7746763128469735352 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e2\")"];
7798642515178381564 -> 7798642515178381564;
7798642515178381564 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e2\")"];
7798642515178381564 -> 2898387751023723661;
2898387751023723661 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e3\")"];
4529260692786243806 -> -4250933335396210700;
4529260692786243806 -> -7741199525569126999;
-7741199525569126999 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"e3\")"];
4529260692786243806 -> 4529260692786243806;
4529260692786243806 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"e3\")"];
-6787228893796628969 -> -6787228893796628969;
-6787228893796628969 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"exit\")"];
-6787228893796628969 -> -4650238674329948055;
-4650238674329948055 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"exit\")"];
-6787228893796628969 -> -5844199479782010727;
7746763128469735352 -> 7746763128469735352;
7746763128469735352 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e2\")"];
7746763128469735352 -> 6045606258322181657;
7746763128469735352 -> 3423145029900952521;
3423145029900952521 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e3\")"];
-4734358730020332029 -> -4734358730020332029;
-4734358730020332029 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"cs\")"];
-4734358730020332029 -> 1443046615084444532;
1443046615084444532 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"cs\")"];
-4734358730020332029 -> -1443774378318819939;
-1443774378318819939 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"exit\")"];
-4650238674329948055 -> -4650238674329948055;
-4650238674329948055 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"exit\")"];
-4650238674329948055 -> -1443774378318819939;
-1443774378318819939 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"exit\")"];
-4650238674329948055 -> 2937350363632584253;
-7741199525569126999 -> -1512992311993241021;
-1512992311993241021 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"e3\")"];
-7741199525569126999 -> 7882495026418781796;
7882495026418781796 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"enter\")"];
-7741199525569126999 -> -7741199525569126999;
-7741199525569126999 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"e3\")"];
2898387751023723661 -> 3423145029900952521;
3423145029900952521 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e3\")"];
2898387751023723661 -> -8766391399773016596;
2898387751023723661 -> 2898387751023723661;
2898387751023723661 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"cs\" @@ 1 :> \"e3\")"];
3423145029900952521 -> 2293875469432381173;
3423145029900952521 -> 1721838085270383208;
1721838085270383208 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e3\")"];
3423145029900952521 -> 3423145029900952521;
3423145029900952521 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"exit\" @@ 1 :> \"e3\")"];
1443046615084444532 -> 1443046615084444532;
1443046615084444532 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"cs\")"];
1443046615084444532 -> 3152128076155065661;
3152128076155065661 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"exit\")"];
1443046615084444532 -> 7752879455823545502;
-1443774378318819939 -> 3152128076155065661;
3152128076155065661 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"exit\")"];
-1443774378318819939 -> 6213040944845915838;
-1443774378318819939 -> -1443774378318819939;
-1443774378318819939 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e2\" @@ 1 :> \"exit\")"];
-1512992311993241021 -> -1512992311993241021;
-1512992311993241021 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"enter\" @@ 1 :> \"e3\")"];
-1512992311993241021 -> -6957647860963232484;
-1512992311993241021 -> 4529260692786243806;
1721838085270383208 -> -1512992311993241021;
1721838085270383208 -> -5736222265815938827;
1721838085270383208 -> 1721838085270383208;
1721838085270383208 [label="/\\ flag = (0 :> FALSE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"ncs\" @@ 1 :> \"e3\")"];
7882495026418781796 -> 7882495026418781796;
7882495026418781796 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"enter\")"];
7882495026418781796 -> -3417457743136802344;
7882495026418781796 -> -6957647860963232484;
3152128076155065661 -> -4650238674329948055;
3152128076155065661 -> 6292295775528482716;
6292295775528482716 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"ncs\")"];
3152128076155065661 -> 3152128076155065661;
3152128076155065661 [label="/\\ flag = (0 :> TRUE @@ 1 :> TRUE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"exit\")"];
6292295775528482716 -> 7882495026418781796;
6292295775528482716 -> 6292295775528482716;
6292295775528482716 [label="/\\ flag = (0 :> TRUE @@ 1 :> FALSE)\n/\\ pc = (0 :> \"e3\" @@ 1 :> \"ncs\")"];
6292295775528482716 -> 2937350363632584253;
{rank = same; -5844199479782010727;}
{rank = same; 2937350363632584253;-5736222265815938827;}
{rank = same; -6957647860963232484;6213040944845915838;6045606258322181657;}
{rank = same; -7533900032052814667;-3568915870172113595;-4250933335396210700;-5835616441049197006;}
{rank = same; 6712711972881168166;-8766391399773016596;7752879455823545502;-6787228893796628969;8851920569126505647;}
{rank = same; -4734358730020332029;4529260692786243806;2293875469432381173;-4650238674329948055;-3417457743136802344;7798642515178381564;}
{rank = same; 1443046615084444532;-7741199525569126999;2898387751023723661;7746763128469735352;-1443774378318819939;}
{rank = same; 3152128076155065661;3423145029900952521;-1512992311993241021;7882495026418781796;}
{rank = same; 6292295775528482716;1721838085270383208;}
}
}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430556719/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430725151/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--fair algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "7c28162a" /\ chksum(tla) = "b89f1da2")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == /\ Init /\ [][Next]_vars
/\ WF_vars(Next)
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:15:31 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430725151/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430722260670000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430722260671000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430722260673000
\* Generated on Wed Feb 09 21:18:42 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430725151/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 44 and seed 3585913388356632348 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79087] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:18:42)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:18:43.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:18:43: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:18:43)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "cs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "exit")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
7: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
3: Back to state: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:18:43
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:18:43
@!@!@ENDMSG 2201 @!@!@
@!@!@STARTMSG 2773:0 @!@!@
<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
@!@!@ENDMSG 2773 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
line 35, col 19 to line 35, col 41 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 35, col 26 to line 35, col 30 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 36, col 12 to line 36, col 44 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2775:0 @!@!@
|line 36, col 17 to line 36, col 44 of module 1Bit: 2:4
@!@!@ENDMSG 2775 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 36, col 27 to line 36, col 33 of module 1Bit: 2
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:19
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 38, col 17 to line 38, col 32 of module 1Bit: 104
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 38, col 17 to line 38, col 24 of module 1Bit: 85
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 39, col 17 to line 39, col 20 of module 1Bit: 19
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 40, col 17 to line 40, col 51 of module 1Bit: 19
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 41, col 17 to line 41, col 28 of module 1Bit: 19
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:21
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 43, col 19 to line 43, col 36 of module 1Bit: 103
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 43, col 19 to line 43, col 26 of module 1Bit: 82
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 44, col 19 to line 44, col 54 of module 1Bit: 21
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 45, col 19 to line 45, col 50 of module 1Bit: 21
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:13
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 47, col 16 to line 47, col 30 of module 1Bit: 94
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 16 to line 47, col 23 of module 1Bit: 81
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 48, col 19 to line 48, col 30 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 49, col 24 to line 49, col 58 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 50, col 24 to line 50, col 58 of module 1Bit: 5
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 51, col 16 to line 51, col 27 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 53, col 16 to line 53, col 30 of module 1Bit: 92
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 53, col 16 to line 53, col 23 of module 1Bit: 80
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 54, col 16 to line 54, col 52 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 55, col 16 to line 55, col 50 of module 1Bit: 12
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 5:11
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 57, col 16 to line 57, col 30 of module 1Bit: 91
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 57, col 16 to line 57, col 23 of module 1Bit: 80
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 58, col 16 to line 58, col 19 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 59, col 16 to line 59, col 49 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 60, col 16 to line 60, col 27 of module 1Bit: 11
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2772:0 @!@!@
<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:9
@!@!@ENDMSG 2772 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 62, col 18 to line 62, col 34 of module 1Bit: 88
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 62, col 18 to line 62, col 25 of module 1Bit: 79
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 63, col 18 to line 63, col 54 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 64, col 18 to line 64, col 50 of module 1Bit: 9
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<inv_1644430722260671000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 11, col 1 to line 11, col 18 of module MC: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 84, col 23 to line 86, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 83, col 1 to line 86, col 90 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 47, col 20 to line 47, col 84 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 38 to line 47, col 84 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 39 to line 47, col 44 of module MutualExclusionSpec: 128
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 47, col 50 to line 47, col 84 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 47, col 52 to line 47, col 83 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 53 to line 47, col 64 of module MutualExclusionSpec: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||||line 47, col 71 to line 47, col 82 of module MutualExclusionSpec: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 47, col 31 to line 47, col 35 of module MutualExclusionSpec: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2774:0 @!@!@
<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
@!@!@ENDMSG 2774 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
line 80, col 8 to line 80, col 94 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 25 to line 80, col 94 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 26 to line 80, col 37 of module 1Bit: 64
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||line 80, col 44 to line 80, col 93 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 44 to line 80, col 50 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|||line 80, col 56 to line 80, col 92 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 56 to line 80, col 65 of module 1Bit: 8
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
||||line 80, col 70 to line 80, col 92 of module 1Bit: 4
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2221:0 @!@!@
|line 80, col 17 to line 80, col 21 of module 1Bit: 32
@!@!@ENDMSG 2221 @!@!@
@!@!@STARTMSG 2202:0 @!@!@
End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:18:43: 65 states generated (2 565 s/min), 32 distinct states found (1 263 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1536ms at (2022-02-09 21:18:43)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430725151/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430722260670000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430722260671000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430722260673000 ==
ME!Liveness
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:18:42 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430725151/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 44 and seed 3585913388356632348 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79087] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:18:42)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:18:43.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:18:43: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:18:43)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
4: <enter line 43, col 16 to line 45, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "e2")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
5: <e2 line 47, col 13 to line 51, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
/\ pc = (0 :> "enter" @@ 1 :> "cs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
6: <cs line 57, col 13 to line 60, col 27 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> TRUE)
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
7: <exit line 62, col 15 to line 64, col 50 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2122:4 @!@!@
3: Back to state: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
@!@!@ENDMSG 2122 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:18:43
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:18:43
@!@!@ENDMSG 2201 @!@!@
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<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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line 36, col 12 to line 36, col 44 of module 1Bit: 2
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<ncs line 38, col 1 to line 38, col 9 of module 1Bit>: 6:19
@!@!@ENDMSG 2772 @!@!@
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line 38, col 17 to line 38, col 32 of module 1Bit: 104
@!@!@ENDMSG 2221 @!@!@
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line 39, col 17 to line 39, col 20 of module 1Bit: 19
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<enter line 43, col 1 to line 43, col 11 of module 1Bit>: 7:21
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line 43, col 19 to line 43, col 36 of module 1Bit: 103
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line 44, col 19 to line 44, col 54 of module 1Bit: 21
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line 45, col 19 to line 45, col 50 of module 1Bit: 21
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<e2 line 47, col 1 to line 47, col 8 of module 1Bit>: 9:13
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line 47, col 16 to line 47, col 30 of module 1Bit: 94
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line 51, col 16 to line 51, col 27 of module 1Bit: 13
@!@!@ENDMSG 2221 @!@!@
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<e3 line 53, col 1 to line 53, col 8 of module 1Bit>: 2:12
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line 53, col 16 to line 53, col 30 of module 1Bit: 92
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<cs line 57, col 1 to line 57, col 8 of module 1Bit>: 5:11
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:9
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line 63, col 18 to line 63, col 54 of module 1Bit: 9
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line 64, col 18 to line 64, col 50 of module 1Bit: 9
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<inv_1644430722260671000 line 10, col 1 to line 10, col 23 of module MC>
@!@!@ENDMSG 2774 @!@!@
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line 11, col 1 to line 11, col 18 of module MC: 32
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<Inv line 80, col 1 to line 80, col 3 of module 1Bit>
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line 80, col 8 to line 80, col 94 of module 1Bit: 32
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@!@!@ENDMSG 2221 @!@!@
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@!@!@ENDMSG 2221 @!@!@
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End of statistics.
@!@!@ENDMSG 2202 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:18:43: 65 states generated (2 565 s/min), 32 distinct states found (1 263 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
@!@!@STARTMSG 2194:0 @!@!@
The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
@!@!@STARTMSG 2186:0 @!@!@
Finished in 1536ms at (2022-02-09 21:18:43)
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exit [label="exit",fillcolor=6]
enter [label="enter",fillcolor=3]
e2 [label="e2",fillcolor=4]
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ncs [label="ncs",fillcolor=2]
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1Bit.toolbox/Model_1_SnapShot_1644430725151/Model_1_liveness.dot 0 → 100644
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}
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430725151/MutualExclusionSpec.tla 0 → 100644
View file @ 3b4c3b8d
------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430854275/1Bit.tla 0 → 100644
View file @ 3b4c3b8d
-------------------------------- MODULE 1Bit --------------------------------
\* 1Bit implementation of mutual exclusion
EXTENDS Integers
CONSTANT N
ASSUME N \in Nat
Procs == 0..N
(********
--algorithm 1BitProtocol {
variables flag = [i \in Procs |-> FALSE] ;
process (P \in Procs) {
ncs: while (TRUE) {
skip ;
enter: flag[self] := TRUE ;
e2: if (flag[1-self]) {
e3: flag[self] := FALSE;
goto enter;
};
cs: skip ;
exit: flag[self] := FALSE ;
}
}
}
********)
\* BEGIN TRANSLATION (chksum(pcal) = "b33e7cec" /\ chksum(tla) = "338dfe4c")
VARIABLES flag, pc
vars == << flag, pc >>
ProcSet == (Procs)
Init == (* Global variables *)
/\ flag = [i \in Procs |-> FALSE]
/\ pc = [self \in ProcSet |-> "ncs"]
ncs(self) == /\ pc[self] = "ncs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "enter"]
/\ flag' = flag
enter(self) == /\ pc[self] = "enter"
/\ flag' = [flag EXCEPT ![self] = TRUE]
/\ pc' = [pc EXCEPT ![self] = "e2"]
e2(self) == /\ pc[self] = "e2"
/\ IF flag[1-self]
THEN /\ pc' = [pc EXCEPT ![self] = "e3"]
ELSE /\ pc' = [pc EXCEPT ![self] = "cs"]
/\ flag' = flag
e3(self) == /\ pc[self] = "e3"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "enter"]
cs(self) == /\ pc[self] = "cs"
/\ TRUE
/\ pc' = [pc EXCEPT ![self] = "exit"]
/\ flag' = flag
exit(self) == /\ pc[self] = "exit"
/\ flag' = [flag EXCEPT ![self] = FALSE]
/\ pc' = [pc EXCEPT ![self] = "ncs"]
P(self) == ncs(self) \/ enter(self) \/ e2(self) \/ e3(self) \/ cs(self)
\/ exit(self)
Next == (\E self \in Procs: P(self))
Spec == Init /\ [][Next]_vars
\* END TRANSLATION
--------
\* Invariant which implies MutualExclusion
\*Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] = "e2"))
Inv == \A i \in Procs : (pc[i] = "cs") => (flag[i] /\ (~flag[1-i] \/ pc[1-i] \in {"e2","e3"}))
ME == INSTANCE MutualExclusionSpec WITH
pc <- [proc \in Procs |-> CASE pc[proc] = "cs" -> "cs"
[] pc[proc] \in {"enter","e2","e3"} -> "csentry"
[] OTHER -> "non-cs"]
THEOREM Spec => ME!Spec
THEOREM Spec => []ME!MutualExclusion
THEOREM Spec => ME!Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 21:20:48 MSK 2022 by kirr
\* Created Wed Feb 09 20:01:56 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430854275/MC.cfg 0 → 100644
View file @ 3b4c3b8d
\* CONSTANT definitions
CONSTANT
N <- const_1644430852007674000
\* SPECIFICATION definition
SPECIFICATION
Spec
\* INVARIANT definition
INVARIANT
inv_1644430852007675000
Inv
\* PROPERTY definition
PROPERTY
prop_1644430852007677000
\* Generated on Wed Feb 09 21:20:52 MSK 2022
\ No newline at end of file
1Bit.toolbox/Model_1_SnapShot_1644430854275/MC.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 37 and seed 2858152806069431466 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79207] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:20:52)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:20:53.
@!@!@ENDMSG 2190 @!@!@
@!@!@STARTMSG 2200:0 @!@!@
Progress(9) at 2022-02-09 21:20:53: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:20:53)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
@!@!@STARTMSG 2264:1 @!@!@
The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
1: <Initial predicate>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "ncs" @@ 1 :> "ncs")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
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@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2217:4 @!@!@
3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:20:53
@!@!@ENDMSG 2267 @!@!@
@!@!@STARTMSG 2201:0 @!@!@
The coverage statistics at 2022-02-09 21:20:53
@!@!@ENDMSG 2201 @!@!@
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<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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<exit line 62, col 1 to line 62, col 10 of module 1Bit>: 2:8
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Progress(9) at 2022-02-09 21:20:53: 65 states generated (2 685 s/min), 32 distinct states found (1 322 ds/min), 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2199:0 @!@!@
65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
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The depth of the complete state graph search is 9.
@!@!@ENDMSG 2194 @!@!@
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Finished in 1466ms at (2022-02-09 21:20:53)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430854275/MC.tla 0 → 100644
View file @ 3b4c3b8d
---- MODULE MC ----
EXTENDS 1Bit, TLC
\* CONSTANT definitions @modelParameterConstants:0N
const_1644430852007674000 ==
1
----
\* INVARIANT definition @modelCorrectnessInvariants:0
inv_1644430852007675000 ==
ME!MutualExclusion
----
\* PROPERTY definition @modelCorrectnessProperties:0
prop_1644430852007677000 ==
ME!Liveness
----
=============================================================================
\* Modification History
\* Created Wed Feb 09 21:20:52 MSK 2022 by kirr
1Bit.toolbox/Model_1_SnapShot_1644430854275/MC_TE.out 0 → 100644
View file @ 3b4c3b8d
@!@!@STARTMSG 2262:0 @!@!@
TLC2 Version 2.16 of Day Month 20?? (rev: 9310ee7)
@!@!@ENDMSG 2262 @!@!@
@!@!@STARTMSG 2187:0 @!@!@
Running breadth-first search Model-Checking with fp 37 and seed 2858152806069431466 with 2 workers on 4 cores with 1161MB heap and 2608MB offheap memory [pid: 79207] (Linux 5.10.0-10-amd64 amd64, AdoptOpenJDK 14.0.1 x86_64, OffHeapDiskFPSet, DiskStateQueue).
@!@!@ENDMSG 2187 @!@!@
@!@!@STARTMSG 2220:0 @!@!@
Starting SANY...
@!@!@ENDMSG 2220 @!@!@
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MC.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/1Bit.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/TLC.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Integers.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Naturals.tla
Parsing file /home/kirr/study/tla+/pluscal/ME/1Bit.toolbox/Model_1/MutualExclusionSpec.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/Sequences.tla
Parsing file /home/kirr/src/tools/tla+/bin/toolbox/plugins/org.lamport.tlatools_1.0.0.202201240352/tla2sany/StandardModules/FiniteSets.tla
Semantic processing of module Naturals
Semantic processing of module Integers
Semantic processing of module MutualExclusionSpec
Semantic processing of module 1Bit
Semantic processing of module Sequences
Semantic processing of module FiniteSets
Semantic processing of module TLC
Semantic processing of module MC
@!@!@STARTMSG 2219:0 @!@!@
SANY finished.
@!@!@ENDMSG 2219 @!@!@
@!@!@STARTMSG 2185:0 @!@!@
Starting... (2022-02-09 21:20:52)
@!@!@ENDMSG 2185 @!@!@
@!@!@STARTMSG 2212:0 @!@!@
Implied-temporal checking--satisfiability problem has 4 branches.
@!@!@ENDMSG 2212 @!@!@
@!@!@STARTMSG 2189:0 @!@!@
Computing initial states...
@!@!@ENDMSG 2189 @!@!@
@!@!@STARTMSG 2190:0 @!@!@
Finished computing initial states: 1 distinct state generated at 2022-02-09 21:20:53.
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Progress(9) at 2022-02-09 21:20:53: 65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2200 @!@!@
@!@!@STARTMSG 2192:0 @!@!@
Checking 4 branches of temporal properties for the complete state space with 128 total distinct states at (2022-02-09 21:20:53)
@!@!@ENDMSG 2192 @!@!@
@!@!@STARTMSG 2116:1 @!@!@
Temporal properties were violated.
@!@!@ENDMSG 2116 @!@!@
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The following behavior constitutes a counter-example:
@!@!@ENDMSG 2264 @!@!@
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1: <Initial predicate>
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2: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
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@!@!@ENDMSG 2217 @!@!@
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3: <ncs line 38, col 14 to line 41, col 28 of module 1Bit>
/\ flag = (0 :> FALSE @@ 1 :> FALSE)
/\ pc = (0 :> "enter" @@ 1 :> "enter")
@!@!@ENDMSG 2217 @!@!@
@!@!@STARTMSG 2218:4 @!@!@
4: Stuttering
@!@!@ENDMSG 2218 @!@!@
@!@!@STARTMSG 2267:0 @!@!@
Finished checking temporal properties in 00s at 2022-02-09 21:20:53
@!@!@ENDMSG 2267 @!@!@
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The coverage statistics at 2022-02-09 21:20:53
@!@!@ENDMSG 2201 @!@!@
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<Init line 34, col 1 to line 34, col 4 of module 1Bit>: 2:2
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End of statistics.
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Progress(9) at 2022-02-09 21:20:53: 65 states generated (2 685 s/min), 32 distinct states found (1 322 ds/min), 0 states left on queue.
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65 states generated, 32 distinct states found, 0 states left on queue.
@!@!@ENDMSG 2199 @!@!@
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The depth of the complete state graph search is 9.
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@!@!@STARTMSG 2186:0 @!@!@
Finished in 1466ms at (2022-02-09 21:20:53)
@!@!@ENDMSG 2186 @!@!@
1Bit.toolbox/Model_1_SnapShot_1644430854275/Model_1_SnapShot_1644430854275.dot 0 → 100644
View file @ 3b4c3b8d
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1Bit.toolbox/Model_1_SnapShot_1644430854275/MutualExclusionSpec.tla 0 → 100644
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------------------------ MODULE MutualExclusionSpec ------------------------
\* Module MutualExclusionSpec provides general specification for mutual-exclusion problem.
\* Procs is set of processes.
\* Every process is assumed to loop and enter into "cs" state on every interation.
\* Non-critical state is represented as "non-cs".
\* When process decides it want to enter into critical-section, it first goes into "csentry" state.
CONSTANT Procs
VARIABLES pc
TypeOK == pc \in [Procs -> {"non-cs", "csentry", "cs"}]
vars == <<pc>>
\* All processes start from non-critical section.
Init == pc \in [Procs -> {"non-cs"}]
\* WantCS(proc) is action when proc decides that it wants to enter into critical section.
WantCS(proc) ==
/\ pc[proc] = "non-cs"
/\ pc' = [pc EXCEPT ![proc] = "csentry"]
\* EnterCS(proc) is action when proc enters critical section.
EnterCS(proc) ==
/\ pc[proc] = "csentry"
/\ \A i \in Procs \ {proc} : pc[i] /= "cs"
/\ pc' = [pc EXCEPT ![proc] = "cs"]
\* ExitCS(proc) is action when proc leaves critical section.
ExitCS(proc) ==
/\ pc[proc] = "cs"
/\ pc' = [pc EXCEPT ![proc] = "non-cs"]
Next == \E i \in Procs: WantCS(i) \/ EnterCS(i) \/ ExitCS(i)
Spec == /\ Init
/\ [][Next]_vars
/\ \A i \in Procs: ( \* fairness
\* not fair for WantCS - it can pause and even hang there
/\ SF_vars(EnterCS(i))
/\ SF_vars(ExitCS(i)))
----------------
\* MutualExclusion is invariant indicating that no two processes can be inside critical section at the same time.
MutualExclusion == \A i,j \in Procs: (i /= j) => ~((pc[i] = "cs") /\ (pc[j] = "cs"))
\* Liveness is temporal property indicating that every process has a chance to enter critical section and leaves it.
Liveness == \A i \in Procs:
/\ (pc[i] = "csentry") ~> (pc[i] = "cs")
/\ (pc[i] = "cs") ~> (pc[i] = "non-cs")
THEOREM Spec => []TypeOK
THEOREM Spec => []MutualExclusion
THEOREM Spec => Liveness
=============================================================================
\* Modification History
\* Last modified Wed Feb 09 19:11:11 MSK 2022 by kirr
\* Created Wed Feb 09 13:11:29 MSK 2022 by kirr
Alternate.pdf
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\.{=}\@w{cs} ]}%
\@x{\@s{66.53} \.{\land} turn \.{'} \.{=} turn}%
\@pvspace{8.0pt}%
\@x{ cs ( self ) \.{\defeq} \.{\land} pc [ self ]\@s{4.27} \.{=}\@w{cs}}%
\@x{\@s{52.60} \.{\land} {\TRUE}}%
\@x{\@s{52.60} \.{\land} pc \.{'} \.{=} [ pc {\EXCEPT} {\bang} [ self ]
\.{=}\@w{exit} ]}%
\@x{\@s{52.60} \.{\land} turn \.{'} \.{=} turn}%
\@pvspace{8.0pt}%
\@x{ exit ( self ) \.{\defeq} \.{\land} pc [ self ] \.{=}\@w{exit}}%
\@x{\@s{59.67} \.{\land} turn \.{'} \.{=} ( ( self \.{+} 1 ) \.{\%} NProcs )}%
\@x{\@s{59.67} \.{\land} pc \.{'} \.{=} [ pc {\EXCEPT} {\bang} [ self ]
\.{=}\@w{ncs} ]}%
\@pvspace{8.0pt}%
\@x{ p ( self ) \.{\defeq} ncs ( self ) \.{\lor} enter ( self ) \.{\lor} cs (
self ) \.{\lor} exit ( self )}%
\@pvspace{8.0pt}%
\@x{ Next \.{\defeq} ( \E\, self \.{\in} Procs \.{:} p ( self ) )}%
\@pvspace{8.0pt}%
\@x{ Spec\@s{1.46} \.{\defeq} \.{\land} Init \.{\land} {\Box} [ Next ]_{
vars}}%
\@x{\@s{39.83} \.{\land} {\WF}_{ vars} ( Next )}%
\@pvspace{8.0pt}%
\@x{}%
\@y{\@s{0}%
END TRANSLATION
}%
\@xx{}%
\@pvspace{16.0pt}%
\@x{}\midbar\@xx{}% \@x{}\midbar\@xx{}%
\@pvspace{24.0pt}% \@pvspace{24.0pt}%
\@x{ PC2ME ( xpc ) \.{\defeq} [ proc \.{\in} Procs\@s{4.1} \@x{ ME \.{\defeq} {\INSTANCE} MutualExclusionSpec {\WITH}}%
\.{\mapsto}\@s{4.1} {\IF} xpc [ proc ] \.{=}\@w{cs} \.{\THEN}\@w{cs}}% \@x{\@s{86.45} pc \.{\leftarrow} [ proc \.{\in} Procs\@s{4.1}
\@x{\@s{243.76} \.{\ELSE}\@w{non{-}cs} ]}% \.{\mapsto}\@s{4.1} {\CASE} pc [ proc ] \.{=}\@w{cs}\@s{16.90}
\@pvspace{8.0pt}% \.{\rightarrow}\@s{4.1}\@w{cs}}%
\@x{ ME \.{\defeq} {\INSTANCE} MutualExclusionSpec {\WITH} pc \.{\leftarrow} \@x{\@s{203.01} {\Box}\@s{10.30} pc [ proc ] \.{=}\@w{enter}\@s{4.10}
PC2ME ( pc )}% \.{\rightarrow}\@s{4.09}\@w{csentry}}%
\@x{\@s{203.01} {\Box}\@s{10.30} {\OTHER}\@s{48.64}
\.{\rightarrow}\@s{4.1}\@w{non{-}cs} ]}%
\@pvspace{8.0pt}% \@pvspace{8.0pt}%
\@x{ {\THEOREM} Spec \.{\implies} ME {\bang} Spec}% \@x{ {\THEOREM} Spec \.{\implies} ME {\bang} Spec}%
\@x{ {\THEOREM} Spec \.{\implies} {\Box} ME {\bang} MutualExclusion}% \@x{ {\THEOREM} Spec \.{\implies} {\Box} ME {\bang} MutualExclusion}%
...@@ -1037,7 +1098,7 @@ ...@@ -1037,7 +1098,7 @@
\end{cpar}% \end{cpar}%
\begin{cpar}{0}{F}{F}{0}{0}{}% \begin{cpar}{0}{F}{F}{0}{0}{}%
\ensuremath{\.{\,\backslash\,}\.{*}} Last modified \ensuremath{Wed} \ensuremath{\.{\,\backslash\,}\.{*}} Last modified \ensuremath{Wed}
\ensuremath{Feb} 09 17:49:27 \ensuremath{MSK} 2022 by \ensuremath{kirr \ensuremath{Feb} 09 19:58:34 \ensuremath{MSK} 2022 by \ensuremath{kirr
}% }%
\end{cpar}% \end{cpar}%
\begin{cpar}{0}{F}{F}{0}{0}{}% \begin{cpar}{0}{F}{F}{0}{0}{}%
......
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