[PATCH] alpha titan update

From Jeff.Wiedemeier@hp.com:

Update titan system support include AlphaServer DS25, AGP,
enhanced machine check handling.

arch/alpha/Kconfig

@@ -75,7 +75,7 @@ choice
 	  Sable               AS 2000, AS 2100
 	  Shark		      DS 20L
 	  Takara              Takara
-	  Titan               Privateer
+	  Titan               AlphaServer ES45 / DS25
 	  Wildfire            AlphaServer GS 40/80/160/320
 
 	  If you don't know what to do, choose "generic".
@@ -238,6 +238,8 @@ config ALPHA_TAKARA
 
 config ALPHA_TITAN
 	bool "Titan"
+	help
+	  AlphaServer ES45/DS25 SMP based on EV68 and Titan chipset.
 
 config ALPHA_WILDFIRE
 	bool "Wildfire"

arch/alpha/kernel/Makefile

@@ -34,6 +34,8 @@ obj-y	 += irq_pyxis.o irq_i8259.o irq_srm.o
 
 obj-y	 += es1888.o smc37c669.o smc37c93x.o ns87312.o
 
+obj-y    += err_titan.o
+
 else
 
 # Core logic support
@@ -62,7 +64,8 @@ obj-$(CONFIG_ALPHA_PC164)	+= sys_cabriolet.o irq_i8259.o irq_srm.o \
 				   smc37c93x.o
 obj-$(CONFIG_ALPHA_DP264)	+= sys_dp264.o irq_i8259.o es1888.o smc37c669.o
 obj-$(CONFIG_ALPHA_SHARK)	+= sys_dp264.o irq_i8259.o es1888.o smc37c669.o
-obj-$(CONFIG_ALPHA_TITAN)	+= sys_titan.o irq_i8259.o smc37c669.o
+obj-$(CONFIG_ALPHA_TITAN)	+= sys_titan.o irq_i8259.o smc37c669.o \
+				   err_titan.o
 obj-$(CONFIG_ALPHA_EB64P)	+= sys_eb64p.o irq_i8259.o
 obj-$(CONFIG_ALPHA_EB66)	+= sys_eb64p.o irq_i8259.o
 obj-$(CONFIG_ALPHA_EIGER)	+= sys_eiger.o irq_i8259.o

arch/alpha/kernel/err_impl.h

@@ -146,3 +146,11 @@ extern void cdl_check_console_data_log(void);
 extern int cdl_register_subpacket_annotation(struct el_subpacket_annotation *);
 extern int cdl_register_subpacket_handler(struct el_subpacket_handler *);
 
+/*
+ * err_titan.c
+ */
+extern int titan_process_logout_frame(struct el_common *, int);
+extern void titan_machine_check(u64, u64, struct pt_regs *);
+extern void titan_register_error_handlers(void);
+extern int privateer_process_logout_frame(struct el_common *, int);
+extern void privateer_machine_check(u64, u64, struct pt_regs *);

arch/alpha/kernel/setup.c

@@ -174,6 +174,7 @@ WEAK(sable_gamma_mv);
 WEAK(shark_mv);
 WEAK(sx164_mv);
 WEAK(takara_mv);
+WEAK(titan_mv);
 WEAK(webbrick_mv);
 WEAK(wildfire_mv);
 WEAK(xl_mv);
@@ -720,9 +721,9 @@ static char rawhide_names[][16] = {
 static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
 
 static char titan_names[][16] = {
-	"0", "Privateer"
+	"DEFAULT", "Privateer", "Falcon", "Granite"
 };
-static int titan_indices[] = {0,1};
+static int titan_indices[] = {0,1,2,2,3};
 
 static char tsunami_names[][16] = {
 	"0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
@@ -814,8 +815,10 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
 
 	static struct alpha_machine_vector *titan_vecs[] __initdata =
 	{
-		NULL,
+		&titan_mv,		/* default   */
 		&privateer_mv,		/* privateer */
+		&titan_mv,		/* falcon    */
+		&privateer_mv,		/* granite   */
 	};
 
 	static struct alpha_machine_vector *tsunami_vecs[]  __initdata =
@@ -881,6 +884,7 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
 				vec = eb66_vecs[eb66_indices[member]];
 			break;
 		case ST_DEC_TITAN:
+			vec = titan_vecs[0];	/* default */
 			if (member < N(titan_indices))
 				vec = titan_vecs[titan_indices[member]];
 			break;
@@ -1024,6 +1028,7 @@ get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
 			*variation_name = rawhide_names[rawhide_indices[member]];
 		break;
 	case ST_DEC_TITAN:
+		*variation_name = titan_names[0];	/* default */
 		if (member < N(titan_indices))
 			*variation_name = titan_names[titan_indices[member]];
 		break;

include/asm-alpha/core_titan.h

@@ -2,6 +2,7 @@
 #define __ALPHA_TITAN__H__
 
 #include <linux/types.h>
+#include <linux/pci.h>
 #include <asm/compiler.h>
 
 /*
@@ -293,13 +294,15 @@ union TPAchipAGPERR {
  * 		2 - pachip 0 / A Port
  *      	3 - pachip 1 / A Port
  */
-#define TITAN_HOSE(h)		(((unsigned long)(h)) << 33)
+#define TITAN_HOSE_SHIFT       (33) 
+#define TITAN_HOSE(h)		(((unsigned long)(h)) << TITAN_HOSE_SHIFT)
 #define TITAN_BASE		(IDENT_ADDR + TI_BIAS)
 #define TITAN_MEM(h)	     	(TITAN_BASE+TITAN_HOSE(h)+0x000000000UL)
 #define _TITAN_IACK_SC(h)    	(TITAN_BASE+TITAN_HOSE(h)+0x1F8000000UL)
 #define TITAN_IO(h)	     	(TITAN_BASE+TITAN_HOSE(h)+0x1FC000000UL)
 #define TITAN_CONF(h)	     	(TITAN_BASE+TITAN_HOSE(h)+0x1FE000000UL)
 
+#define TITAN_HOSE_MASK		TITAN_HOSE(3)
 #define TITAN_IACK_SC	     	_TITAN_IACK_SC(0) /* hack! */
 
 /* 
@@ -427,17 +430,8 @@ __EXTERN_INLINE void titan_outl(u32 b, unsigned long addr)
  * Memory functions.  all accesses are done through linear space.
  */
 
-__EXTERN_INLINE unsigned long titan_ioremap(unsigned long addr, 
-					    unsigned long size
-					    __attribute__((unused)))
-{
-	return addr + TITAN_MEM_BIAS;
-}
-
-__EXTERN_INLINE void titan_iounmap(unsigned long addr)
-{
-	return;
-}
+extern unsigned long titan_ioremap(unsigned long addr, unsigned long size);
+extern void titan_iounmap(unsigned long addr);
 
 __EXTERN_INLINE int titan_is_ioaddr(unsigned long addr)
 {
@@ -505,8 +499,8 @@ __EXTERN_INLINE void titan_writeq(u64 b, unsigned long addr)
 #define __writew(x,a)		titan_writew((x),(unsigned long)(a))
 #define __writel(x,a)		titan_writel((x),(unsigned long)(a))
 #define __writeq(x,a)		titan_writeq((x),(unsigned long)(a))
-#define __ioremap(a,s)		titan_ioremap((unsigned long)(a),(s))
-#define __iounmap(a)		titan_iounmap((unsigned long)(a))
+#define __ioremap(a,s)		alpha_mv.mv_ioremap((unsigned long)(a),(s))
+#define __iounmap(a)		alpha_mv.mv_iounmap((unsigned long)(a))
 #define __is_ioaddr(a)		titan_is_ioaddr((unsigned long)(a))
 
 #define inb(port) 		__inb((port))