Commit 029af8c7 authored by Ingo Molnar's avatar Ingo Molnar

Merge branch 'linus' into perfcounters/core

parents 75f224cf 5279585f
...@@ -48,7 +48,7 @@ config RUNTIME_DEBUG ...@@ -48,7 +48,7 @@ config RUNTIME_DEBUG
help help
If you say Y here, some debugging macros will do run-time checking. If you say Y here, some debugging macros will do run-time checking.
If you say N here, those macros will mostly turn to no-ops. See If you say N here, those macros will mostly turn to no-ops. See
include/asm-mips/debug.h for debuging macros. arch/mips/include/asm/debug.h for debugging macros.
If unsure, say N. If unsure, say N.
endmenu endmenu
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.20 # Linux kernel version: 2.6.28-rc7
# Tue Feb 20 21:47:33 2007 # Wed Dec 10 14:39:08 2008
# #
CONFIG_MIPS=y CONFIG_MIPS=y
# #
# Machine selection # Machine selection
# #
CONFIG_ZONE_DMA=y # CONFIG_MACH_ALCHEMY is not set
# CONFIG_MIPS_MTX1 is not set
# CONFIG_MIPS_BOSPORUS is not set
# CONFIG_MIPS_PB1000 is not set
# CONFIG_MIPS_PB1100 is not set
# CONFIG_MIPS_PB1500 is not set
# CONFIG_MIPS_PB1550 is not set
# CONFIG_MIPS_PB1200 is not set
# CONFIG_MIPS_DB1000 is not set
# CONFIG_MIPS_DB1100 is not set
# CONFIG_MIPS_DB1500 is not set
# CONFIG_MIPS_DB1550 is not set
# CONFIG_MIPS_DB1200 is not set
# CONFIG_MIPS_MIRAGE is not set
# CONFIG_BASLER_EXCITE is not set # CONFIG_BASLER_EXCITE is not set
# CONFIG_BCM47XX is not set
# CONFIG_MIPS_COBALT is not set # CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set # CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set # CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MIPS_MALTA is not set # CONFIG_MIPS_MALTA is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set # CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set # CONFIG_MACH_EMMA is not set
# CONFIG_MIPS_XXS1500 is not set # CONFIG_MACH_VR41XX is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
# CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set # CONFIG_PNX8550_STB810 is not set
# CONFIG_MACH_VR41XX is not set # CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set # CONFIG_PMC_YOSEMITE is not set
# CONFIG_MARKEINS is not set
# CONFIG_SGI_IP22 is not set # CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
CONFIG_SGI_IP32=y CONFIG_SGI_IP32=y
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHONE is not set # CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SNI_RM is not set # CONFIG_SNI_RM is not set
# CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MACH_TX39XX is not set
# CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_MACH_TX49XX is not set
# CONFIG_TOSHIBA_RBTX4938 is not set # CONFIG_MIKROTIK_RB532 is not set
# CONFIG_WR_PPMC is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_TIME=y CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
CONFIG_ARC=y CONFIG_ARC=y
CONFIG_CEVT_R4K=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y CONFIG_DMA_NEED_PCI_MAP_STATE=y
# CONFIG_HOTPLUG_CPU is not set
# CONFIG_NO_IOPORT is not set
CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_ARC32=y CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_L1_CACHE_SHIFT=5
...@@ -75,6 +75,7 @@ CONFIG_ARC_PROMLIB=y ...@@ -75,6 +75,7 @@ CONFIG_ARC_PROMLIB=y
# #
# CPU selection # CPU selection
# #
# CONFIG_CPU_LOONGSON2 is not set
# CONFIG_CPU_MIPS32_R1 is not set # CONFIG_CPU_MIPS32_R1 is not set
# CONFIG_CPU_MIPS32_R2 is not set # CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R1 is not set
...@@ -87,6 +88,7 @@ CONFIG_ARC_PROMLIB=y ...@@ -87,6 +88,7 @@ CONFIG_ARC_PROMLIB=y
# CONFIG_CPU_TX49XX is not set # CONFIG_CPU_TX49XX is not set
CONFIG_CPU_R5000=y CONFIG_CPU_R5000=y
# CONFIG_CPU_R5432 is not set # CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set # CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set # CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R8000 is not set
...@@ -116,65 +118,73 @@ CONFIG_RM7000_CPU_SCACHE=y ...@@ -116,65 +118,73 @@ CONFIG_RM7000_CPU_SCACHE=y
CONFIG_MIPS_MT_DISABLED=y CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set # CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set # CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1 CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_48 is not set # CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set # CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set # CONFIG_HZ_128 is not set
# CONFIG_HZ_250 is not set CONFIG_HZ_250=y
# CONFIG_HZ_256 is not set # CONFIG_HZ_256 is not set
CONFIG_HZ_1000=y # CONFIG_HZ_1000 is not set
# CONFIG_HZ_1024 is not set # CONFIG_HZ_1024 is not set
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=1000 CONFIG_HZ=250
# CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_NONE=y
CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set # CONFIG_PREEMPT is not set
# CONFIG_KEXEC is not set # CONFIG_KEXEC is not set
# CONFIG_SECCOMP is not set
CONFIG_LOCKDEP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
# #
# Code maturity level options # General setup
# #
CONFIG_EXPERIMENTAL=y CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y CONFIG_SWAP=y
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set CONFIG_POSIX_MQUEUE=y
CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set # CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set CONFIG_AUDIT=y
# CONFIG_AUDIT is not set CONFIG_IKCONFIG=y
# CONFIG_IKCONFIG is not set CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
# CONFIG_GROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_RELAY=y CONFIG_RELAY=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set # CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y CONFIG_SYSCTL_SYSCALL=y
...@@ -184,27 +194,43 @@ CONFIG_HOTPLUG=y ...@@ -184,27 +194,43 @@ CONFIG_HOTPLUG=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y CONFIG_ELF_CORE=y
CONFIG_PCSPKR_PLATFORM=y
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y CONFIG_SHMEM=y
CONFIG_SLAB=y CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y CONFIG_VM_EVENT_COUNTERS=y
CONFIG_PCI_QUIRKS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_PROFILING=y
# CONFIG_MARKERS is not set
CONFIG_OPROFILE=m
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set # CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0 CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_UNLOAD=y
# Loadable module support # CONFIG_MODULE_FORCE_UNLOAD is not set
# # CONFIG_MODVERSIONS is not set
# CONFIG_MODULES is not set # CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
CONFIG_BLOCK=y CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
CONFIG_BLOCK_COMPAT=y
# #
# IO Schedulers # IO Schedulers
...@@ -213,59 +239,50 @@ CONFIG_IOSCHED_NOOP=y ...@@ -213,59 +239,50 @@ CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set # CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set # CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory" CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_CLASSIC_RCU=y
# CONFIG_FREEZER is not set
# #
# Bus options (PCI, PCMCIA, EISA, ISA, TC) # Bus options (PCI, PCMCIA, EISA, ISA, TC)
# #
CONFIG_HW_HAS_PCI=y CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCI_LEGACY is not set
CONFIG_MMU=y CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set # CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI is not set
# #
# Executable file formats # Executable file formats
# #
CONFIG_BINFMT_ELF=y CONFIG_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=y CONFIG_BINFMT_MISC=y
# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y CONFIG_SYSVIPC_COMPAT=y
CONFIG_MIPS32_O32=y CONFIG_MIPS32_O32=y
# CONFIG_MIPS32_N32 is not set CONFIG_MIPS32_N32=y
CONFIG_BINFMT_ELF32=y CONFIG_BINFMT_ELF32=y
# #
# Power management options # Power management options
# #
CONFIG_PM=y CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM_LEGACY is not set # CONFIG_PM is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PM_SYSFS_DEPRECATED is not set
#
# Networking
#
CONFIG_NET=y CONFIG_NET=y
# #
# Networking options # Networking options
# #
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y CONFIG_UNIX=y
...@@ -273,56 +290,83 @@ CONFIG_XFRM=y ...@@ -273,56 +290,83 @@ CONFIG_XFRM=y
CONFIG_XFRM_USER=y CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_MIGRATE=y
# CONFIG_XFRM_STATISTICS is not set
CONFIG_XFRM_IPCOMP=m
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set # CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set # CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set CONFIG_NET_IPIP=m
# CONFIG_NET_IPGRE is not set CONFIG_NET_IPGRE=m
# CONFIG_NET_IPGRE_BROADCAST is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set # CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set # CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set CONFIG_INET_AH=m
# CONFIG_INET_ESP is not set CONFIG_INET_ESP=m
# CONFIG_INET_IPCOMP is not set CONFIG_INET_IPCOMP=m
# CONFIG_INET_XFRM_TUNNEL is not set CONFIG_INET_XFRM_TUNNEL=m
# CONFIG_INET_TUNNEL is not set CONFIG_INET_TUNNEL=m
CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BIC=m
CONFIG_TCP_CONG_CUBIC=y CONFIG_TCP_CONG_CUBIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_TCP_CONG_LP is not set
# CONFIG_TCP_CONG_VENO is not set
# CONFIG_TCP_CONG_YEAH is not set
# CONFIG_TCP_CONG_ILLINOIS is not set
# CONFIG_DEFAULT_BIC is not set
CONFIG_DEFAULT_CUBIC=y
# CONFIG_DEFAULT_HTCP is not set
# CONFIG_DEFAULT_VEGAS is not set
# CONFIG_DEFAULT_WESTWOOD is not set
# CONFIG_DEFAULT_RENO is not set
CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_TCP_MD5SIG=y CONFIG_TCP_MD5SIG=y
# CONFIG_IPV6 is not set CONFIG_IPV6=m
# CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_IPV6_PRIVACY is not set
# CONFIG_INET6_TUNNEL is not set # CONFIG_IPV6_ROUTER_PREF is not set
# CONFIG_IPV6_OPTIMISTIC_DAD is not set
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
# CONFIG_IPV6_MIP6 is not set
CONFIG_INET6_XFRM_TUNNEL=m
CONFIG_INET6_TUNNEL=m
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
CONFIG_INET6_XFRM_MODE_TUNNEL=m
CONFIG_INET6_XFRM_MODE_BEET=m
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=m
CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
CONFIG_NETWORK_SECMARK=y CONFIG_NETWORK_SECMARK=y
# CONFIG_NETFILTER is not set # CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set # CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set # CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set # CONFIG_TIPC is not set
# CONFIG_ATM is not set # CONFIG_ATM is not set
# CONFIG_BRIDGE is not set # CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set # CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set # CONFIG_DECNET is not set
# CONFIG_LLC2 is not set # CONFIG_LLC2 is not set
...@@ -332,10 +376,6 @@ CONFIG_NETWORK_SECMARK=y ...@@ -332,10 +376,6 @@ CONFIG_NETWORK_SECMARK=y
# CONFIG_LAPB is not set # CONFIG_LAPB is not set
# CONFIG_ECONET is not set # CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set # CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set # CONFIG_NET_SCHED is not set
# #
...@@ -343,15 +383,14 @@ CONFIG_NETWORK_SECMARK=y ...@@ -343,15 +383,14 @@ CONFIG_NETWORK_SECMARK=y
# #
# CONFIG_NET_PKTGEN is not set # CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set # CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set # CONFIG_IRDA is not set
# CONFIG_BT is not set # CONFIG_BT is not set
CONFIG_IEEE80211=y # CONFIG_AF_RXRPC is not set
# CONFIG_IEEE80211_DEBUG is not set # CONFIG_PHONET is not set
CONFIG_IEEE80211_CRYPT_WEP=y # CONFIG_WIRELESS is not set
CONFIG_IEEE80211_CRYPT_CCMP=y # CONFIG_RFKILL is not set
CONFIG_IEEE80211_SOFTMAC=y # CONFIG_NET_9P is not set
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
# #
# Device Drivers # Device Drivers
...@@ -360,60 +399,40 @@ CONFIG_WIRELESS_EXT=y ...@@ -360,60 +399,40 @@ CONFIG_WIRELESS_EXT=y
# #
# Generic Driver Options # Generic Driver Options
# #
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_SYS_HYPERVISOR is not set # CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
CONFIG_CONNECTOR=y CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y CONFIG_PROC_EVENTS=y
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set # CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set # CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set # CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CDROM_PKTCDVD is not set
CONFIG_CDROM_PKTCDVD=y # CONFIG_ATA_OVER_ETH is not set
CONFIG_CDROM_PKTCDVD_BUFFERS=8 # CONFIG_BLK_DEV_HD is not set
# CONFIG_CDROM_PKTCDVD_WCACHE is not set CONFIG_MISC_DEVICES=y
CONFIG_ATA_OVER_ETH=y # CONFIG_PHANTOM is not set
# CONFIG_EEPROM_93CX6 is not set
#
# Misc devices
#
CONFIG_SGI_IOC4=y CONFIG_SGI_IOC4=y
# CONFIG_TIFM_CORE is not set # CONFIG_TIFM_CORE is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# # CONFIG_HP_ILO is not set
# ATA/ATAPI/MFM/RLL support # CONFIG_C2PORT is not set
# CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set # CONFIG_IDE is not set
# #
...@@ -421,19 +440,20 @@ CONFIG_SGI_IOC4=y ...@@ -421,19 +440,20 @@ CONFIG_SGI_IOC4=y
# #
CONFIG_RAID_ATTRS=y CONFIG_RAID_ATTRS=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_SCSI_TGT=y CONFIG_SCSI_TGT=y
CONFIG_SCSI_NETLINK=y # CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y CONFIG_SCSI_PROC_FS=y
# #
# SCSI support type (disk, tape, CD-ROM) # SCSI support type (disk, tape, CD-ROM)
# #
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y # CONFIG_CHR_DEV_ST is not set
CONFIG_CHR_DEV_OSST=y # CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SG=m
# CONFIG_CHR_DEV_SCH is not set # CONFIG_CHR_DEV_SCH is not set
# #
...@@ -443,35 +463,36 @@ CONFIG_SCSI_MULTI_LUN=y ...@@ -443,35 +463,36 @@ CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_WAIT_SCAN=m
# #
# SCSI Transports # SCSI Transports
# #
CONFIG_SCSI_SPI_ATTRS=y CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SCSI_FC_ATTRS=y # CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set
CONFIG_SCSI_SAS_ATTRS=y CONFIG_SCSI_SAS_ATTRS=y
CONFIG_SCSI_SAS_LIBSAS=y CONFIG_SCSI_SAS_LIBSAS=y
CONFIG_SCSI_SAS_HOST_SMP=y
# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# CONFIG_SCSI_LOWLEVEL=y
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set # CONFIG_ISCSI_TCP is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set # CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AACRAID is not set
CONFIG_SCSI_AIC7XXX=y CONFIG_SCSI_AIC7XXX=y
CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
CONFIG_AIC7XXX_RESET_DELAY_MS=15000 CONFIG_AIC7XXX_RESET_DELAY_MS=15000
CONFIG_AIC7XXX_DEBUG_ENABLE=y CONFIG_AIC7XXX_DEBUG_ENABLE=y
CONFIG_AIC7XXX_DEBUG_MASK=0 CONFIG_AIC7XXX_DEBUG_MASK=0
CONFIG_AIC7XXX_REG_PRETTY_PRINT=y CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
# CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC79XX is not set
CONFIG_SCSI_AIC94XX=y # CONFIG_SCSI_AIC94XX is not set
# CONFIG_AIC94XX_DEBUG is not set # CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set # CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_LEGACY is not set
...@@ -482,6 +503,7 @@ CONFIG_SCSI_AIC94XX=y ...@@ -482,6 +503,7 @@ CONFIG_SCSI_AIC94XX=y
# CONFIG_SCSI_IPS is not set # CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_STEX is not set # CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_QLOGIC_1280 is not set
...@@ -492,147 +514,81 @@ CONFIG_SCSI_AIC94XX=y ...@@ -492,147 +514,81 @@ CONFIG_SCSI_AIC94XX=y
# CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_SRP is not set # CONFIG_SCSI_SRP is not set
# CONFIG_SCSI_DH is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set # CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set # CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set # CONFIG_FUSION is not set
# CONFIG_FUSION_SPI is not set
# CONFIG_FUSION_FC is not set
# CONFIG_FUSION_SAS is not set
# #
# IEEE 1394 (FireWire) support # IEEE 1394 (FireWire) support
# #
# CONFIG_IEEE1394 is not set
# #
# I2O device support # Enable only one of the two stacks, unless you know what you are doing
# #
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set # CONFIG_I2O is not set
#
# Network device support
#
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set CONFIG_DUMMY=m
# CONFIG_BONDING is not set CONFIG_BONDING=m
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set # CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set # CONFIG_TUN is not set
# CONFIG_VETH is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set # CONFIG_ARCNET is not set
# CONFIG_PHYLIB is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
CONFIG_LXT_PHY=y
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set CONFIG_MII=y
# CONFIG_AX88796 is not set
CONFIG_SGI_O2MACE_ETH=y CONFIG_SGI_O2MACE_ETH=y
# CONFIG_HAPPYMEAL is not set # CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set # CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set # CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_3COM is not set
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set # CONFIG_DM9000 is not set
CONFIG_NET_TULIP=y
# CONFIG_DE2104X=m
# Tulip family network device support CONFIG_TULIP=m
# # CONFIG_TULIP_MWI is not set
# CONFIG_NET_TULIP is not set CONFIG_TULIP_MMIO=y
# CONFIG_TULIP_NAPI is not set
# CONFIG_DE4X5 is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
# CONFIG_ULI526X is not set
# CONFIG_HP100 is not set # CONFIG_HP100 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NET_PCI is not set # CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
# # CONFIG_ATL2 is not set
# Ethernet (1000 Mbit) # CONFIG_NETDEV_1000 is not set
# # CONFIG_NETDEV_10000 is not set
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_QLA3XXX=y
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3=y
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=y
#
# Token Ring devices
#
# CONFIG_TR is not set # CONFIG_TR is not set
# #
# Wireless LAN (non-hamradio) # Wireless LAN
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
# #
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set # CONFIG_WAN is not set
# CONFIG_FDDI is not set # CONFIG_FDDI is not set
# CONFIG_HIPPI is not set # CONFIG_HIPPI is not set
# CONFIG_PPP is not set # CONFIG_PPP is not set
# CONFIG_SLIP is not set # CONFIG_SLIP is not set
# CONFIG_NET_FC is not set # CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set # CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set # CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set # CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set # CONFIG_PHONE is not set
# #
...@@ -640,6 +596,7 @@ CONFIG_NETXEN_NIC=y ...@@ -640,6 +596,7 @@ CONFIG_NETXEN_NIC=y
# #
CONFIG_INPUT=y CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# #
# Userland interfaces # Userland interfaces
...@@ -649,16 +606,32 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y ...@@ -649,16 +606,32 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set # CONFIG_INPUT_EVBUG is not set
# #
# Input Device Drivers # Input Device Drivers
# #
# CONFIG_INPUT_KEYBOARD is not set CONFIG_INPUT_KEYBOARD=y
# CONFIG_INPUT_MOUSE is not set CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_LIFEBOOK=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set # CONFIG_INPUT_MISC is not set
...@@ -669,8 +642,8 @@ CONFIG_SERIO=y ...@@ -669,8 +642,8 @@ CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set # CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set # CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_MACEPS2 is not set CONFIG_SERIO_MACEPS2=y
# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=y CONFIG_SERIO_RAW=y
# CONFIG_GAMEPORT is not set # CONFIG_GAMEPORT is not set
...@@ -678,10 +651,13 @@ CONFIG_SERIO_RAW=y ...@@ -678,10 +651,13 @@ CONFIG_SERIO_RAW=y
# Character devices # Character devices
# #
CONFIG_VT=y CONFIG_VT=y
# CONFIG_CONSOLE_TRANSLATIONS is not set
CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# #
# Serial drivers # Serial drivers
...@@ -702,192 +678,304 @@ CONFIG_SERIAL_CORE_CONSOLE=y ...@@ -702,192 +678,304 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set # CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set # CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set # CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set # CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
# CONFIG_SPI is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_VT8231 is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# #
# I2C support # Watchdog Device Drivers
# #
# CONFIG_I2C is not set # CONFIG_SOFT_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# #
# SPI support # PCI-based Watchdog Cards
# #
# CONFIG_SPI is not set # CONFIG_PCIPCWATCHDOG is not set
# CONFIG_SPI_MASTER is not set # CONFIG_WDTPCI is not set
CONFIG_SSB_POSSIBLE=y
# #
# Dallas's 1-wire bus # Sonics Silicon Backplane
# #
# CONFIG_W1 is not set # CONFIG_SSB is not set
# #
# Hardware Monitoring support # Multifunction device drivers
# #
# CONFIG_HWMON is not set # CONFIG_MFD_CORE is not set
# CONFIG_HWMON_VID is not set # CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_REGULATOR is not set
# #
# Multimedia devices # Multimedia devices
# #
# CONFIG_VIDEO_DEV is not set
# #
# Digital Video Broadcasting Devices # Multimedia core support
# #
# CONFIG_DVB is not set CONFIG_VIDEO_DEV=m
CONFIG_VIDEO_V4L2_COMMON=m
CONFIG_VIDEO_ALLOW_V4L1=y
CONFIG_VIDEO_V4L1_COMPAT=y
# CONFIG_DVB_CORE is not set
CONFIG_VIDEO_MEDIA=m
# #
# Graphics support # Multimedia drivers
# #
# CONFIG_FIRMWARE_EDID is not set # CONFIG_MEDIA_ATTACH is not set
# CONFIG_FB is not set CONFIG_VIDEO_V4L2=m
CONFIG_VIDEO_V4L1=m
CONFIG_VIDEOBUF_GEN=m
CONFIG_VIDEOBUF_VMALLOC=m
CONFIG_VIDEO_CAPTURE_DRIVERS=y
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
CONFIG_VIDEO_VIVI=m
# CONFIG_VIDEO_CPIA is not set
# CONFIG_VIDEO_STRADIS is not set
# CONFIG_SOC_CAMERA is not set
CONFIG_RADIO_ADAPTERS=y
# CONFIG_RADIO_GEMTEK_PCI is not set
# CONFIG_RADIO_MAXIRADIO is not set
# CONFIG_RADIO_MAESTRO is not set
CONFIG_DAB=y
# #
# Console display driver support # Graphics support
# #
# CONFIG_VGA_CONSOLE is not set # CONFIG_DRM is not set
CONFIG_DUMMY_CONSOLE=y # CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_UVESA is not set
CONFIG_FB_GBE=y
CONFIG_FB_GBE_MEM=4
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VT8623 is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
# CONFIG_FB_PM3 is not set
# CONFIG_FB_CARMINE is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# #
# Sound # Display device support
# #
# CONFIG_SOUND is not set # CONFIG_DISPLAY_SUPPORT is not set
# #
# HID Devices # Console display driver support
# #
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_10x18 is not set
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_SGI_CLUT224=y
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y CONFIG_HID=y
# CONFIG_HID_DEBUG is not set # CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
# CONFIG_HID_PID is not set
# #
# USB support # Special HID drivers
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
# #
CONFIG_HID_COMPAT=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set # CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
# CONFIG_RTC_DEBUG is not set
# #
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) # RTC interfaces
# #
# CONFIG_RTC_INTF_SYSFS is not set
# CONFIG_RTC_INTF_PROC is not set
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
# #
# Real Time Clock # SPI RTC drivers
# #
# CONFIG_RTC_CLASS is not set
# #
# DMA Engine support # Platform RTC drivers
# #
# CONFIG_DMA_ENGINE is not set CONFIG_RTC_DRV_CMOS=y
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
# #
# DMA Clients # on-CPU RTC drivers
#
#
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
# #
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
CONFIG_STAGING_EXCLUDE_BUILD=y
# #
# File systems # File systems
# #
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set CONFIG_EXT3_FS=y
# CONFIG_EXT4DEV_FS is not set CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set # CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set # CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set # CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set # CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set CONFIG_DNOTIFY=y
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set CONFIG_QUOTA=y
CONFIG_DNOTIFY=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set
# CONFIG_AUTOFS_FS is not set CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_AUTOFS4_FS is not set CONFIG_QFMT_V1=m
CONFIG_FUSE_FS=y CONFIG_QFMT_V2=m
CONFIG_QUOTACTL=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_FUSE_FS=m
CONFIG_GENERIC_ACL=y CONFIG_GENERIC_ACL=y
# #
# CD-ROM/DVD Filesystems # CD-ROM/DVD Filesystems
# #
# CONFIG_ISO9660_FS is not set CONFIG_ISO9660_FS=m
# CONFIG_UDF_FS is not set CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_UDF_NLS=y
# #
# DOS/FAT/NT Filesystems # DOS/FAT/NT Filesystems
# #
# CONFIG_MSDOS_FS is not set CONFIG_FAT_FS=m
# CONFIG_VFAT_FS is not set CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set # CONFIG_NTFS_FS is not set
# #
...@@ -896,11 +984,11 @@ CONFIG_GENERIC_ACL=y ...@@ -896,11 +984,11 @@ CONFIG_GENERIC_ACL=y
CONFIG_PROC_FS=y CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y CONFIG_SYSFS=y
CONFIG_TMPFS=y CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_HUGETLB_PAGE is not set # CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_CONFIGFS_FS=y CONFIG_CONFIGFS_FS=y
# #
...@@ -916,33 +1004,42 @@ CONFIG_CONFIGFS_FS=y ...@@ -916,33 +1004,42 @@ CONFIG_CONFIGFS_FS=y
# CONFIG_EFS_FS is not set # CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set # CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set # CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set # CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set # CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set # CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
#
# Network File Systems
#
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
CONFIG_NFS_V3=y CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set # CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
# CONFIG_NFSD_V4 is not set
CONFIG_LOCKD=y CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_NFS_COMMON=y CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y CONFIG_SUNRPC=y
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set # CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
# CONFIG_CIFS_UPCALL is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set # CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set # CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set # CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
# #
# Partition Types # Partition Types
...@@ -953,45 +1050,83 @@ CONFIG_PARTITION_ADVANCED=y ...@@ -953,45 +1050,83 @@ CONFIG_PARTITION_ADVANCED=y
# CONFIG_AMIGA_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set # CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set # CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set # CONFIG_LDM_PARTITION is not set
CONFIG_SGI_PARTITION=y CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set # CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set # CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_NLS=y
# Native Language Support CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS is not set CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
# CONFIG_NLS_CODEPAGE_850=m
# Distributed Lock Manager CONFIG_NLS_CODEPAGE_852=m
# CONFIG_NLS_CODEPAGE_855=m
CONFIG_DLM=y CONFIG_NLS_CODEPAGE_857=m
CONFIG_DLM_TCP=y CONFIG_NLS_CODEPAGE_860=m
# CONFIG_DLM_SCTP is not set CONFIG_NLS_CODEPAGE_861=m
# CONFIG_DLM_DEBUG is not set CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
# CONFIG_NLS_CODEPAGE_864=m
# Profiling support CONFIG_NLS_CODEPAGE_865=m
# CONFIG_NLS_CODEPAGE_866=m
# CONFIG_PROFILING is not set CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
# CONFIG_DLM is not set
# #
# Kernel hacking # Kernel hacking
# #
CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set # CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set # CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set # CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_MEMORY_INIT is not set
CONFIG_CROSSCOMPILE=y # CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
#
# Tracers
#
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_CMDLINE="" CONFIG_CMDLINE=""
# #
...@@ -1000,51 +1135,99 @@ CONFIG_CMDLINE="" ...@@ -1000,51 +1135,99 @@ CONFIG_CMDLINE=""
CONFIG_KEYS=y CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set # CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
# #
# Cryptographic options # Crypto core or helper
# #
CONFIG_CRYPTO=y # CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_AUTHENC=m
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LRW=y
CONFIG_CRYPTO_PCBC=y
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=y CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_NULL=y
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=y
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_TGR192=y CONFIG_CRYPTO_TGR192=y
CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_CBC=y #
CONFIG_CRYPTO_PCBC=y # Ciphers
CONFIG_CRYPTO_LRW=y #
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_CAMELLIA=y
CONFIG_CRYPTO_CAST5=y CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y CONFIG_CRYPTO_CAST6=y
CONFIG_CRYPTO_TEA=y CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_KHAZAD=y CONFIG_CRYPTO_KHAZAD=y
CONFIG_CRYPTO_ANUBIS=y # CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
#
# Compression
#
CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y # CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CAMELLIA=y
# #
# Hardware crypto devices # Random Number Generation
# #
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# #
# Library routines # Library routines
...@@ -1052,10 +1235,15 @@ CONFIG_CRYPTO_CAMELLIA=y ...@@ -1052,10 +1235,15 @@ CONFIG_CRYPTO_CAMELLIA=y
CONFIG_BITREVERSE=y CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set # CONFIG_CRC_CCITT is not set
CONFIG_CRC16=y CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=y CONFIG_LIBCRC32C=y
CONFIG_AUDIT_GENERIC=y
CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
...@@ -35,6 +35,16 @@ ...@@ -35,6 +35,16 @@
mtc0 \reg, CP0_TCSTATUS mtc0 \reg, CP0_TCSTATUS
_ehb _ehb
.endm .endm
#elif defined(CONFIG_CPU_MIPSR2)
.macro local_irq_enable reg=t0
ei
irq_enable_hazard
.endm
.macro local_irq_disable reg=t0
di
irq_disable_hazard
.endm
#else #else
.macro local_irq_enable reg=t0 .macro local_irq_enable reg=t0
mfc0 \reg, CP0_STATUS mfc0 \reg, CP0_STATUS
......
...@@ -111,6 +111,7 @@ EXPORT_SYMBOL(dma_alloc_coherent); ...@@ -111,6 +111,7 @@ EXPORT_SYMBOL(dma_alloc_coherent);
void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle) dma_addr_t dma_handle)
{ {
plat_unmap_dma_mem(dma_handle);
free_pages((unsigned long) vaddr, get_order(size)); free_pages((unsigned long) vaddr, get_order(size));
} }
...@@ -121,6 +122,8 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, ...@@ -121,6 +122,8 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
{ {
unsigned long addr = (unsigned long) vaddr; unsigned long addr = (unsigned long) vaddr;
plat_unmap_dma_mem(dma_handle);
if (!plat_device_is_coherent(dev)) if (!plat_device_is_coherent(dev))
addr = CAC_ADDR(addr); addr = CAC_ADDR(addr);
......
...@@ -41,6 +41,7 @@ $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 ...@@ -41,6 +41,7 @@ $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
......
...@@ -2081,10 +2081,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, ...@@ -2081,10 +2081,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
if (!q) if (!q)
return -ENXIO; return -ENXIO;
rq = blk_get_request(q, READ, GFP_KERNEL);
if (!rq)
return -ENOMEM;
cdi->last_sense = 0; cdi->last_sense = 0;
while (nframes) { while (nframes) {
...@@ -2096,9 +2092,17 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, ...@@ -2096,9 +2092,17 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
len = nr * CD_FRAMESIZE_RAW; len = nr * CD_FRAMESIZE_RAW;
rq = blk_get_request(q, READ, GFP_KERNEL);
if (!rq) {
ret = -ENOMEM;
break;
}
ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL); ret = blk_rq_map_user(q, rq, NULL, ubuf, len, GFP_KERNEL);
if (ret) if (ret) {
blk_put_request(rq);
break; break;
}
rq->cmd[0] = GPCMD_READ_CD; rq->cmd[0] = GPCMD_READ_CD;
rq->cmd[1] = 1 << 2; rq->cmd[1] = 1 << 2;
...@@ -2124,6 +2128,7 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, ...@@ -2124,6 +2128,7 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
if (blk_rq_unmap_user(bio)) if (blk_rq_unmap_user(bio))
ret = -EFAULT; ret = -EFAULT;
blk_put_request(rq);
if (ret) if (ret)
break; break;
...@@ -2133,7 +2138,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf, ...@@ -2133,7 +2138,6 @@ static int cdrom_read_cdda_bpc(struct cdrom_device_info *cdi, __u8 __user *ubuf,
ubuf += len; ubuf += len;
} }
blk_put_request(rq);
return ret; return ret;
} }
......
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
0x0c U+2640 0x0c U+2640
0x0d U+266a 0x0d U+266a
0x0e U+266b 0x0e U+266b
0x0f U+263c 0x0f U+263c U+00a4
0x10 U+25b6 U+25ba 0x10 U+25b6 U+25ba
0x11 U+25c0 U+25c4 0x11 U+25c0 U+25c4
0x12 U+2195 0x12 U+2195
...@@ -55,7 +55,7 @@ ...@@ -55,7 +55,7 @@
0x24 U+0024 0x24 U+0024
0x25 U+0025 0x25 U+0025
0x26 U+0026 0x26 U+0026
0x27 U+0027 0x27 U+0027 U+00b4
0x28 U+0028 0x28 U+0028
0x29 U+0029 0x29 U+0029
0x2a U+002a 0x2a U+002a
...@@ -84,7 +84,7 @@ ...@@ -84,7 +84,7 @@
0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3 0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3
0x42 U+0042 0x42 U+0042
0x43 U+0043 U+00a9 0x43 U+0043 U+00a9
0x44 U+0044 0x44 U+0044 U+00d0
0x45 U+0045 U+00c8 U+00ca U+00cb 0x45 U+0045 U+00c8 U+00ca U+00cb
0x46 U+0046 0x46 U+0046
0x47 U+0047 0x47 U+0047
...@@ -140,7 +140,7 @@ ...@@ -140,7 +140,7 @@
0x79 U+0079 U+00fd 0x79 U+0079 U+00fd
0x7a U+007a 0x7a U+007a
0x7b U+007b 0x7b U+007b
0x7c U+007c U+00a5 0x7c U+007c U+00a6
0x7d U+007d 0x7d U+007d
0x7e U+007e 0x7e U+007e
# #
...@@ -263,10 +263,10 @@ ...@@ -263,10 +263,10 @@
0xe8 U+03a6 U+00d8 0xe8 U+03a6 U+00d8
0xe9 U+0398 0xe9 U+0398
0xea U+03a9 U+2126 0xea U+03a9 U+2126
0xeb U+03b4 0xeb U+03b4 U+00f0
0xec U+221e 0xec U+221e
0xed U+03c6 U+00f8 0xed U+03c6 U+00f8
0xee U+03b5 0xee U+03b5 U+2208
0xef U+2229 0xef U+2229
0xf0 U+2261 0xf0 U+2261
0xf1 U+00b1 0xf1 U+00b1
......
...@@ -2274,7 +2274,7 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co ...@@ -2274,7 +2274,7 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co
continue; /* nothing to display */ continue; /* nothing to display */
} }
/* Glyph not found */ /* Glyph not found */
if ((!(vc->vc_utf && !vc->vc_disp_ctrl) || c < 128) && !(c & ~charmask)) { if ((!(vc->vc_utf && !vc->vc_disp_ctrl) && c < 128) && !(c & ~charmask)) {
/* In legacy mode use the glyph we get by a 1:1 mapping. /* In legacy mode use the glyph we get by a 1:1 mapping.
This would make absolutely no sense with Unicode in mind, This would make absolutely no sense with Unicode in mind,
but do this for ASCII characters since a font may lack but do this for ASCII characters since a font may lack
......
...@@ -92,7 +92,7 @@ static void highlander_i2c_setup(struct highlander_i2c_dev *dev) ...@@ -92,7 +92,7 @@ static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
static void smbus_write_data(u8 *src, u16 *dst, int len) static void smbus_write_data(u8 *src, u16 *dst, int len)
{ {
for (; len > 1; len -= 2) { for (; len > 1; len -= 2) {
*dst++ = be16_to_cpup((u16 *)src); *dst++ = be16_to_cpup((__be16 *)src);
src += 2; src += 2;
} }
...@@ -103,7 +103,7 @@ static void smbus_write_data(u8 *src, u16 *dst, int len) ...@@ -103,7 +103,7 @@ static void smbus_write_data(u8 *src, u16 *dst, int len)
static void smbus_read_data(u16 *src, u8 *dst, int len) static void smbus_read_data(u16 *src, u8 *dst, int len)
{ {
for (; len > 1; len -= 2) { for (; len > 1; len -= 2) {
*(u16 *)dst = cpu_to_be16p(src++); *(__be16 *)dst = cpu_to_be16p(src++);
dst += 2; dst += 2;
} }
......
...@@ -486,7 +486,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd( ...@@ -486,7 +486,7 @@ static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd(
if (cmd->type == MSP_TWI_CMD_WRITE || if (cmd->type == MSP_TWI_CMD_WRITE ||
cmd->type == MSP_TWI_CMD_WRITE_READ) { cmd->type == MSP_TWI_CMD_WRITE_READ) {
__be64 tmp = cpu_to_be64p((u64 *)cmd->write_data); u64 tmp = be64_to_cpup((__be64 *)cmd->write_data);
tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8; tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8;
dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp); dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp);
pmcmsptwi_writel(tmp & 0x00000000ffffffffLL, pmcmsptwi_writel(tmp & 0x00000000ffffffffLL,
......
...@@ -107,6 +107,7 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -107,6 +107,7 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h)
struct request *req; struct request *req;
int ret; int ret;
retry:
req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO);
if (!req) if (!req)
return SCSI_DH_RES_TEMP_UNAVAIL; return SCSI_DH_RES_TEMP_UNAVAIL;
...@@ -121,7 +122,6 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -121,7 +122,6 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h)
memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE); memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE);
req->sense_len = 0; req->sense_len = 0;
retry:
ret = blk_execute_rq(req->q, NULL, req, 1); ret = blk_execute_rq(req->q, NULL, req, 1);
if (ret == -EIO) { if (ret == -EIO) {
if (req->sense_len > 0) { if (req->sense_len > 0) {
...@@ -136,8 +136,10 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -136,8 +136,10 @@ static int hp_sw_tur(struct scsi_device *sdev, struct hp_sw_dh_data *h)
h->path_state = HP_SW_PATH_ACTIVE; h->path_state = HP_SW_PATH_ACTIVE;
ret = SCSI_DH_OK; ret = SCSI_DH_OK;
} }
if (ret == SCSI_DH_IMM_RETRY) if (ret == SCSI_DH_IMM_RETRY) {
blk_put_request(req);
goto retry; goto retry;
}
if (ret == SCSI_DH_DEV_OFFLINED) { if (ret == SCSI_DH_DEV_OFFLINED) {
h->path_state = HP_SW_PATH_PASSIVE; h->path_state = HP_SW_PATH_PASSIVE;
ret = SCSI_DH_OK; ret = SCSI_DH_OK;
...@@ -200,6 +202,7 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -200,6 +202,7 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h)
struct request *req; struct request *req;
int ret, retry; int ret, retry;
retry:
req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO); req = blk_get_request(sdev->request_queue, WRITE, GFP_NOIO);
if (!req) if (!req)
return SCSI_DH_RES_TEMP_UNAVAIL; return SCSI_DH_RES_TEMP_UNAVAIL;
...@@ -216,7 +219,6 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -216,7 +219,6 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h)
req->sense_len = 0; req->sense_len = 0;
retry = h->retries; retry = h->retries;
retry:
ret = blk_execute_rq(req->q, NULL, req, 1); ret = blk_execute_rq(req->q, NULL, req, 1);
if (ret == -EIO) { if (ret == -EIO) {
if (req->sense_len > 0) { if (req->sense_len > 0) {
...@@ -231,8 +233,10 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h) ...@@ -231,8 +233,10 @@ static int hp_sw_start_stop(struct scsi_device *sdev, struct hp_sw_dh_data *h)
ret = SCSI_DH_OK; ret = SCSI_DH_OK;
if (ret == SCSI_DH_RETRY) { if (ret == SCSI_DH_RETRY) {
if (--retry) if (--retry) {
blk_put_request(req);
goto retry; goto retry;
}
ret = SCSI_DH_IO; ret = SCSI_DH_IO;
} }
......
...@@ -5,61 +5,61 @@ ...@@ -5,61 +5,61 @@
* --dte * --dte
*/ */
#define FLUSH_CACHE_WORKAROUND 1 static void radeon_fixup_offset(struct radeonfb_info *rinfo)
void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries)
{ {
int i; u32 local_base;
/* *** Ugly workaround *** */
/*
* On some platforms, the video memory is mapped at 0 in radeon chip space
* (like PPCs) by the firmware. X will always move it up so that it's seen
* by the chip to be at the same address as the PCI BAR.
* That means that when switching back from X, there is a mismatch between
* the offsets programmed into the engine. This means that potentially,
* accel operations done before radeonfb has a chance to re-init the engine
* will have incorrect offsets, and potentially trash system memory !
*
* The correct fix is for fbcon to never call any accel op before the engine
* has properly been re-initialized (by a call to set_var), but this is a
* complex fix. This workaround in the meantime, called before every accel
* operation, makes sure the offsets are in sync.
*/
for (i=0; i<2000000; i++) { radeon_fifo_wait (1);
rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f; local_base = INREG(MC_FB_LOCATION) << 16;
if (rinfo->fifo_free >= entries) if (local_base == rinfo->fb_local_base)
return; return;
udelay(10);
}
printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
/* XXX Todo: attempt to reset the engine */
}
static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) rinfo->fb_local_base = local_base;
{
if (entries <= rinfo->fifo_free)
rinfo->fifo_free -= entries;
else
radeon_fifo_update_and_wait(rinfo, entries);
}
static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg, radeon_fifo_wait (3);
u32 *cache, u32 new_val) OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) |
{ (rinfo->fb_local_base >> 10));
if (new_val == *cache) OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
return; OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
*cache = new_val;
radeon_fifo_wait(rinfo, 1);
OUTREG(reg, new_val);
} }
static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo,
const struct fb_fillrect *region) const struct fb_fillrect *region)
{ {
radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, radeon_fifo_wait(4);
rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P);
radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, OUTREG(DP_GUI_MASTER_CNTL,
DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); rinfo->dp_gui_master_cntl /* contains, like GMC_DST_32BPP */
radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache, | GMC_BRUSH_SOLID_COLOR
region->color); | ROP3_P);
if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP)
/* Ensure the dst cache is flushed and the engine idle before OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]);
* issuing the operation. else
* OUTREG(DP_BRUSH_FRGD_CLR, region->color);
* This works around engine lockups on some cards OUTREG(DP_WRITE_MSK, 0xffffffff);
*/ OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM));
#if FLUSH_CACHE_WORKAROUND
radeon_fifo_wait(rinfo, 2); radeon_fifo_wait(2);
OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
#endif
radeon_fifo_wait(rinfo, 2); radeon_fifo_wait(2);
OUTREG(DST_Y_X, (region->dy << 16) | region->dx); OUTREG(DST_Y_X, (region->dy << 16) | region->dx);
OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height); OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height);
} }
...@@ -70,14 +70,15 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) ...@@ -70,14 +70,15 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
struct fb_fillrect modded; struct fb_fillrect modded;
int vxres, vyres; int vxres, vyres;
WARN_ON(rinfo->gfx_mode); if (info->state != FBINFO_STATE_RUNNING)
if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
return; return;
if (info->flags & FBINFO_HWACCEL_DISABLED) { if (info->flags & FBINFO_HWACCEL_DISABLED) {
cfb_fillrect(info, region); cfb_fillrect(info, region);
return; return;
} }
radeon_fixup_offset(rinfo);
vxres = info->var.xres_virtual; vxres = info->var.xres_virtual;
vyres = info->var.yres_virtual; vyres = info->var.yres_virtual;
...@@ -90,10 +91,6 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) ...@@ -90,10 +91,6 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region)
if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx;
if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy;
if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
info->fix.visual == FB_VISUAL_DIRECTCOLOR )
modded.color = ((u32 *) (info->pseudo_palette))[region->color];
radeonfb_prim_fillrect(rinfo, &modded); radeonfb_prim_fillrect(rinfo, &modded);
} }
...@@ -112,22 +109,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, ...@@ -112,22 +109,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo,
if ( xdir < 0 ) { sx += w-1; dx += w-1; } if ( xdir < 0 ) { sx += w-1; dx += w-1; }
if ( ydir < 0 ) { sy += h-1; dy += h-1; } if ( ydir < 0 ) { sy += h-1; dy += h-1; }
radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, radeon_fifo_wait(3);
rinfo->dp_gui_mc_base | OUTREG(DP_GUI_MASTER_CNTL,
GMC_BRUSH_NONE | rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */
GMC_SRC_DATATYPE_COLOR | | GMC_BRUSH_NONE
ROP3_S | | GMC_SRC_DSTCOLOR
DP_SRC_SOURCE_MEMORY); | ROP3_S
radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, | DP_SRC_SOURCE_MEMORY );
(xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) | OUTREG(DP_WRITE_MSK, 0xffffffff);
(ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0)
| (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0));
#if FLUSH_CACHE_WORKAROUND
radeon_fifo_wait(rinfo, 2); radeon_fifo_wait(2);
OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
#endif
radeon_fifo_wait(rinfo, 3); radeon_fifo_wait(3);
OUTREG(SRC_Y_X, (sy << 16) | sx); OUTREG(SRC_Y_X, (sy << 16) | sx);
OUTREG(DST_Y_X, (dy << 16) | dx); OUTREG(DST_Y_X, (dy << 16) | dx);
OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w); OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w);
...@@ -146,14 +143,15 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) ...@@ -146,14 +143,15 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
modded.width = area->width; modded.width = area->width;
modded.height = area->height; modded.height = area->height;
WARN_ON(rinfo->gfx_mode); if (info->state != FBINFO_STATE_RUNNING)
if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
return; return;
if (info->flags & FBINFO_HWACCEL_DISABLED) { if (info->flags & FBINFO_HWACCEL_DISABLED) {
cfb_copyarea(info, area); cfb_copyarea(info, area);
return; return;
} }
radeon_fixup_offset(rinfo);
vxres = info->var.xres_virtual; vxres = info->var.xres_virtual;
vyres = info->var.yres_virtual; vyres = info->var.yres_virtual;
...@@ -170,116 +168,13 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) ...@@ -170,116 +168,13 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
radeonfb_prim_copyarea(rinfo, &modded); radeonfb_prim_copyarea(rinfo, &modded);
} }
static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo,
const struct fb_image *image,
u32 fg, u32 bg)
{
unsigned int dwords;
u32 *bits;
radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache,
rinfo->dp_gui_mc_base |
GMC_BRUSH_NONE | GMC_DST_CLIP_LEAVE |
GMC_SRC_DATATYPE_MONO_FG_BG |
ROP3_S |
GMC_BYTE_ORDER_MSB_TO_LSB |
DP_SRC_SOURCE_HOST_DATA);
radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache,
DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg);
radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg);
/* Ensure the dst cache is flushed and the engine idle before
* issuing the operation.
*
* This works around engine lockups on some cards
*/
#if FLUSH_CACHE_WORKAROUND
radeon_fifo_wait(rinfo, 2);
OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL);
OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE));
#endif
/* X here pads width to a multiple of 32 and uses the clipper to
* adjust the result. Is that really necessary ? Things seem to
* work ok for me without that and the doco doesn't seem to imply]
* there is such a restriction.
*/
radeon_fifo_wait(rinfo, 4);
OUTREG(SC_TOP_LEFT, (image->dy << 16) | image->dx);
OUTREG(SC_BOTTOM_RIGHT, ((image->dy + image->height) << 16) |
(image->dx + image->width));
OUTREG(DST_Y_X, (image->dy << 16) | image->dx);
OUTREG(DST_HEIGHT_WIDTH, (image->height << 16) | ((image->width + 31) & ~31));
dwords = (image->width + 31) >> 5;
dwords *= image->height;
bits = (u32*)(image->data);
while(dwords >= 8) {
radeon_fifo_wait(rinfo, 8);
#if BITS_PER_LONG == 64
__raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0);
__raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2);
__raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4);
__raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6);
bits += 8;
#else
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7);
#endif
dwords -= 8;
}
while(dwords--) {
radeon_fifo_wait(rinfo, 1);
__raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0);
}
}
void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image) void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image)
{ {
struct radeonfb_info *rinfo = info->par; struct radeonfb_info *rinfo = info->par;
u32 fg, bg;
WARN_ON(rinfo->gfx_mode);
if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode)
return;
if (!image->width || !image->height)
return;
/* We only do 1 bpp color expansion for now */
if (!accel_cexp ||
(info->flags & FBINFO_HWACCEL_DISABLED) || image->depth != 1)
goto fallback;
/* Fallback if running out of the screen. We may do clipping
* in the future */
if ((image->dx + image->width) > info->var.xres_virtual ||
(image->dy + image->height) > info->var.yres_virtual)
goto fallback;
if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
fg = ((u32*)(info->pseudo_palette))[image->fg_color];
bg = ((u32*)(info->pseudo_palette))[image->bg_color];
} else {
fg = image->fg_color;
bg = image->bg_color;
}
radeonfb_prim_imageblit(rinfo, image, fg, bg); if (info->state != FBINFO_STATE_RUNNING)
return; return;
radeon_engine_idle();
fallback:
radeon_engine_idle(rinfo);
cfb_imageblit(info, image); cfb_imageblit(info, image);
} }
...@@ -290,8 +185,7 @@ int radeonfb_sync(struct fb_info *info) ...@@ -290,8 +185,7 @@ int radeonfb_sync(struct fb_info *info)
if (info->state != FBINFO_STATE_RUNNING) if (info->state != FBINFO_STATE_RUNNING)
return 0; return 0;
radeon_engine_idle();
radeon_engine_idle(rinfo);
return 0; return 0;
} }
...@@ -367,10 +261,9 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) ...@@ -367,10 +261,9 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
/* disable 3D engine */ /* disable 3D engine */
OUTREG(RB3D_CNTL, 0); OUTREG(RB3D_CNTL, 0);
rinfo->fifo_free = 0;
radeonfb_engine_reset(rinfo); radeonfb_engine_reset(rinfo);
radeon_fifo_wait(rinfo, 1); radeon_fifo_wait (1);
if (IS_R300_VARIANT(rinfo)) { if (IS_R300_VARIANT(rinfo)) {
OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) | OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) |
RB2D_DC_AUTOFLUSH_ENABLE | RB2D_DC_AUTOFLUSH_ENABLE |
...@@ -384,7 +277,7 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) ...@@ -384,7 +277,7 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
OUTREG(RB2D_DSTCACHE_MODE, 0); OUTREG(RB2D_DSTCACHE_MODE, 0);
} }
radeon_fifo_wait(rinfo, 3); radeon_fifo_wait (3);
/* We re-read MC_FB_LOCATION from card as it can have been /* We re-read MC_FB_LOCATION from card as it can have been
* modified by XFree drivers (ouch !) * modified by XFree drivers (ouch !)
*/ */
...@@ -395,57 +288,41 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) ...@@ -395,57 +288,41 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo)
OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10));
radeon_fifo_wait(rinfo, 1); radeon_fifo_wait (1);
#ifdef __BIG_ENDIAN #if defined(__BIG_ENDIAN)
OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN);
#else #else
OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN);
#endif #endif
radeon_fifo_wait(rinfo, 2); radeon_fifo_wait (2);
OUTREG(DEFAULT_SC_TOP_LEFT, 0); OUTREG(DEFAULT_SC_TOP_LEFT, 0);
OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX |
DEFAULT_SC_BOTTOM_MAX)); DEFAULT_SC_BOTTOM_MAX));
/* set default DP_GUI_MASTER_CNTL */
temp = radeon_get_dstbpp(rinfo->depth); temp = radeon_get_dstbpp(rinfo->depth);
rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS);
rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base | radeon_fifo_wait (1);
OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl |
GMC_BRUSH_SOLID_COLOR | GMC_BRUSH_SOLID_COLOR |
GMC_SRC_DATATYPE_COLOR; GMC_SRC_DATATYPE_COLOR));
radeon_fifo_wait(rinfo, 1);
OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache);
radeon_fifo_wait (7);
/* clear line drawing regs */ /* clear line drawing regs */
radeon_fifo_wait(rinfo, 2);
OUTREG(DST_LINE_START, 0); OUTREG(DST_LINE_START, 0);
OUTREG(DST_LINE_END, 0); OUTREG(DST_LINE_END, 0);
/* set brush and source color regs */ /* set brush color regs */
rinfo->dp_brush_fg_cache = 0xffffffff; OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff);
rinfo->dp_brush_bg_cache = 0x00000000; OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000);
rinfo->dp_src_fg_cache = 0xffffffff;
rinfo->dp_src_bg_cache = 0x00000000; /* set source color regs */
radeon_fifo_wait(rinfo, 4); OUTREG(DP_SRC_FRGD_CLR, 0xffffffff);
OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache); OUTREG(DP_SRC_BKGD_CLR, 0x00000000);
OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache);
OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache);
OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache);
/* Default direction */
rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM;
radeon_fifo_wait(rinfo, 1);
OUTREG(DP_CNTL, rinfo->dp_cntl_cache);
/* default write mask */ /* default write mask */
radeon_fifo_wait(rinfo, 1);
OUTREG(DP_WRITE_MSK, 0xffffffff); OUTREG(DP_WRITE_MSK, 0xffffffff);
/* Default to no swapping of host data */ radeon_engine_idle ();
radeon_fifo_wait(rinfo, 1);
OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE);
/* Make sure it's settled */
radeon_engine_idle(rinfo);
} }
...@@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd) ...@@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd)
level = bd->props.brightness; level = bd->props.brightness;
del_timer_sync(&rinfo->lvds_timer); del_timer_sync(&rinfo->lvds_timer);
radeon_engine_idle(rinfo); radeon_engine_idle();
lvds_gen_cntl = INREG(LVDS_GEN_CNTL); lvds_gen_cntl = INREG(LVDS_GEN_CNTL);
if (level > 0) { if (level > 0) {
......
...@@ -282,8 +282,6 @@ static int backlight = 1; ...@@ -282,8 +282,6 @@ static int backlight = 1;
static int backlight = 0; static int backlight = 0;
#endif #endif
int accel_cexp = 0;
/* /*
* prototypes * prototypes
*/ */
...@@ -854,6 +852,7 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var, ...@@ -854,6 +852,7 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var,
if (rinfo->asleep) if (rinfo->asleep)
return 0; return 0;
radeon_fifo_wait(2);
OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset) OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset)
* var->bits_per_pixel / 8) & ~7); * var->bits_per_pixel / 8) & ~7);
return 0; return 0;
...@@ -883,6 +882,7 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd, ...@@ -883,6 +882,7 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd,
if (rc) if (rc)
return rc; return rc;
radeon_fifo_wait(2);
if (value & 0x01) { if (value & 0x01) {
tmp = INREG(LVDS_GEN_CNTL); tmp = INREG(LVDS_GEN_CNTL);
...@@ -940,7 +940,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch) ...@@ -940,7 +940,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch)
if (rinfo->lock_blank) if (rinfo->lock_blank)
return 0; return 0;
radeon_engine_idle(rinfo); radeon_engine_idle();
val = INREG(CRTC_EXT_CNTL); val = INREG(CRTC_EXT_CNTL);
val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS |
...@@ -1074,6 +1074,8 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green, ...@@ -1074,6 +1074,8 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green,
pindex = regno; pindex = regno;
if (!rinfo->asleep) { if (!rinfo->asleep) {
radeon_fifo_wait(9);
if (rinfo->bpp == 16) { if (rinfo->bpp == 16) {
pindex = regno * 8; pindex = regno * 8;
...@@ -1242,6 +1244,8 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg ...@@ -1242,6 +1244,8 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
{ {
int i; int i;
radeon_fifo_wait(20);
/* Workaround from XFree */ /* Workaround from XFree */
if (rinfo->is_mobility) { if (rinfo->is_mobility) {
/* A temporal workaround for the occational blanking on certain laptop /* A temporal workaround for the occational blanking on certain laptop
...@@ -1337,7 +1341,7 @@ static void radeon_lvds_timer_func(unsigned long data) ...@@ -1337,7 +1341,7 @@ static void radeon_lvds_timer_func(unsigned long data)
{ {
struct radeonfb_info *rinfo = (struct radeonfb_info *)data; struct radeonfb_info *rinfo = (struct radeonfb_info *)data;
radeon_engine_idle(rinfo); radeon_engine_idle();
OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl);
} }
...@@ -1355,11 +1359,10 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, ...@@ -1355,11 +1359,10 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
if (nomodeset) if (nomodeset)
return; return;
radeon_engine_idle(rinfo);
if (!regs_only) if (!regs_only)
radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0);
radeon_fifo_wait(31);
for (i=0; i<10; i++) for (i=0; i<10; i++)
OUTREG(common_regs[i].reg, common_regs[i].val); OUTREG(common_regs[i].reg, common_regs[i].val);
...@@ -1387,6 +1390,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, ...@@ -1387,6 +1390,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
radeon_write_pll_regs(rinfo, mode); radeon_write_pll_regs(rinfo, mode);
if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
radeon_fifo_wait(10);
OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp);
OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp);
OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid);
...@@ -1401,6 +1405,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, ...@@ -1401,6 +1405,7 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode,
if (!regs_only) if (!regs_only)
radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0);
radeon_fifo_wait(2);
OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
return; return;
...@@ -1551,7 +1556,7 @@ static int radeonfb_set_par(struct fb_info *info) ...@@ -1551,7 +1556,7 @@ static int radeonfb_set_par(struct fb_info *info)
/* We always want engine to be idle on a mode switch, even /* We always want engine to be idle on a mode switch, even
* if we won't actually change the mode * if we won't actually change the mode
*/ */
radeon_engine_idle(rinfo); radeon_engine_idle();
hSyncStart = mode->xres + mode->right_margin; hSyncStart = mode->xres + mode->right_margin;
hSyncEnd = hSyncStart + mode->hsync_len; hSyncEnd = hSyncStart + mode->hsync_len;
...@@ -1846,6 +1851,7 @@ static int radeonfb_set_par(struct fb_info *info) ...@@ -1846,6 +1851,7 @@ static int radeonfb_set_par(struct fb_info *info)
return 0; return 0;
} }
static struct fb_ops radeonfb_ops = { static struct fb_ops radeonfb_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.fb_check_var = radeonfb_check_var, .fb_check_var = radeonfb_check_var,
...@@ -1869,7 +1875,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) ...@@ -1869,7 +1875,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
info->par = rinfo; info->par = rinfo;
info->pseudo_palette = rinfo->pseudo_palette; info->pseudo_palette = rinfo->pseudo_palette;
info->flags = FBINFO_DEFAULT info->flags = FBINFO_DEFAULT
| FBINFO_HWACCEL_IMAGEBLIT
| FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_COPYAREA
| FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_FILLRECT
| FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_XPAN
...@@ -1877,7 +1882,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) ...@@ -1877,7 +1882,6 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
info->fbops = &radeonfb_ops; info->fbops = &radeonfb_ops;
info->screen_base = rinfo->fb_base; info->screen_base = rinfo->fb_base;
info->screen_size = rinfo->mapped_vram; info->screen_size = rinfo->mapped_vram;
/* Fill fix common fields */ /* Fill fix common fields */
strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); strlcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
info->fix.smem_start = rinfo->fb_base_phys; info->fix.smem_start = rinfo->fb_base_phys;
...@@ -1892,25 +1896,8 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) ...@@ -1892,25 +1896,8 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo)
info->fix.mmio_len = RADEON_REGSIZE; info->fix.mmio_len = RADEON_REGSIZE;
info->fix.accel = FB_ACCEL_ATI_RADEON; info->fix.accel = FB_ACCEL_ATI_RADEON;
/* Allocate colormap */
fb_alloc_cmap(&info->cmap, 256, 0); fb_alloc_cmap(&info->cmap, 256, 0);
/* Setup pixmap used for acceleration */
#define PIXMAP_SIZE (2048 * 4)
info->pixmap.addr = kmalloc(PIXMAP_SIZE, GFP_KERNEL);
if (!info->pixmap.addr) {
printk(KERN_ERR "radeonfb: Failed to allocate pixmap !\n");
noaccel = 1;
goto bail;
}
info->pixmap.size = PIXMAP_SIZE;
info->pixmap.flags = FB_PIXMAP_SYSTEM;
info->pixmap.scan_align = 4;
info->pixmap.buf_align = 4;
info->pixmap.access_align = 32;
bail:
if (noaccel) if (noaccel)
info->flags |= FBINFO_HWACCEL_DISABLED; info->flags |= FBINFO_HWACCEL_DISABLED;
...@@ -2019,6 +2006,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo) ...@@ -2019,6 +2006,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
u32 tom = INREG(NB_TOM); u32 tom = INREG(NB_TOM);
tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
radeon_fifo_wait(6);
OUTREG(MC_FB_LOCATION, tom); OUTREG(MC_FB_LOCATION, tom);
OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
...@@ -2522,8 +2510,6 @@ static int __init radeonfb_setup (char *options) ...@@ -2522,8 +2510,6 @@ static int __init radeonfb_setup (char *options)
} else if (!strncmp(this_opt, "ignore_devlist", 14)) { } else if (!strncmp(this_opt, "ignore_devlist", 14)) {
ignore_devlist = 1; ignore_devlist = 1;
#endif #endif
} else if (!strncmp(this_opt, "accel_cexp", 12)) {
accel_cexp = 1;
} else } else
mode_option = this_opt; mode_option = this_opt;
} }
...@@ -2571,8 +2557,6 @@ module_param(monitor_layout, charp, 0); ...@@ -2571,8 +2557,6 @@ module_param(monitor_layout, charp, 0);
MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)"); MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)");
module_param(force_measure_pll, bool, 0); module_param(force_measure_pll, bool, 0);
MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)"); MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)");
module_param(accel_cexp, bool, 0);
MODULE_PARM_DESC(accel_cexp, "Use acceleration engine for color expansion");
#ifdef CONFIG_MTRR #ifdef CONFIG_MTRR
module_param(nomtrr, bool, 0); module_param(nomtrr, bool, 0);
MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers"); MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers");
......
...@@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) ...@@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { if (!(info->flags & FBINFO_HWACCEL_DISABLED)) {
/* Make sure engine is reset */ /* Make sure engine is reset */
radeon_engine_idle(rinfo); radeon_engine_idle();
radeonfb_engine_reset(rinfo); radeonfb_engine_reset(rinfo);
radeon_engine_idle(rinfo); radeon_engine_idle();
} }
/* Blank display and LCD */ /* Blank display and LCD */
...@@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev) ...@@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev)
rinfo->asleep = 0; rinfo->asleep = 0;
} else } else
radeon_engine_idle(rinfo); radeon_engine_idle();
/* Restore display & engine */ /* Restore display & engine */
radeon_write_mode (rinfo, &rinfo->state, 1); radeon_write_mode (rinfo, &rinfo->state, 1);
......
...@@ -336,15 +336,7 @@ struct radeonfb_info { ...@@ -336,15 +336,7 @@ struct radeonfb_info {
int mon2_type; int mon2_type;
u8 *mon2_EDID; u8 *mon2_EDID;
/* accel bits */ u32 dp_gui_master_cntl;
u32 dp_gui_mc_base;
u32 dp_gui_mc_cache;
u32 dp_cntl_cache;
u32 dp_brush_fg_cache;
u32 dp_brush_bg_cache;
u32 dp_src_fg_cache;
u32 dp_src_bg_cache;
u32 fifo_free;
struct pll_info pll; struct pll_info pll;
...@@ -356,7 +348,6 @@ struct radeonfb_info { ...@@ -356,7 +348,6 @@ struct radeonfb_info {
int lock_blank; int lock_blank;
int dynclk; int dynclk;
int no_schedule; int no_schedule;
int gfx_mode;
enum radeon_pm_mode pm_mode; enum radeon_pm_mode pm_mode;
reinit_function_ptr reinit_func; reinit_function_ptr reinit_func;
...@@ -401,14 +392,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms) ...@@ -401,14 +392,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms)
#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
#define INREG16(addr) readw((rinfo->mmio_base)+addr) #define INREG16(addr) readw((rinfo->mmio_base)+addr)
#define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
#ifdef CONFIG_PPC
#define INREG(addr) ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); })
#define OUTREG(addr,val) do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0)
#else
#define INREG(addr) readl((rinfo->mmio_base)+addr) #define INREG(addr) readl((rinfo->mmio_base)+addr)
#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
#endif
static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
u32 val, u32 mask) u32 val, u32 mask)
...@@ -550,7 +535,17 @@ static inline u32 radeon_get_dstbpp(u16 depth) ...@@ -550,7 +535,17 @@ static inline u32 radeon_get_dstbpp(u16 depth)
* 2D Engine helper routines * 2D Engine helper routines
*/ */
extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries); static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
{
int i;
for (i=0; i<2000000; i++) {
if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
return;
udelay(1);
}
printk(KERN_ERR "radeonfb: FIFO Timeout !\n");
}
static inline void radeon_engine_flush (struct radeonfb_info *rinfo) static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
{ {
...@@ -563,7 +558,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) ...@@ -563,7 +558,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
/* Ensure FIFO is empty, ie, make sure the flush commands /* Ensure FIFO is empty, ie, make sure the flush commands
* has reached the cache * has reached the cache
*/ */
radeon_fifo_update_and_wait(rinfo, 64); _radeon_fifo_wait (rinfo, 64);
/* Wait for the flush to complete */ /* Wait for the flush to complete */
for (i=0; i < 2000000; i++) { for (i=0; i < 2000000; i++) {
...@@ -575,12 +570,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) ...@@ -575,12 +570,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
} }
static inline void radeon_engine_idle(struct radeonfb_info *rinfo) static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
{ {
int i; int i;
/* ensure FIFO is empty before waiting for idle */ /* ensure FIFO is empty before waiting for idle */
radeon_fifo_update_and_wait (rinfo, 64); _radeon_fifo_wait (rinfo, 64);
for (i=0; i<2000000; i++) { for (i=0; i<2000000; i++) {
if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
...@@ -593,6 +588,8 @@ static inline void radeon_engine_idle(struct radeonfb_info *rinfo) ...@@ -593,6 +588,8 @@ static inline void radeon_engine_idle(struct radeonfb_info *rinfo)
} }
#define radeon_engine_idle() _radeon_engine_idle(rinfo)
#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
#define radeon_msleep(ms) _radeon_msleep(rinfo,ms) #define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
...@@ -622,7 +619,6 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image); ...@@ -622,7 +619,6 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image);
extern int radeonfb_sync(struct fb_info *info); extern int radeonfb_sync(struct fb_info *info);
extern void radeonfb_engine_init (struct radeonfb_info *rinfo); extern void radeonfb_engine_init (struct radeonfb_info *rinfo);
extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); extern void radeonfb_engine_reset(struct radeonfb_info *rinfo);
extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo);
/* Other functions */ /* Other functions */
extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch);
...@@ -638,6 +634,4 @@ static inline void radeonfb_bl_init(struct radeonfb_info *rinfo) {} ...@@ -638,6 +634,4 @@ static inline void radeonfb_bl_init(struct radeonfb_info *rinfo) {}
static inline void radeonfb_bl_exit(struct radeonfb_info *rinfo) {} static inline void radeonfb_bl_exit(struct radeonfb_info *rinfo) {}
#endif #endif
extern int accel_cexp;
#endif /* __RADEONFB_H__ */ #endif /* __RADEONFB_H__ */
...@@ -525,9 +525,6 @@ ...@@ -525,9 +525,6 @@
#define CRTC_DISPLAY_DIS (1 << 10) #define CRTC_DISPLAY_DIS (1 << 10)
#define CRTC_CRT_ON (1 << 15) #define CRTC_CRT_ON (1 << 15)
/* DSTCACHE_MODE bits constants */
#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8)
#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17)
/* DSTCACHE_CTLSTAT bit constants */ /* DSTCACHE_CTLSTAT bit constants */
#define RB2D_DC_FLUSH_2D (1 << 0) #define RB2D_DC_FLUSH_2D (1 << 0)
...@@ -869,10 +866,15 @@ ...@@ -869,10 +866,15 @@
#define GMC_DST_16BPP_YVYU422 0x00000c00 #define GMC_DST_16BPP_YVYU422 0x00000c00
#define GMC_DST_32BPP_AYUV444 0x00000e00 #define GMC_DST_32BPP_AYUV444 0x00000e00
#define GMC_DST_16BPP_ARGB4444 0x00000f00 #define GMC_DST_16BPP_ARGB4444 0x00000f00
#define GMC_SRC_MONO 0x00000000
#define GMC_SRC_MONO_LBKGD 0x00001000
#define GMC_SRC_DSTCOLOR 0x00003000
#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000
#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000
#define GMC_DP_CONVERSION_TEMP_9300 0x00008000 #define GMC_DP_CONVERSION_TEMP_9300 0x00008000
#define GMC_DP_CONVERSION_TEMP_6500 0x00000000 #define GMC_DP_CONVERSION_TEMP_6500 0x00000000
#define GMC_DP_SRC_RECT 0x02000000
#define GMC_DP_SRC_HOST 0x03000000
#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000
#define GMC_3D_FCN_EN_CLR 0x00000000 #define GMC_3D_FCN_EN_CLR 0x00000000
#define GMC_3D_FCN_EN_SET 0x08000000 #define GMC_3D_FCN_EN_SET 0x08000000
...@@ -883,9 +885,6 @@ ...@@ -883,9 +885,6 @@
#define GMC_WRITE_MASK_LEAVE 0x00000000 #define GMC_WRITE_MASK_LEAVE 0x00000000
#define GMC_WRITE_MASK_SET 0x40000000 #define GMC_WRITE_MASK_SET 0x40000000
#define GMC_CLR_CMP_CNTL_DIS (1 << 28) #define GMC_CLR_CMP_CNTL_DIS (1 << 28)
#define GMC_SRC_DATATYPE_MASK (3 << 12)
#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12)
#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12)
#define GMC_SRC_DATATYPE_COLOR (3 << 12) #define GMC_SRC_DATATYPE_COLOR (3 << 12)
#define ROP3_S 0x00cc0000 #define ROP3_S 0x00cc0000
#define ROP3_SRCCOPY 0x00cc0000 #define ROP3_SRCCOPY 0x00cc0000
...@@ -894,7 +893,6 @@ ...@@ -894,7 +893,6 @@
#define DP_SRC_SOURCE_MASK (7 << 24) #define DP_SRC_SOURCE_MASK (7 << 24)
#define GMC_BRUSH_NONE (15 << 4) #define GMC_BRUSH_NONE (15 << 4)
#define DP_SRC_SOURCE_MEMORY (2 << 24) #define DP_SRC_SOURCE_MEMORY (2 << 24)
#define DP_SRC_SOURCE_HOST_DATA (3 << 24)
#define GMC_BRUSH_SOLIDCOLOR 0x000000d0 #define GMC_BRUSH_SOLIDCOLOR 0x000000d0
/* DP_MIX bit constants */ /* DP_MIX bit constants */
...@@ -980,12 +978,6 @@ ...@@ -980,12 +978,6 @@
#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25)
#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26)
/* RBBM_GUICNTL constants */
#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0)
#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0)
#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0)
#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0)
/* masks */ /* masks */
#define CONFIG_MEMSIZE_MASK 0x1f000000 #define CONFIG_MEMSIZE_MASK 0x1f000000
......
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