Commit 04705129 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.15, please pull the following:

- Stefan fixes the VEC (video encoder) bus address for 2711, fixes the
  MDIO bus controller #address-cells/#size-cells inversion and the SDIO
  regulator voltage ranges

- Nicolas fixes DTC warnings for the PCIe host bridge and its child
  USB device

* tag 'arm-soc/for-5.15/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address
  ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting
  ARM: dts: bcm2711-rpi-4-b: fix sd_io_1v8_reg regulator states
  ARM: dts: bcm2711: fix MDIO #address- and #size-cells
  ARM: dts: bcm283x: Fix VEC address for BCM2711

Link: https://lore.kernel.org/r/20211012213841.1872021-1-f.fainelli@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 209ee634 bc22b620
...@@ -40,8 +40,8 @@ sd_io_1v8_reg: sd_io_1v8_reg { ...@@ -40,8 +40,8 @@ sd_io_1v8_reg: sd_io_1v8_reg {
regulator-always-on; regulator-always-on;
regulator-settling-time-us = <5000>; regulator-settling-time-us = <5000>;
gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1 states = <1800000 0x1>,
3300000 0x0>; <3300000 0x0>;
status = "okay"; status = "okay";
}; };
...@@ -217,15 +217,16 @@ phy1: ethernet-phy@1 { ...@@ -217,15 +217,16 @@ phy1: ethernet-phy@1 {
}; };
&pcie0 { &pcie0 {
pci@1,0 { pci@0,0 {
device_type = "pci";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
usb@1,0 { usb@0,0 {
reg = <0x10000 0 0 0 0>; reg = <0 0 0 0 0>;
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>; resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
}; };
}; };
......
...@@ -300,6 +300,14 @@ pixelvalve3: pixelvalve@7ec12000 { ...@@ -300,6 +300,14 @@ pixelvalve3: pixelvalve@7ec12000 {
status = "disabled"; status = "disabled";
}; };
vec: vec@7ec13000 {
compatible = "brcm,bcm2711-vec";
reg = <0x7ec13000 0x1000>;
clocks = <&clocks BCM2835_CLOCK_VEC>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
dvp: clock@7ef00000 { dvp: clock@7ef00000 {
compatible = "brcm,brcm2711-dvp"; compatible = "brcm,brcm2711-dvp";
reg = <0x7ef00000 0x10>; reg = <0x7ef00000 0x10>;
...@@ -532,8 +540,8 @@ genet_mdio: mdio@e14 { ...@@ -532,8 +540,8 @@ genet_mdio: mdio@e14 {
compatible = "brcm,genet-mdio-v5"; compatible = "brcm,genet-mdio-v5";
reg = <0xe14 0x8>; reg = <0xe14 0x8>;
reg-names = "mdio"; reg-names = "mdio";
#address-cells = <0x0>; #address-cells = <0x1>;
#size-cells = <0x1>; #size-cells = <0x0>;
}; };
}; };
}; };
......
...@@ -106,6 +106,14 @@ i2c2: i2c@7e805000 { ...@@ -106,6 +106,14 @@ i2c2: i2c@7e805000 {
status = "okay"; status = "okay";
}; };
vec: vec@7e806000 {
compatible = "brcm,bcm2835-vec";
reg = <0x7e806000 0x1000>;
clocks = <&clocks BCM2835_CLOCK_VEC>;
interrupts = <2 27>;
status = "disabled";
};
pixelvalve@7e807000 { pixelvalve@7e807000 {
compatible = "brcm,bcm2835-pixelvalve2"; compatible = "brcm,bcm2835-pixelvalve2";
reg = <0x7e807000 0x100>; reg = <0x7e807000 0x100>;
......
...@@ -464,14 +464,6 @@ i2c1: i2c@7e804000 { ...@@ -464,14 +464,6 @@ i2c1: i2c@7e804000 {
status = "disabled"; status = "disabled";
}; };
vec: vec@7e806000 {
compatible = "brcm,bcm2835-vec";
reg = <0x7e806000 0x1000>;
clocks = <&clocks BCM2835_CLOCK_VEC>;
interrupts = <2 27>;
status = "disabled";
};
usb: usb@7e980000 { usb: usb@7e980000 {
compatible = "brcm,bcm2835-usb"; compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>; reg = <0x7e980000 0x10000>;
......
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