Commit 0665ccc4 authored by Chanwoo Choi's avatar Chanwoo Choi Committed by Kukjin Kim

clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0

Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to
the generic mmio clocksource infrastructure
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 65f5eaa2
...@@ -726,6 +726,7 @@ config ARCH_S5P64X0 ...@@ -726,6 +726,7 @@ config ARCH_S5P64X0
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO
select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C2410_WATCHDOG if WATCHDOG
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select HAVE_SCHED_CLOCK select HAVE_SCHED_CLOCK
...@@ -756,6 +757,7 @@ config ARCH_S5PV210 ...@@ -756,6 +757,7 @@ config ARCH_S5PV210
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO
select ARM_L1_CACHE_SHIFT_6 select ARM_L1_CACHE_SHIFT_6
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
......
...@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void) ...@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
return S3C_TIMERREG(offset); return S3C_TIMERREG(offset);
} }
static cycle_t s5p_timer_read(struct clocksource *cs)
{
void __iomem *reg = s5p_timer_reg();
return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
}
/* /*
* Override the global weak sched_clock symbol with this * Override the global weak sched_clock symbol with this
* local implementation which uses the clocksource to get some * local implementation which uses the clocksource to get some
...@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void) ...@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
} }
struct clocksource time_clocksource = {
.name = "s5p_clocksource_timer",
.rating = 250,
.read = s5p_timer_read,
.mask = CLOCKSOURCE_MASK(32),
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static void __init s5p_clocksource_init(void) static void __init s5p_clocksource_init(void)
{ {
unsigned long pclk; unsigned long pclk;
...@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void) ...@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
if (clocksource_register_hz(&time_clocksource, clock_rate)) if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
panic("%s: can't register clocksource\n", time_clocksource.name); clock_rate, 250, 32, clocksource_mmio_readl_down))
panic("s5p_clocksource_timer: can't register clocksource\n");
} }
static void __init s5p_timer_resources(void) static void __init s5p_timer_resources(void)
......
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