Commit 08437cc3 authored by Russell King's avatar Russell King

[SERIAL] 8250: add UART_CAP_SLEEP capability.

parent e04f6ab5
...@@ -164,13 +164,13 @@ static const struct serial8250_config uart_config[PORT_MAX_8250+1] = { ...@@ -164,13 +164,13 @@ static const struct serial8250_config uart_config[PORT_MAX_8250+1] = {
{ "16550", 1, 1, 0 }, { "16550", 1, 1, 0 },
{ "16550A", 16, 16, UART_CAP_FIFO }, { "16550A", 16, 16, UART_CAP_FIFO },
{ "Cirrus", 1, 1, 0 }, { "Cirrus", 1, 1, 0 },
{ "ST16650", 1, 1, UART_CAP_FIFO | UART_STARTECH }, { "ST16650", 1, 1, UART_CAP_FIFO | UART_CAP_SLEEP | UART_STARTECH },
{ "ST16650V2", 32, 16, UART_CAP_FIFO | UART_STARTECH }, { "ST16650V2", 32, 16, UART_CAP_FIFO | UART_CAP_SLEEP | UART_STARTECH },
{ "TI16750", 64, 64, UART_CAP_FIFO }, { "TI16750", 64, 64, UART_CAP_FIFO | UART_CAP_SLEEP },
{ "Startech", 1, 1, 0 }, { "Startech", 1, 1, 0 },
{ "16C950/954", 128, 128, UART_CAP_FIFO }, { "16C950/954", 128, 128, UART_CAP_FIFO },
{ "ST16654", 64, 32, UART_CAP_FIFO | UART_STARTECH }, { "ST16654", 64, 32, UART_CAP_FIFO | UART_CAP_SLEEP | UART_STARTECH },
{ "XR16850", 128, 128, UART_CAP_FIFO | UART_STARTECH }, { "XR16850", 128, 128, UART_CAP_FIFO | UART_CAP_SLEEP | UART_STARTECH },
{ "RSA", 2048, 2048, UART_CAP_FIFO }, { "RSA", 2048, 2048, UART_CAP_FIFO },
{ "NS16550A", 16, 16, UART_CAP_FIFO | UART_NATSEMI }, { "NS16550A", 16, 16, UART_CAP_FIFO | UART_NATSEMI },
{ "XScale", 32, 32, UART_CAP_FIFO }, { "XScale", 32, 32, UART_CAP_FIFO },
...@@ -262,18 +262,18 @@ static inline void serial8250_clear_fifos(struct uart_8250_port *p) ...@@ -262,18 +262,18 @@ static inline void serial8250_clear_fifos(struct uart_8250_port *p)
*/ */
static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep) static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
{ {
if (up->capabilities & UART_STARTECH) { if (p->capabilities & UART_CAP_SLEEP) {
serial_outp(up, UART_LCR, 0xBF); if (p->capabilities & UART_STARTECH) {
serial_outp(up, UART_EFR, UART_EFR_ECB); serial_outp(p, UART_LCR, 0xBF);
serial_outp(up, UART_LCR, 0); serial_outp(p, UART_EFR, UART_EFR_ECB);
serial_outp(up, UART_IER, sleep ? UART_IERX_SLEEP : 0); serial_outp(p, UART_LCR, 0);
serial_outp(up, UART_LCR, 0xBF); }
serial_outp(up, UART_EFR, 0); serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
serial_outp(up, UART_LCR, 0); if (p->capabilities & UART_STARTECH) {
serial_outp(p, UART_LCR, 0xBF);
serial_outp(p, UART_EFR, 0);
serial_outp(p, UART_LCR, 0);
} }
if (up->port.type == PORT_16750) {
/* Arrange to enter sleep mode */
serial_outp(up, UART_IER, sleep ? UART_IERX_SLEEP : 0);
} }
} }
......
...@@ -44,6 +44,7 @@ struct serial8250_config { ...@@ -44,6 +44,7 @@ struct serial8250_config {
}; };
#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */ #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
#undef SERIAL_DEBUG_PCI #undef SERIAL_DEBUG_PCI
......
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