Commit 0c3d0174 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: cosmetic fix

Fix coding style and drop unused variable.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6ad87101
...@@ -811,9 +811,6 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr) ...@@ -811,9 +811,6 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr)
enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false; enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false;
data->smu_features[i].enabled = enabled; data->smu_features[i].enabled = enabled;
data->smu_features[i].supported = enabled; data->smu_features[i].supported = enabled;
PP_ASSERT(
!data->smu_features[i].allowed || enabled,
"[EnableAllSMUFeatures] Enabled feature is different from allowed, expected disabled!");
} }
} }
...@@ -1230,8 +1227,8 @@ static int vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx ...@@ -1230,8 +1227,8 @@ static int vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx
*gfx_freq = 0; *gfx_freq = 0;
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,
smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0, PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0,
"[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK Frequency Failed!", "[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK Frequency Failed!",
return -1); return -1);
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(
...@@ -1790,7 +1787,6 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, ...@@ -1790,7 +1787,6 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
{ {
struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
Watermarks_t *table = &(data->smc_state_table.water_marks_table); Watermarks_t *table = &(data->smc_state_table.water_marks_table);
int result = 0;
uint32_t i; uint32_t i;
if (!data->registry_data.disable_water_mark && if (!data->registry_data.disable_water_mark &&
...@@ -1841,7 +1837,7 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, ...@@ -1841,7 +1837,7 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
data->water_marks_bitmap &= ~WaterMarksLoaded; data->water_marks_bitmap &= ~WaterMarksLoaded;
} }
return result; return 0;
} }
static int vega12_force_clock_level(struct pp_hwmgr *hwmgr, static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment