Commit 0e54dbd4 authored by Ivan Safonov's avatar Ivan Safonov Committed by Greg Kroah-Hartman

staging: rtl8188eu: remove PWR_INTF_*_MSK macro definitions and interface_mask...

staging: rtl8188eu: remove PWR_INTF_*_MSK macro definitions and interface_mask of wl_pwr_cfg structure

This driver is intended only for usb devices.
Signed-off-by: default avatarIvan Safonov <insafonov@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3f1599e8
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
* for RTL8723/RTL8188E Series IC. * for RTL8723/RTL8188E Series IC.
*/ */
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[]) struct wl_pwr_cfg pwrseqcmd[])
{ {
struct wl_pwr_cfg pwrcfgcmd = {0}; struct wl_pwr_cfg pwrcfgcmd = {0};
u8 poll_bit = false; u8 poll_bit = false;
...@@ -39,19 +39,17 @@ u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, ...@@ -39,19 +39,17 @@ u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
RT_TRACE(_module_hal_init_c_, _drv_info_, RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)" ("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
"interface_msk(%#x) base(%#x) cmd(%#x)" " base(%#x) cmd(%#x)"
"msk(%#x) value(%#x)\n", "msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(pwrcfgcmd), GET_PWR_CFG_OFFSET(pwrcfgcmd),
GET_PWR_CFG_CUT_MASK(pwrcfgcmd), GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
GET_PWR_CFG_INTF_MASK(pwrcfgcmd),
GET_PWR_CFG_BASE(pwrcfgcmd), GET_PWR_CFG_BASE(pwrcfgcmd),
GET_PWR_CFG_CMD(pwrcfgcmd), GET_PWR_CFG_CMD(pwrcfgcmd),
GET_PWR_CFG_MASK(pwrcfgcmd), GET_PWR_CFG_MASK(pwrcfgcmd),
GET_PWR_CFG_VALUE(pwrcfgcmd))); GET_PWR_CFG_VALUE(pwrcfgcmd)));
/* Only Handle the command whose CUT and Interface are matched */ /* Only Handle the command whose CUT is matched */
if ((GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) && if (GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) {
(GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_READ: case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_, _drv_info_, RT_TRACE(_module_hal_init_c_, _drv_info_,
......
...@@ -107,7 +107,7 @@ static u32 rtl8188eu_InitPowerOn(struct adapter *adapt) ...@@ -107,7 +107,7 @@ static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
if (haldata->bMacPwrCtrlOn) if (haldata->bMacPwrCtrlOn)
return _SUCCESS; return _SUCCESS;
if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK, PWR_INTF_USB_MSK, if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
Rtl8188E_NIC_PWR_ON_FLOW)) { Rtl8188E_NIC_PWR_ON_FLOW)) {
DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__); DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
return _FAIL; return _FAIL;
...@@ -924,7 +924,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) ...@@ -924,7 +924,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter)
usb_write8(Adapter, REG_CR, 0x0); usb_write8(Adapter, REG_CR, 0x0);
/* Run LPS WL RFOFF flow */ /* Run LPS WL RFOFF flow */
rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK, PWR_INTF_USB_MSK, rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
Rtl8188E_NIC_LPS_ENTER_FLOW); Rtl8188E_NIC_LPS_ENTER_FLOW);
/* 2. 0x1F[7:0] = 0 turn off RF */ /* 2. 0x1F[7:0] = 0 turn off RF */
...@@ -946,7 +946,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter) ...@@ -946,7 +946,7 @@ static void CardDisableRTL8188EU(struct adapter *Adapter)
usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0))); usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
/* Card disable power action flow */ /* Card disable power action flow */
rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK, PWR_INTF_USB_MSK, rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
Rtl8188E_NIC_DISABLE_FLOW); Rtl8188E_NIC_DISABLE_FLOW);
/* Reset MCU IO Wrapper */ /* Reset MCU IO Wrapper */
......
This diff is collapsed.
...@@ -36,12 +36,6 @@ ...@@ -36,12 +36,6 @@
#define PWR_BASEADDR_PCIE 0x02 #define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03 #define PWR_BASEADDR_SDIO 0x03
/* The value of interface_msk: 4 bits */
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/* The value of cut_msk: 8 bits */ /* The value of cut_msk: 8 bits */
#define PWR_CUT_TESTCHIP_MSK BIT(0) #define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1) #define PWR_CUT_A_MSK BIT(1)
...@@ -62,7 +56,6 @@ enum pwrseq_cmd_delat_unit { ...@@ -62,7 +56,6 @@ enum pwrseq_cmd_delat_unit {
struct wl_pwr_cfg { struct wl_pwr_cfg {
u16 offset; u16 offset;
u8 cut_msk; u8 cut_msk;
u8 interface_msk:4;
u8 base:4; u8 base:4;
u8 cmd:4; u8 cmd:4;
u8 msk; u8 msk;
...@@ -71,13 +64,12 @@ struct wl_pwr_cfg { ...@@ -71,13 +64,12 @@ struct wl_pwr_cfg {
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset #define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk #define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base #define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd #define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value #define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers,
u8 ifacetype, struct wl_pwr_cfg pwrcfgCmd[]); struct wl_pwr_cfg pwrcfgCmd[]);
#endif #endif
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