Commit 0e59dc9e authored by Trevor Gamblin's avatar Trevor Gamblin Committed by Jonathan Cameron

iio: imu: inv_icm42600: make use of regmap_clear_bits(), regmap_set_bits()

Instead of using regmap_update_bits() and passing the mask twice, use
regmap_set_bits().

Instead of using regmap_update_bits() and passing val = 0, use
regmap_clear_bits().
Suggested-by: default avatarUwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: default avatarTrevor Gamblin <tgamblin@baylibre.com>
Acked-by: default avatarJean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Acked-by: default avatarUwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20240617-review-v3-27-88d1338c4cca@baylibre.comSigned-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 51373588
......@@ -274,8 +274,7 @@ int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st)
/* restore watermark interrupt */
if (restore) {
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
if (ret)
return ret;
......@@ -318,8 +317,7 @@ static int inv_icm42600_buffer_postenable(struct iio_dev *indio_dev)
}
/* set FIFO threshold interrupt */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN,
ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
if (ret)
goto out_unlock;
......@@ -375,8 +373,8 @@ static int inv_icm42600_buffer_predisable(struct iio_dev *indio_dev)
goto out_unlock;
/* disable FIFO threshold interrupt */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 0);
ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_SOURCE0,
INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN);
if (ret)
goto out_unlock;
......
......@@ -496,8 +496,7 @@ static int inv_icm42600_setup(struct inv_icm42600_state *st,
return ret;
/* sensor data in big-endian (default) */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN,
ret = regmap_set_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0,
INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN);
if (ret)
return ret;
......@@ -603,8 +602,8 @@ static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq,
return ret;
/* Deassert async reset for proper INT pin operation (cf datasheet) */
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_CONFIG1,
INV_ICM42600_INT_CONFIG1_ASYNC_RESET, 0);
ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_CONFIG1,
INV_ICM42600_INT_CONFIG1_ASYNC_RESET);
if (ret)
return ret;
......
......@@ -28,8 +28,8 @@ static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st)
INV_ICM42600_INTF_CONFIG6_MASK,
INV_ICM42600_INTF_CONFIG6_I3C_EN);
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY);
if (ret)
return ret;
......
......@@ -27,8 +27,8 @@ static int inv_icm42600_spi_bus_setup(struct inv_icm42600_state *st)
if (ret)
return ret;
ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY);
if (ret)
return ret;
......
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