Commit 0fc980db authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman

powerpc/vdso: Merge __kernel_sync_dicache_p5() into __kernel_sync_dicache()

__kernel_sync_dicache_p5() is an alternative to
__kernel_sync_dicache() when cpu has CPU_FTR_COHERENT_ICACHE

Remove this alternative function and merge
__kernel_sync_dicache_p5() into __kernel_sync_dicache() using
standard CPU feature fixup.
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/4c7dcc6544882761b2b0249d7a8ec2c3a8088cb5.1601197618.git.christophe.leroy@csgroup.eu
parent ed07f635
...@@ -87,10 +87,6 @@ struct vdso_patch_def ...@@ -87,10 +87,6 @@ struct vdso_patch_def
* with a coherent icache * with a coherent icache
*/ */
static struct vdso_patch_def vdso_patches[] = { static struct vdso_patch_def vdso_patches[] = {
{
CPU_FTR_COHERENT_ICACHE, CPU_FTR_COHERENT_ICACHE,
"__kernel_sync_dicache", "__kernel_sync_dicache_p5"
},
}; };
/* /*
......
...@@ -24,11 +24,15 @@ ...@@ -24,11 +24,15 @@
*/ */
V_FUNCTION_BEGIN(__kernel_sync_dicache) V_FUNCTION_BEGIN(__kernel_sync_dicache)
.cfi_startproc .cfi_startproc
BEGIN_FTR_SECTION
b 3f
END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
mflr r12 mflr r12
.cfi_register lr,r12 .cfi_register lr,r12
get_datapage r10 get_datapage r10
mtlr r12 mtlr r12
.cfi_restore lr
#endif #endif
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
...@@ -84,20 +88,11 @@ V_FUNCTION_BEGIN(__kernel_sync_dicache) ...@@ -84,20 +88,11 @@ V_FUNCTION_BEGIN(__kernel_sync_dicache)
isync isync
li r3,0 li r3,0
blr blr
.cfi_endproc 3:
V_FUNCTION_END(__kernel_sync_dicache)
/*
* POWER5 version of __kernel_sync_dicache
*/
V_FUNCTION_BEGIN(__kernel_sync_dicache_p5)
.cfi_startproc
crclr cr0*4+so crclr cr0*4+so
sync sync
isync isync
li r3,0 li r3,0
blr blr
.cfi_endproc .cfi_endproc
V_FUNCTION_END(__kernel_sync_dicache_p5) V_FUNCTION_END(__kernel_sync_dicache)
...@@ -162,7 +162,6 @@ VERSION ...@@ -162,7 +162,6 @@ VERSION
__kernel_time; __kernel_time;
__kernel_get_tbfreq; __kernel_get_tbfreq;
__kernel_sync_dicache; __kernel_sync_dicache;
__kernel_sync_dicache_p5;
__kernel_sigtramp32; __kernel_sigtramp32;
__kernel_sigtramp_rt32; __kernel_sigtramp_rt32;
#if defined(CONFIG_PPC64) || !defined(CONFIG_SMP) #if defined(CONFIG_PPC64) || !defined(CONFIG_SMP)
......
...@@ -23,10 +23,14 @@ ...@@ -23,10 +23,14 @@
*/ */
V_FUNCTION_BEGIN(__kernel_sync_dicache) V_FUNCTION_BEGIN(__kernel_sync_dicache)
.cfi_startproc .cfi_startproc
BEGIN_FTR_SECTION
b 3f
END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
mflr r12 mflr r12
.cfi_register lr,r12 .cfi_register lr,r12
get_datapage r10 get_datapage r10
mtlr r12 mtlr r12
.cfi_restore lr
lwz r7,CFG_DCACHE_BLOCKSZ(r10) lwz r7,CFG_DCACHE_BLOCKSZ(r10)
addi r5,r7,-1 addi r5,r7,-1
...@@ -61,19 +65,11 @@ V_FUNCTION_BEGIN(__kernel_sync_dicache) ...@@ -61,19 +65,11 @@ V_FUNCTION_BEGIN(__kernel_sync_dicache)
isync isync
li r3,0 li r3,0
blr blr
.cfi_endproc 3:
V_FUNCTION_END(__kernel_sync_dicache)
/*
* POWER5 version of __kernel_sync_dicache
*/
V_FUNCTION_BEGIN(__kernel_sync_dicache_p5)
.cfi_startproc
crclr cr0*4+so crclr cr0*4+so
sync sync
isync isync
li r3,0 li r3,0
blr blr
.cfi_endproc .cfi_endproc
V_FUNCTION_END(__kernel_sync_dicache_p5) V_FUNCTION_END(__kernel_sync_dicache)
...@@ -159,7 +159,6 @@ VERSION ...@@ -159,7 +159,6 @@ VERSION
__kernel_clock_getres; __kernel_clock_getres;
__kernel_get_tbfreq; __kernel_get_tbfreq;
__kernel_sync_dicache; __kernel_sync_dicache;
__kernel_sync_dicache_p5;
__kernel_sigtramp_rt64; __kernel_sigtramp_rt64;
__kernel_getcpu; __kernel_getcpu;
__kernel_time; __kernel_time;
......
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