Revert "ARM: orion5x: fix legacy orion5x IRQ numbers"

This reverts commit b5614b19,
which was commit 5be9fc23 upstream.

Ben Hutchings pointed out this was not applicable to the 3.16-ckt kernel.

Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Benjamin Cama <benoar@dolka.fr>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>

arch/arm/Kconfig

@@ -565,7 +565,6 @@ config ARCH_ORION5X
 	select MVEBU_MBUS
 	select PCI
 	select PLAT_ORION_LEGACY
-	select MULTI_IRQ_HANDLER
 	help
 	  Support for the following Marvell Orion 5x series SoCs:
 	  Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),

arch/arm/mach-orion5x/include/mach/irqs.h

@@ -16,42 +16,42 @@
 /*
  * Orion Main Interrupt Controller
  */
-#define IRQ_ORION5X_BRIDGE		(1 + 0)
-#define IRQ_ORION5X_DOORBELL_H2C	(1 + 1)
-#define IRQ_ORION5X_DOORBELL_C2H	(1 + 2)
-#define IRQ_ORION5X_UART0		(1 + 3)
-#define IRQ_ORION5X_UART1		(1 + 4)
-#define IRQ_ORION5X_I2C			(1 + 5)
-#define IRQ_ORION5X_GPIO_0_7		(1 + 6)
-#define IRQ_ORION5X_GPIO_8_15		(1 + 7)
-#define IRQ_ORION5X_GPIO_16_23		(1 + 8)
-#define IRQ_ORION5X_GPIO_24_31		(1 + 9)
-#define IRQ_ORION5X_PCIE0_ERR		(1 + 10)
-#define IRQ_ORION5X_PCIE0_INT		(1 + 11)
-#define IRQ_ORION5X_USB1_CTRL		(1 + 12)
-#define IRQ_ORION5X_DEV_BUS_ERR		(1 + 14)
-#define IRQ_ORION5X_PCI_ERR		(1 + 15)
-#define IRQ_ORION5X_USB_BR_ERR		(1 + 16)
-#define IRQ_ORION5X_USB0_CTRL		(1 + 17)
-#define IRQ_ORION5X_ETH_RX		(1 + 18)
-#define IRQ_ORION5X_ETH_TX		(1 + 19)
-#define IRQ_ORION5X_ETH_MISC		(1 + 20)
-#define IRQ_ORION5X_ETH_SUM		(1 + 21)
-#define IRQ_ORION5X_ETH_ERR		(1 + 22)
-#define IRQ_ORION5X_IDMA_ERR		(1 + 23)
-#define IRQ_ORION5X_IDMA_0		(1 + 24)
-#define IRQ_ORION5X_IDMA_1		(1 + 25)
-#define IRQ_ORION5X_IDMA_2		(1 + 26)
-#define IRQ_ORION5X_IDMA_3		(1 + 27)
-#define IRQ_ORION5X_CESA		(1 + 28)
-#define IRQ_ORION5X_SATA		(1 + 29)
-#define IRQ_ORION5X_XOR0		(1 + 30)
-#define IRQ_ORION5X_XOR1		(1 + 31)
+#define IRQ_ORION5X_BRIDGE		0
+#define IRQ_ORION5X_DOORBELL_H2C	1
+#define IRQ_ORION5X_DOORBELL_C2H	2
+#define IRQ_ORION5X_UART0		3
+#define IRQ_ORION5X_UART1		4
+#define IRQ_ORION5X_I2C			5
+#define IRQ_ORION5X_GPIO_0_7		6
+#define IRQ_ORION5X_GPIO_8_15		7
+#define IRQ_ORION5X_GPIO_16_23		8
+#define IRQ_ORION5X_GPIO_24_31		9
+#define IRQ_ORION5X_PCIE0_ERR		10
+#define IRQ_ORION5X_PCIE0_INT		11
+#define IRQ_ORION5X_USB1_CTRL		12
+#define IRQ_ORION5X_DEV_BUS_ERR		14
+#define IRQ_ORION5X_PCI_ERR		15
+#define IRQ_ORION5X_USB_BR_ERR		16
+#define IRQ_ORION5X_USB0_CTRL		17
+#define IRQ_ORION5X_ETH_RX		18
+#define IRQ_ORION5X_ETH_TX		19
+#define IRQ_ORION5X_ETH_MISC		20
+#define IRQ_ORION5X_ETH_SUM		21
+#define IRQ_ORION5X_ETH_ERR		22
+#define IRQ_ORION5X_IDMA_ERR		23
+#define IRQ_ORION5X_IDMA_0		24
+#define IRQ_ORION5X_IDMA_1		25
+#define IRQ_ORION5X_IDMA_2		26
+#define IRQ_ORION5X_IDMA_3		27
+#define IRQ_ORION5X_CESA		28
+#define IRQ_ORION5X_SATA		29
+#define IRQ_ORION5X_XOR0		30
+#define IRQ_ORION5X_XOR1		31
 
 /*
  * Orion General Purpose Pins
  */
-#define IRQ_ORION5X_GPIO_START	33
+#define IRQ_ORION5X_GPIO_START	32
 #define NR_GPIO_IRQS		32
 
 #define NR_IRQS			(IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)

arch/arm/mach-orion5x/irq.c

@@ -42,7 +42,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
 	stat = readl_relaxed(MAIN_IRQ_CAUSE);
 	stat &= readl_relaxed(MAIN_IRQ_MASK);
 	if (stat) {
-		unsigned int hwirq = 1 + __fls(stat);
+		unsigned int hwirq = __fls(stat);
 		handle_IRQ(hwirq, regs);
 		return;
 	}
@@ -51,7 +51,7 @@ __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
 
 void __init orion5x_init_irq(void)
 {
-	orion_irq_init(1, MAIN_IRQ_MASK);
+	orion_irq_init(0, MAIN_IRQ_MASK);
 
 #ifdef CONFIG_MULTI_IRQ_HANDLER
 	set_handle_irq(orion5x_legacy_handle_irq);