Commit 10b0a455 authored by Hans de Goede's avatar Hans de Goede Committed by Dmitry Torokhov

Input: hideep - silence error in SW_RESET()

On some models the first HIDEEP_SYSCON_WDT_CON write alone is enough to
cause the controller to reset, causing the second write to fail:

i2c-hideep_ts: write to register 0x52000014 (0x000001) failed: -121

Switch this write to a raw hideep_pgm_w_mem() to avoid an error getting
logged in this case.
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230311114726.182789-2-hdegoede@redhat.comSigned-off-by: default avatarDmitry Torokhov <dmitry.torokhov@gmail.com>
parent 5af7a77a
...@@ -271,9 +271,14 @@ static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val) ...@@ -271,9 +271,14 @@ static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val)
#define SW_RESET_IN_PGM(clk) \ #define SW_RESET_IN_PGM(clk) \
{ \ { \
__be32 data = cpu_to_be32(0x01); \
hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \ hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \
hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \ hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \
hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x01); \ /* \
* The first write may already cause a reset, use a raw \
* write for the second write to avoid error logging. \
*/ \
hideep_pgm_w_mem(ts, HIDEEP_SYSCON_WDT_CON, &data, 1); \
} }
#define SET_FLASH_PIO(ce) \ #define SET_FLASH_PIO(ce) \
......
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