Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kirill Smelkov
linux
Commits
11874a1e
Commit
11874a1e
authored
Jul 02, 2004
by
David S. Miller
Browse files
Options
Browse Files
Download
Plain Diff
Merge davem@nuts.davemloft.net:/disk1/BK/sparc-2.6
into kernel.bkbits.net:/home/davem/sparc-2.6
parents
004a3668
7be7970e
Changes
3
Show whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
78 additions
and
41 deletions
+78
-41
arch/sparc64/kernel/itlb_base.S
arch/sparc64/kernel/itlb_base.S
+3
-3
arch/sparc64/mm/fault.c
arch/sparc64/mm/fault.c
+11
-1
include/asm-sparc64/pgtable.h
include/asm-sparc64/pgtable.h
+64
-37
No files found.
arch/sparc64/kernel/itlb_base.S
View file @
11874a1e
...
@@ -41,6 +41,9 @@
...
@@ -41,6 +41,9 @@
CREATE_VPTE_OFFSET2
(%
g4
,
%
g6
)
!
Create
VPTE
offset
CREATE_VPTE_OFFSET2
(%
g4
,
%
g6
)
!
Create
VPTE
offset
ldxa
[%
g3
+
%
g6
]
ASI_P
,
%
g5
!
Load
VPTE
ldxa
[%
g3
+
%
g6
]
ASI_P
,
%
g5
!
Load
VPTE
1
:
brgez
,
pn
%
g5
,
3
f
!
Not
valid
,
branch
out
1
:
brgez
,
pn
%
g5
,
3
f
!
Not
valid
,
branch
out
sethi
%
hi
(
_PAGE_EXEC
),
%
g4
!
Delay
-
slot
andcc
%
g5
,
%
g4
,
%
g0
!
Executable
?
be
,
pn
%
xcc
,
3
f
!
Nope
,
branch
.
nop
!
Delay
-
slot
nop
!
Delay
-
slot
2
:
stxa
%
g5
,
[%
g0
]
ASI_ITLB_DATA_IN
!
Load
PTE
into
TLB
2
:
stxa
%
g5
,
[%
g0
]
ASI_ITLB_DATA_IN
!
Load
PTE
into
TLB
retry
!
Trap
return
retry
!
Trap
return
...
@@ -69,9 +72,6 @@ winfix_trampoline:
...
@@ -69,9 +72,6 @@ winfix_trampoline:
done
!
Do
it
to
it
done
!
Do
it
to
it
/*
ITLB
**
ICACHE
line
4
:
Unused
...
*/
/*
ITLB
**
ICACHE
line
4
:
Unused
...
*/
nop
nop
nop
nop
nop
nop
nop
nop
nop
...
...
arch/sparc64/mm/fault.c
View file @
11874a1e
...
@@ -257,7 +257,7 @@ static void do_kernel_fault(struct pt_regs *regs, int si_code, int fault_code,
...
@@ -257,7 +257,7 @@ static void do_kernel_fault(struct pt_regs *regs, int si_code, int fault_code,
* in that case.
* in that case.
*/
*/
if
(
!
(
fault_code
&
FAULT_CODE_WRITE
)
&&
if
(
!
(
fault_code
&
(
FAULT_CODE_WRITE
|
FAULT_CODE_ITLB
)
)
&&
(
insn
&
0xc0800000
)
==
0xc0800000
)
{
(
insn
&
0xc0800000
)
==
0xc0800000
)
{
if
(
insn
&
0x2000
)
if
(
insn
&
0x2000
)
asi
=
(
regs
->
tstate
>>
24
);
asi
=
(
regs
->
tstate
>>
24
);
...
@@ -408,6 +408,16 @@ asmlinkage void do_sparc64_fault(struct pt_regs *regs)
...
@@ -408,6 +408,16 @@ asmlinkage void do_sparc64_fault(struct pt_regs *regs)
*/
*/
good_area:
good_area:
si_code
=
SEGV_ACCERR
;
si_code
=
SEGV_ACCERR
;
/* If we took a ITLB miss on a non-executable page, catch
* that here.
*/
if
((
fault_code
&
FAULT_CODE_ITLB
)
&&
!
(
vma
->
vm_flags
&
VM_EXEC
))
{
BUG_ON
(
address
!=
regs
->
tpc
);
BUG_ON
(
regs
->
tstate
&
TSTATE_PRIV
);
goto
bad_area
;
}
if
(
fault_code
&
FAULT_CODE_WRITE
)
{
if
(
fault_code
&
FAULT_CODE_WRITE
)
{
if
(
!
(
vma
->
vm_flags
&
VM_WRITE
))
if
(
!
(
vma
->
vm_flags
&
VM_WRITE
))
goto
bad_area
;
goto
bad_area
;
...
...
include/asm-sparc64/pgtable.h
View file @
11874a1e
...
@@ -107,16 +107,19 @@
...
@@ -107,16 +107,19 @@
/* Spitfire/Cheetah TTE bits. */
/* Spitfire/Cheetah TTE bits. */
#define _PAGE_VALID _AC(0x8000000000000000,UL)
/* Valid TTE */
#define _PAGE_VALID _AC(0x8000000000000000,UL)
/* Valid TTE */
#define _PAGE_R _AC(0x8000000000000000,UL)
/* Keep ref bit up to date
*/
#define _PAGE_R _AC(0x8000000000000000,UL)
/* Keep ref bit up to date*/
#define _PAGE_SZ4MB _AC(0x6000000000000000,UL)
/* 4MB Page */
#define _PAGE_SZ4MB _AC(0x6000000000000000,UL)
/* 4MB Page */
#define _PAGE_SZ512K _AC(0x4000000000000000,UL)
/* 512K Page */
#define _PAGE_SZ512K _AC(0x4000000000000000,UL)
/* 512K Page */
#define _PAGE_SZ64K _AC(0x2000000000000000,UL)
/* 64K Page */
#define _PAGE_SZ64K _AC(0x2000000000000000,UL)
/* 64K Page */
#define _PAGE_SZ8K _AC(0x0000000000000000,UL)
/* 8K Page */
#define _PAGE_SZ8K _AC(0x0000000000000000,UL)
/* 8K Page */
#define _PAGE_NFO _AC(0x1000000000000000,UL)
/* No Fault Only */
#define _PAGE_NFO _AC(0x1000000000000000,UL)
/* No Fault Only */
#define _PAGE_IE _AC(0x0800000000000000,UL)
/* Invert Endianness */
#define _PAGE_IE _AC(0x0800000000000000,UL)
/* Invert Endianness */
#define _PAGE_SOFT2 _AC(0x07FC000000000000,UL)
/* Software bits, set 2 */
#define _PAGE_RES1 _AC(0x0003000000000000,UL)
/* Reserved */
#define _PAGE_SN _AC(0x0000800000000000,UL)
/* (Cheetah) Snoop */
#define _PAGE_SN _AC(0x0000800000000000,UL)
/* (Cheetah) Snoop */
#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL)
/* (Spitfire) paddr [40:13]*/
#define _PAGE_RES2 _AC(0x0000780000000000,UL)
/* Reserved */
#define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL)
/* (Cheetah) paddr [42:13] */
#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL)
/* (Spitfire) paddr[40:13]*/
#define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL)
/* (Cheetah) paddr[42:13] */
#define _PAGE_SOFT _AC(0x0000000000001F80,UL)
/* Software bits */
#define _PAGE_SOFT _AC(0x0000000000001F80,UL)
/* Software bits */
#define _PAGE_L _AC(0x0000000000000040,UL)
/* Locked TTE */
#define _PAGE_L _AC(0x0000000000000040,UL)
/* Locked TTE */
#define _PAGE_CP _AC(0x0000000000000020,UL)
/* Cacheable in P-Cache */
#define _PAGE_CP _AC(0x0000000000000020,UL)
/* Cacheable in P-Cache */
...
@@ -126,9 +129,22 @@
...
@@ -126,9 +129,22 @@
#define _PAGE_W _AC(0x0000000000000002,UL)
/* Writable */
#define _PAGE_W _AC(0x0000000000000002,UL)
/* Writable */
#define _PAGE_G _AC(0x0000000000000001,UL)
/* Global */
#define _PAGE_G _AC(0x0000000000000001,UL)
/* Global */
/* Here are the SpitFire software bits we use in the TTE's. */
/* Here are the SpitFire software bits we use in the TTE's.
#define _PAGE_FILE _AC(0x0000000000001000,UL)
/* Pagecache page */
*
* WARNING: If you are going to try and start using some
* of the soft2 bits, you will need to make
* modifications to the swap entry implementation.
* For example, one thing that could happen is that
* swp_entry_to_pte() would BUG_ON() if you tried
* to use one of the soft2 bits for _PAGE_FILE.
*
* Like other architectures, I have aliased _PAGE_FILE with
* _PAGE_MODIFIED. This works because _PAGE_FILE is never
* interpreted that way unless _PAGE_PRESENT is clear.
*/
#define _PAGE_EXEC _AC(0x0000000000001000,UL)
/* Executable SW bit */
#define _PAGE_MODIFIED _AC(0x0000000000000800,UL)
/* Modified (dirty) */
#define _PAGE_MODIFIED _AC(0x0000000000000800,UL)
/* Modified (dirty) */
#define _PAGE_FILE _AC(0x0000000000000800,UL)
/* Pagecache page */
#define _PAGE_ACCESSED _AC(0x0000000000000400,UL)
/* Accessed (ref'd) */
#define _PAGE_ACCESSED _AC(0x0000000000000400,UL)
/* Accessed (ref'd) */
#define _PAGE_READ _AC(0x0000000000000200,UL)
/* Readable SW Bit */
#define _PAGE_READ _AC(0x0000000000000200,UL)
/* Readable SW Bit */
#define _PAGE_WRITE _AC(0x0000000000000100,UL)
/* Writable SW Bit */
#define _PAGE_WRITE _AC(0x0000000000000100,UL)
/* Writable SW Bit */
...
@@ -164,16 +180,27 @@
...
@@ -164,16 +180,27 @@
/* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
/* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
#define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
#define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
__ACCESS_BITS | _PAGE_WRITE)
__ACCESS_BITS | _PAGE_WRITE
| _PAGE_EXEC
)
#define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
#define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
__ACCESS_BITS)
__ACCESS_BITS
| _PAGE_EXEC
)
#define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
#define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
__ACCESS_BITS)
__ACCESS_BITS
| _PAGE_EXEC
)
#define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
#define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
__PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS)
__PRIV_BITS | \
__ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC)
#define PAGE_SHARED_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
_PAGE_CACHE | \
__ACCESS_BITS | _PAGE_WRITE)
#define PAGE_COPY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
_PAGE_CACHE | __ACCESS_BITS)
#define PAGE_READONLY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
_PAGE_CACHE | __ACCESS_BITS)
#define _PFN_MASK _PAGE_PADDR
#define _PFN_MASK _PAGE_PADDR
...
@@ -181,18 +208,18 @@
...
@@ -181,18 +208,18 @@
__ACCESS_BITS | _PAGE_E)
__ACCESS_BITS | _PAGE_E)
#define __P000 PAGE_NONE
#define __P000 PAGE_NONE
#define __P001 PAGE_READONLY
#define __P001 PAGE_READONLY
_NOEXEC
#define __P010 PAGE_COPY
#define __P010 PAGE_COPY
_NOEXEC
#define __P011 PAGE_COPY
#define __P011 PAGE_COPY
_NOEXEC
#define __P100 PAGE_READONLY
#define __P100 PAGE_READONLY
#define __P101 PAGE_READONLY
#define __P101 PAGE_READONLY
#define __P110 PAGE_COPY
#define __P110 PAGE_COPY
#define __P111 PAGE_COPY
#define __P111 PAGE_COPY
#define __S000 PAGE_NONE
#define __S000 PAGE_NONE
#define __S001 PAGE_READONLY
#define __S001 PAGE_READONLY
_NOEXEC
#define __S010 PAGE_SHARED
#define __S010 PAGE_SHARED
_NOEXEC
#define __S011 PAGE_SHARED
#define __S011 PAGE_SHARED
_NOEXEC
#define __S100 PAGE_READONLY
#define __S100 PAGE_READONLY
#define __S101 PAGE_READONLY
#define __S101 PAGE_READONLY
#define __S110 PAGE_SHARED
#define __S110 PAGE_SHARED
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment