drm/i915/gen2: Add an ID for the display pipes power well

Make the I830 power well ID assignment explicit for consistency.

v2:
- s/GEN2/I830/ in the comment, since other GEN2s don't have the power
  well. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170711204236.5618-2-imre.deak@intel.comSigned-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

drivers/gpu/drm/i915/i915_reg.h

@@ -1072,6 +1072,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
  * power wells their value must stay fixed.
  */
 enum i915_power_well_id {
+	/*
+	 * I830
+	 *  - custom power well
+	 */
+	I830_DISP_PW_PIPES = 0,
+
 	/*
 	 * VLV/CHV
 	 *  - PUNIT_REG_PWRGT_CTRL (bit: id*2),

drivers/gpu/drm/i915/intel_runtime_pm.c

@@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power_wells[] = {
 		.name = "pipes",
 		.domains = I830_PIPES_POWER_DOMAINS,
 		.ops = &i830_pipes_power_well_ops,
+		.id = I830_DISP_PW_PIPES,
 	},
 };