Commit 1297eacf authored by Manish Narani's avatar Manish Narani Committed by Ulf Hansson

dt-bindings: mmc: arasan: Document 'xlnx,zynqmp-8.9a' controller

Add documentation for 'xlnx,zynqmp-8.9a' SDHCI controller and optional
properties followed by example.
Signed-off-by: default avatarManish Narani <manish.narani@xilinx.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 1ed7d5c8
...@@ -15,6 +15,9 @@ Required Properties: ...@@ -15,6 +15,9 @@ Required Properties:
- "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY
- "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
For this device it is strongly suggested to include arasan,soc-ctl-syscon. For this device it is strongly suggested to include arasan,soc-ctl-syscon.
- "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY
For this device it is strongly suggested to include clock-output-names and
#clock-cells.
- "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
Note: This binding has been deprecated and moved to [5]. Note: This binding has been deprecated and moved to [5].
- "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY
...@@ -49,6 +52,10 @@ Optional Properties: ...@@ -49,6 +52,10 @@ Optional Properties:
- xlnx,int-clock-stable-broken: when present, the controller always reports - xlnx,int-clock-stable-broken: when present, the controller always reports
that the internal clock is stable even when it is not. that the internal clock is stable even when it is not.
- xlnx,mio-bank: When specified, this will indicate the MIO bank number in
which the command and data lines are configured. If not specified, driver
will assume this as 0.
Example: Example:
sdhci@e0100000 { sdhci@e0100000 {
compatible = "arasan,sdhci-8.9a"; compatible = "arasan,sdhci-8.9a";
...@@ -85,6 +92,18 @@ Example: ...@@ -85,6 +92,18 @@ Example:
#clock-cells = <0>; #clock-cells = <0>;
}; };
sdhci: mmc@ff160000 {
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
interrupt-parent = <&gic>;
interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clocks = <&clk200>, <&clk200>;
clock-names = "clk_xin", "clk_ahb";
clock-output-names = "clk_out_sd0", "clk_in_sd0";
#clock-cells = <1>;
clk-phase-sd-hs = <63>, <72>;
};
emmc: sdhci@ec700000 { emmc: sdhci@ec700000 {
compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1";
reg = <0xec700000 0x300>; reg = <0xec700000 0x300>;
......
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