Merge samba.org:/home/paulus/kernel/linux-2.5

into samba.org:/home/paulus/kernel/for-linus-ppc

arch/ppc/platforms/k2_pci.c

@@ -156,6 +156,13 @@ void k2_setup_hoses(void)
 	__raw_writel(0x00000080, K2_PCI32_BAR+PSBAR);	/* Base@0x80 */
 	__raw_writel(0x00000000, K2_PCI32_BAR+PPBAR);
 
+	__raw_writel(0xc0000000, K2_PCI32_BAR+BPMDLK);
+	__raw_writel(0xd0000000, K2_PCI32_BAR+TPMDLK);
+	__raw_writel(0x80000000, K2_PCI32_BAR+BIODLK);
+	__raw_writel(0x80100000, K2_PCI32_BAR+TIODLK);
+	__raw_writel(0xe0008000, K2_PCI32_BAR+DLKCTRL);
+	__raw_writel(0xffffffff, K2_PCI32_BAR+DLKDEV);
+	
 	/* PCI64 mappings */
 	__raw_writel(0x00100000, K2_PCI64_BAR+PIBAR);	/* PCI I/O base */
 	__raw_writel(0x10000000, K2_PCI64_BAR+PMBAR);	/* PCI Mem base */

arch/ppc/syslib/cpc710.h

@@ -61,6 +61,12 @@
 #define BARPP	0x000f8130
 #define PSBAR	0x000f8140
 #define PPBAR	0x000f8150
+#define BPMDLK	0x000f8200      /* Bottom of Peripheral Memory Space */
+#define TPMDLK	0x000f8210      /* Top of Peripheral Memory Space */
+#define BIODLK	0x000f8220      /* Bottom of Peripheral I/O Space */
+#define TIODLK	0x000f8230      /* Top of Perioheral I/O Space */
+#define DLKCTRL	0x000f8240      /* Deadlock control */
+#define DLKDEV	0x000f8250      /* Deadlock device */
 
 /* System standard configuration registers space */
 #define	DCR	0xff200000

arch/ppc/syslib/mpc10x_common.c

@@ -243,6 +243,8 @@ mpc10x_bridge_init(struct pci_controller *hose,
 
 #ifdef CONFIG_MPC10X_STORE_GATHERING
 	mpc10x_enable_store_gathering(hose);
+#else
+	mpc10x_disable_store_gathering(hose);
 #endif
 
 	if (ppc_md.progress) ppc_md.progress("mpc10x:exit", 0x100);
@@ -376,3 +378,25 @@ mpc10x_enable_store_gathering(struct pci_controller *hose)
 
 	return 0;
 }
+
+int __init
+mpc10x_disable_store_gathering(struct pci_controller *hose)
+{
+	uint picr1;
+
+	early_read_config_dword(hose,
+				0,
+				PCI_DEVFN(0,0),
+			        MPC10X_CFG_PICR1_REG,
+			        &picr1);
+
+	picr1 &= ~MPC10X_CFG_PICR1_ST_GATH_EN;
+
+	early_write_config_dword(hose,
+				0,
+				PCI_DEVFN(0,0),
+				MPC10X_CFG_PICR1_REG,
+				picr1);
+
+	return 0;
+}

arch/ppc/syslib/todc_time.c

@@ -240,6 +240,7 @@ todc_get_rtc_time(void)
 
 		switch (todc_info->rtc_type) {
 			case TODC_TYPE_DS1557:
+			case TODC_TYPE_DS1743:
 			case TODC_TYPE_DS1746:	/* XXXX BAD HACK -> FIX */
 			case TODC_TYPE_DS1747:
 				break;
@@ -274,6 +275,7 @@ todc_get_rtc_time(void)
 	if (todc_info->rtc_type != TODC_TYPE_MC146818) {
 		switch (todc_info->rtc_type) {
 			case TODC_TYPE_DS1557:
+			case TODC_TYPE_DS1743:	
 			case TODC_TYPE_DS1746:	/* XXXX BAD HACK -> FIX */
 			case TODC_TYPE_DS1747:
 				break;
@@ -367,6 +369,7 @@ static unsigned char __init todc_read_timereg(int addr)
 
 	switch (todc_info->rtc_type) {
 		case TODC_TYPE_DS1557:
+		case TODC_TYPE_DS1743:
 		case TODC_TYPE_DS1746:	/* XXXX BAD HACK -> FIX */
 		case TODC_TYPE_DS1747:
 		case TODC_TYPE_MC146818:
@@ -381,6 +384,7 @@ static unsigned char __init todc_read_timereg(int addr)
 
 	switch (todc_info->rtc_type) {
 		case TODC_TYPE_DS1557:
+		case TODC_TYPE_DS1743:
 		case TODC_TYPE_DS1746:	/* XXXX BAD HACK -> FIX */
 		case TODC_TYPE_DS1747:
 		case TODC_TYPE_MC146818:

include/asm-ppc/mpc10x.h

@@ -164,5 +164,6 @@ int mpc10x_bridge_init(struct pci_controller *hose,
 		       uint phys_eumb_base);
 unsigned long mpc10x_get_mem_size(uint mem_map);
 int mpc10x_enable_store_gathering(struct pci_controller *hose);
+int mpc10x_disable_store_gathering(struct pci_controller *hose);
 
 #endif	/* __PPC_KERNEL_MPC10X_H */