Commit 140455fa authored by Tony Lindgren's avatar Tony Lindgren

omap2/3/4: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS

omap: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent a8eb7ca0
...@@ -29,7 +29,7 @@ config OMAP_PACKAGE_CBP ...@@ -29,7 +29,7 @@ config OMAP_PACKAGE_CBP
bool bool
comment "OMAP Board Type" comment "OMAP Board Type"
depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 depends on ARCH_OMAP2PLUS
config MACH_OMAP_GENERIC config MACH_OMAP_GENERIC
bool "Generic OMAP board" bool "Generic OMAP board"
......
...@@ -125,7 +125,7 @@ config OMAP_MPU_TIMER ...@@ -125,7 +125,7 @@ config OMAP_MPU_TIMER
config OMAP_32K_TIMER config OMAP_32K_TIMER
bool "Use 32KHz timer" bool "Use 32KHz timer"
depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
help help
Select this option if you want to enable the OMAP 32KHz timer. Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has This timer saves power compared to the OMAP_MPU_TIMER, and has
...@@ -146,7 +146,7 @@ config OMAP_32K_TIMER_HZ ...@@ -146,7 +146,7 @@ config OMAP_32K_TIMER_HZ
config OMAP_DM_TIMER config OMAP_DM_TIMER
bool "Use dual-mode timer" bool "Use dual-mode timer"
depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4 depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
help help
Select this option if you want to use OMAP Dual-Mode timers. Select this option if you want to use OMAP Dual-Mode timers.
......
...@@ -1870,8 +1870,7 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id) ...@@ -1870,8 +1870,7 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
#define omap1_dma_irq_handler NULL #define omap1_dma_irq_handler NULL
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
static int omap2_dma_handle_ch(int ch) static int omap2_dma_handle_ch(int ch)
{ {
......
...@@ -153,8 +153,7 @@ ...@@ -153,8 +153,7 @@
struct omap_dm_timer { struct omap_dm_timer {
unsigned long phys_base; unsigned long phys_base;
int irq; int irq;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
struct clk *iclk, *fclk; struct clk *iclk, *fclk;
#endif #endif
void __iomem *io_base; void __iomem *io_base;
...@@ -490,8 +489,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) ...@@ -490,8 +489,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
} }
EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #else
defined(CONFIG_ARCH_OMAP4)
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{ {
...@@ -535,8 +533,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer) ...@@ -535,8 +533,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
if (l & OMAP_TIMER_CTRL_ST) { if (l & OMAP_TIMER_CTRL_ST) {
l &= ~0x1; l &= ~0x1;
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
/* Readback to make sure write has completed */ /* Readback to make sure write has completed */
omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
/* /*
...@@ -781,8 +778,7 @@ int __init omap_dm_timer_init(void) ...@@ -781,8 +778,7 @@ int __init omap_dm_timer_init(void)
timer->io_base = ioremap(timer->phys_base, map_size); timer->io_base = ioremap(timer->phys_base, map_size);
BUG_ON(!timer->io_base); BUG_ON(!timer->io_base);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
if (cpu_class_is_omap2()) { if (cpu_class_is_omap2()) {
char clk_name[16]; char clk_name[16];
sprintf(clk_name, "gpt%d_ick", i + 1); sprintf(clk_name, "gpt%d_ick", i + 1);
......
...@@ -177,13 +177,11 @@ struct gpio_bank { ...@@ -177,13 +177,11 @@ struct gpio_bank {
u16 irq; u16 irq;
u16 virtual_irq_start; u16 virtual_irq_start;
int method; int method;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
u32 suspend_wakeup; u32 suspend_wakeup;
u32 saved_wakeup; u32 saved_wakeup;
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
u32 non_wakeup_gpios; u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios; u32 enabled_non_wakeup_gpios;
...@@ -592,8 +590,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) ...@@ -592,8 +590,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
reg += OMAP7XX_GPIO_DATA_OUTPUT; reg += OMAP7XX_GPIO_DATA_OUTPUT;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAOUT; reg += OMAP24XX_GPIO_DATAOUT;
break; break;
...@@ -684,8 +681,7 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time) ...@@ -684,8 +681,7 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
} }
EXPORT_SYMBOL(omap_set_gpio_debounce_time); EXPORT_SYMBOL(omap_set_gpio_debounce_time);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
int trigger) int trigger)
{ {
...@@ -856,8 +852,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) ...@@ -856,8 +852,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
goto bad; goto bad;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
set_24xx_gpio_triggering(bank, gpio, trigger); set_24xx_gpio_triggering(bank, gpio, trigger);
break; break;
...@@ -1131,8 +1126,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) ...@@ -1131,8 +1126,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
spin_unlock_irqrestore(&bank->lock, flags); spin_unlock_irqrestore(&bank->lock, flags);
return 0; return 0;
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
if (bank->non_wakeup_gpios & (1 << gpio)) { if (bank->non_wakeup_gpios & (1 << gpio)) {
printk(KERN_ERR "Unable to modify wakeup on " printk(KERN_ERR "Unable to modify wakeup on "
...@@ -1227,8 +1221,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) ...@@ -1227,8 +1221,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
__raw_writel(1 << offset, reg); __raw_writel(1 << offset, reg);
} }
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
if (bank->method == METHOD_GPIO_24XX) { if (bank->method == METHOD_GPIO_24XX) {
/* Disable wake-up during idle for dynamic tick */ /* Disable wake-up during idle for dynamic tick */
void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
...@@ -1809,8 +1802,7 @@ static int __init _omap_gpio_init(void) ...@@ -1809,8 +1802,7 @@ static int __init _omap_gpio_init(void)
gpio_count = 32; /* 7xx has 32-bit GPIOs */ gpio_count = 32; /* 7xx has 32-bit GPIOs */
} }
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
if (bank->method == METHOD_GPIO_24XX) { if (bank->method == METHOD_GPIO_24XX) {
static const u32 non_wakeup_gpios[] = { static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040 0xe203ffc0, 0x08700040
...@@ -1903,8 +1895,7 @@ static int __init _omap_gpio_init(void) ...@@ -1903,8 +1895,7 @@ static int __init _omap_gpio_init(void)
return 0; return 0;
} }
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{ {
int i; int i;
...@@ -2013,8 +2004,7 @@ static struct sys_device omap_gpio_device = { ...@@ -2013,8 +2004,7 @@ static struct sys_device omap_gpio_device = {
#endif #endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
static int workaround_enabled; static int workaround_enabled;
...@@ -2240,8 +2230,7 @@ static int __init omap_gpio_sysinit(void) ...@@ -2240,8 +2230,7 @@ static int __init omap_gpio_sysinit(void)
mpuio_init(); mpuio_init();
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
if (cpu_is_omap16xx() || cpu_class_is_omap2()) { if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
if (ret == 0) { if (ret == 0) {
ret = sysdev_class_register(&omap_gpio_sysclass); ret = sysdev_class_register(&omap_gpio_sysclass);
...@@ -2300,8 +2289,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) ...@@ -2300,8 +2289,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
/* FIXME for at least omap2, show pullup/pulldown state */ /* FIXME for at least omap2, show pullup/pulldown state */
irqstat = irq_desc[irq].status; irqstat = irq_desc[irq].status;
#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
if (is_in && ((bank->suspend_wakeup & mask) if (is_in && ((bank->suspend_wakeup & mask)
|| irqstat & IRQ_TYPE_SENSE_MASK)) { || irqstat & IRQ_TYPE_SENSE_MASK)) {
char *trigger = NULL; char *trigger = NULL;
......
...@@ -26,8 +26,7 @@ struct clkops { ...@@ -26,8 +26,7 @@ struct clkops {
void (*find_companion)(struct clk *, void __iomem **, u8 *); void (*find_companion)(struct clk *, void __iomem **, u8 *);
}; };
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
struct clksel_rate { struct clksel_rate {
u32 val; u32 val;
...@@ -89,8 +88,7 @@ struct clk { ...@@ -89,8 +88,7 @@ struct clk {
__u8 enable_bit; __u8 enable_bit;
__s8 usecount; __s8 usecount;
u8 fixed_div; u8 fixed_div;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
void __iomem *clksel_reg; void __iomem *clksel_reg;
u32 clksel_mask; u32 clksel_mask;
const struct clksel *clksel; const struct clksel *clksel;
......
...@@ -309,8 +309,7 @@ ...@@ -309,8 +309,7 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #ifdef CONFIG_ARCH_OMAP2PLUS
defined(CONFIG_ARCH_OMAP4)
extern void __iomem *omap_ctrl_base_get(void); extern void __iomem *omap_ctrl_base_get(void);
extern u8 omap_ctrl_readb(u16 offset); extern u8 omap_ctrl_readb(u16 offset);
extern u16 omap_ctrl_readw(u16 offset); extern u16 omap_ctrl_readw(u16 offset);
......
...@@ -103,8 +103,7 @@ ...@@ -103,8 +103,7 @@
#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #else
defined(CONFIG_ARCH_OMAP4)
#define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR2 0x00
#define OMAP_MCBSP_REG_DRR1 0x04 #define OMAP_MCBSP_REG_DRR1 0x04
......
...@@ -38,8 +38,7 @@ ...@@ -38,8 +38,7 @@
*/ */
#if defined(CONFIG_ARCH_OMAP1) #if defined(CONFIG_ARCH_OMAP1)
#define PHYS_OFFSET UL(0x10000000) #define PHYS_OFFSET UL(0x10000000)
#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ #else
defined(CONFIG_ARCH_OMAP4)
#define PHYS_OFFSET UL(0x80000000) #define PHYS_OFFSET UL(0x80000000)
#endif #endif
......
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