Commit 14131db2 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab

media: atomisp: hive_isp_css_defs.h: keep just one copy of it

While those headers are different, the different fields
aren't used at the driver. So, remove those different
unused fields, rename one define and use just one header
for all 3 different versions of the ISP.
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent ecdb2e34
...@@ -43,11 +43,7 @@ typedef enum hrt_isp_css_irq { ...@@ -43,11 +43,7 @@ typedef enum hrt_isp_css_irq {
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
#ifdef _HIVE_ISP_CSS_2401_SYSTEM
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID,
#else
hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
#endif
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
......
...@@ -43,7 +43,7 @@ typedef enum hrt_isp_css_irq { ...@@ -43,7 +43,7 @@ typedef enum hrt_isp_css_irq {
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
......
...@@ -44,7 +44,7 @@ typedef enum hrt_isp_css_irq { ...@@ -44,7 +44,7 @@ typedef enum hrt_isp_css_irq {
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
......
...@@ -69,7 +69,7 @@ typedef enum { ...@@ -69,7 +69,7 @@ typedef enum {
#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) #if defined(IS_ISP_2400_MAMOIADA_SYSTEM)
virq_isp_pmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, virq_isp_pmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) #elif defined(IS_ISP_2401_MAMOIADA_SYSTEM)
virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IS2401_BIT_ID, virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
#else #else
#error "irq_local.h: 2400_SYSTEM must be one of {2400, 2401 }" #error "irq_local.h: 2400_SYSTEM must be one of {2400, 2401 }"
#endif #endif
......
...@@ -15,8 +15,6 @@ ...@@ -15,8 +15,6 @@
#ifndef _hive_isp_css_defs_h__ #ifndef _hive_isp_css_defs_h__
#define _hive_isp_css_defs_h__ #define _hive_isp_css_defs_h__
#define HIVE_ISP_CSS_IS_2400B0_SYSTEM
#define HIVE_ISP_CTRL_DATA_WIDTH 32 #define HIVE_ISP_CTRL_DATA_WIDTH 32
#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 #define HIVE_ISP_CTRL_ADDRESS_WIDTH 32
#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 #define HIVE_ISP_CTRL_MAX_BURST_SIZE 1
...@@ -86,7 +84,6 @@ ...@@ -86,7 +84,6 @@
#define HIVE_GP_REGS_SWITCH_GDC2_IDX 18 #define HIVE_GP_REGS_SWITCH_GDC2_IDX 18
#define HIVE_GP_REGS_SRST_IDX 19 #define HIVE_GP_REGS_SRST_IDX 19
#define HIVE_GP_REGS_SLV_REG_SRST_IDX 20 #define HIVE_GP_REGS_SLV_REG_SRST_IDX 20
#define HIVE_GP_REGS_VISA_REG_IDX 21
/* Bit numbers of the soft reset register */ /* Bit numbers of the soft reset register */
#define HIVE_GP_REGS_SRST_ISYS_CBUS 0 #define HIVE_GP_REGS_SRST_ISYS_CBUS 0
...@@ -222,7 +219,6 @@ ...@@ -222,7 +219,6 @@
#define HIVE_GP_TIMER_SP_B_STRMON_IRQ 16 #define HIVE_GP_TIMER_SP_B_STRMON_IRQ 16
#define HIVE_GP_TIMER_ISP_STRMON_IRQ 17 #define HIVE_GP_TIMER_ISP_STRMON_IRQ 17
#define HIVE_GP_TIMER_MOD_STRMON_IRQ 18 #define HIVE_GP_TIMER_MOD_STRMON_IRQ 18
#define HIVE_GP_TIMER_ISP_PMEM_ERROR_IRQ 19
#define HIVE_GP_TIMER_ISP_BAMEM_ERROR_IRQ 20 #define HIVE_GP_TIMER_ISP_BAMEM_ERROR_IRQ 20
#define HIVE_GP_TIMER_ISP_DMEM_ERROR_IRQ 21 #define HIVE_GP_TIMER_ISP_DMEM_ERROR_IRQ 21
#define HIVE_GP_TIMER_SP_ICACHE_MEM_ERROR_IRQ 22 #define HIVE_GP_TIMER_SP_ICACHE_MEM_ERROR_IRQ 22
......
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