arm64: dts: sc7180: Fix indentation/ordering of qspi nodes in sc7180-idp

The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section.  Fix.
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc649 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeidSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

arch/arm64/boot/dts/qcom/sc7180-idp.dts

@@ -232,6 +232,20 @@ vreg_bob: bob {
 	};
 };
 
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+	};
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };
@@ -250,6 +264,29 @@ &uart8 {
 
 /* PINCTRL - additions to nodes defined in sc7180.dtsi */
 
+&qspi_clk {
+	pinconf {
+		pins = "gpio63";
+		bias-disable;
+	};
+};
+
+&qspi_cs0 {
+	pinconf {
+		pins = "gpio68";
+		bias-disable;
+	};
+};
+
+&qspi_data01 {
+	pinconf {
+		pins = "gpio64", "gpio65";
+
+		/* High-Z when no transfers; nice to park the lines */
+		bias-pull-up;
+	};
+};
+
 &qup_i2c2_default {
 	pinconf {
 		pins = "gpio15", "gpio16";
@@ -364,39 +401,3 @@ pinconf {
 	};
 };
 
-&qspi {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <25000000>;
-		spi-tx-bus-width = <2>;
-		spi-rx-bus-width = <2>;
-	};
-};
-
-&qspi_cs0 {
-		pinconf {
-			pins = "gpio68";
-			bias-disable;
-		};
-};
-
-&qspi_clk {
-		pinconf {
-			pins = "gpio63";
-			bias-disable;
-		};
-};
-
-&qspi_data01 {
-		pinconf {
-			pins = "gpio64", "gpio65";
-
-			/* High-Z when no transfers; nice to park the lines */
-			bias-pull-up;
-		};
-};