Commit 16ae16c6 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mmc-v4.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
 "MMC host:

   - sdhci-of-esdhc: Fix card detection
   - dw_mmc: Fix DMA error path"

* tag 'mmc-v4.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: dw_mmc: fix the error handling for dma operation
  mmc: sdhci-of-esdhc: fixup PRESENT_STATE read
parents bae73e80 647f80a1
...@@ -1058,6 +1058,7 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) ...@@ -1058,6 +1058,7 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data)
spin_unlock_irqrestore(&host->irq_lock, irqflags); spin_unlock_irqrestore(&host->irq_lock, irqflags);
if (host->dma_ops->start(host, sg_len)) { if (host->dma_ops->start(host, sg_len)) {
host->dma_ops->stop(host);
/* We can't do DMA, try PIO for this one */ /* We can't do DMA, try PIO for this one */
dev_dbg(host->dev, dev_dbg(host->dev,
"%s: fall back to PIO mode for current transfer\n", "%s: fall back to PIO mode for current transfer\n",
......
...@@ -66,6 +66,20 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host, ...@@ -66,6 +66,20 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
return ret; return ret;
} }
} }
/*
* The DAT[3:0] line signal levels and the CMD line signal level are
* not compatible with standard SDHC register. The line signal levels
* DAT[7:0] are at bits 31:24 and the command line signal level is at
* bit 23. All other bits are the same as in the standard SDHC
* register.
*/
if (spec_reg == SDHCI_PRESENT_STATE) {
ret = value & 0x000fffff;
ret |= (value >> 4) & SDHCI_DATA_LVL_MASK;
ret |= (value << 1) & SDHCI_CMD_LVL;
return ret;
}
ret = value; ret = value;
return ret; return ret;
} }
......
...@@ -73,6 +73,7 @@ ...@@ -73,6 +73,7 @@
#define SDHCI_DATA_LVL_MASK 0x00F00000 #define SDHCI_DATA_LVL_MASK 0x00F00000
#define SDHCI_DATA_LVL_SHIFT 20 #define SDHCI_DATA_LVL_SHIFT 20
#define SDHCI_DATA_0_LVL_MASK 0x00100000 #define SDHCI_DATA_0_LVL_MASK 0x00100000
#define SDHCI_CMD_LVL 0x01000000
#define SDHCI_HOST_CONTROL 0x28 #define SDHCI_HOST_CONTROL 0x28
#define SDHCI_CTRL_LED 0x01 #define SDHCI_CTRL_LED 0x01
......
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