Commit 1709b887 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'soc-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A number of fixes have accumulated, but they are largely for harmless
  issues:

   - Several OF node leak fixes

   - A fix to the Exynos7885 UART clock description

   - DTS fixes to prevent boot failures on TI AM64 and J721s2

   - Bus probe error handling fixes for Baikal-T1

   - A fixup to the way STM32 SoCs use separate dts files for different
     firmware stacks

   - Multiple code fixes for Arm SCMI firmware, all dealing with
     robustness of the implementation

   - Multiple NXP i.MX devicetree fixes, addressing incorrect data in DT
     nodes

   - Three updates to the MAINTAINERS file, including Florian Fainelli
     taking over BCM283x/BCM2711 (Raspberry Pi) from Nicolas Saenz
     Julienne"

* tag 'soc-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (29 commits)
  ARM: dts: aspeed: nuvia: rename vendor nuvia to qcom
  arm: mach-spear: Add missing of_node_put() in time.c
  ARM: cns3xxx: Fix refcount leak in cns3xxx_init
  MAINTAINERS: Update email address
  arm64: dts: ti: k3-am64-main: Remove support for HS400 speed mode
  arm64: dts: ti: k3-j721s2: Fix overlapping GICD memory region
  ARM: dts: bcm2711-rpi-400: Fix GPIO line names
  bus: bt1-axi: Don't print error on -EPROBE_DEFER
  bus: bt1-apb: Don't print error on -EPROBE_DEFER
  ARM: Fix refcount leak in axxia_boot_secondary
  ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15
  soc: imx: imx8m-blk-ctrl: fix display clock for LCDIF2 power domain
  ARM: dts: imx6qdl-colibri: Fix capacitive touch reset polarity
  ARM: dts: imx6qdl: correct PU regulator ramp delay
  firmware: arm_scmi: Fix incorrect error propagation in scmi_voltage_descriptors_get
  firmware: arm_scmi: Avoid using extended string-buffers sizes if not necessary
  firmware: arm_scmi: Fix SENSOR_AXIS_NAME_GET behaviour when unsupported
  ARM: dts: imx7: Move hsic_phy power domain to HSIC PHY node
  soc: bcm: brcmstb: pm: pm-arm: Fix refcount leak in brcmstb_pm_probe
  MAINTAINERS: Update BCM2711/BCM2835 maintainer
  ...
parents 413c1f14 7f058112
...@@ -2469,6 +2469,7 @@ ARM/NXP S32G ARCHITECTURE ...@@ -2469,6 +2469,7 @@ ARM/NXP S32G ARCHITECTURE
M: Chester Lin <clin@suse.com> M: Chester Lin <clin@suse.com>
R: Andreas Färber <afaerber@suse.de> R: Andreas Färber <afaerber@suse.de>
R: Matthias Brugger <mbrugger@suse.com> R: Matthias Brugger <mbrugger@suse.com>
R: NXP S32 Linux Team <s32@nxp.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
F: arch/arm64/boot/dts/freescale/s32g*.dts* F: arch/arm64/boot/dts/freescale/s32g*.dts*
...@@ -3812,12 +3813,12 @@ N: bcmbca ...@@ -3812,12 +3813,12 @@ N: bcmbca
N: bcm[9]?47622 N: bcm[9]?47622
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M: Nicolas Saenz Julienne <nsaenz@kernel.org> M: Florian Fainelli <f.fainelli@gmail.com>
R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com> R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi.git T: git git://github.com/broadcom/stblinux.git
F: Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml F: Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
F: drivers/pci/controller/pcie-brcmstb.c F: drivers/pci/controller/pcie-brcmstb.c
F: drivers/staging/vc04_services F: drivers/staging/vc04_services
...@@ -16536,7 +16537,7 @@ F: Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml ...@@ -16536,7 +16537,7 @@ F: Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
F: drivers/cpufreq/qcom-cpufreq-nvmem.c F: drivers/cpufreq/qcom-cpufreq-nvmem.c
QUALCOMM CRYPTO DRIVERS QUALCOMM CRYPTO DRIVERS
M: Thara Gopinath <thara.gopinath@linaro.org> M: Thara Gopinath <thara.gopinath@gmail.com>
L: linux-crypto@vger.kernel.org L: linux-crypto@vger.kernel.org
L: linux-arm-msm@vger.kernel.org L: linux-arm-msm@vger.kernel.org
S: Maintained S: Maintained
...@@ -16647,7 +16648,7 @@ F: include/linux/if_rmnet.h ...@@ -16647,7 +16648,7 @@ F: include/linux/if_rmnet.h
QUALCOMM TSENS THERMAL DRIVER QUALCOMM TSENS THERMAL DRIVER
M: Amit Kucheria <amitk@kernel.org> M: Amit Kucheria <amitk@kernel.org>
M: Thara Gopinath <thara.gopinath@linaro.org> M: Thara Gopinath <thara.gopinath@gmail.com>
L: linux-pm@vger.kernel.org L: linux-pm@vger.kernel.org
L: linux-arm-msm@vger.kernel.org L: linux-arm-msm@vger.kernel.org
S: Maintained S: Maintained
......
...@@ -1586,7 +1586,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ...@@ -1586,7 +1586,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-lenovo-hr630.dtb \ aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \ aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \ aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-nuvia-dc-scm.dtb \
aspeed-bmc-opp-lanyang.dtb \ aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \ aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-mowgli.dtb \ aspeed-bmc-opp-mowgli.dtb \
...@@ -1599,6 +1598,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ...@@ -1599,6 +1598,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-witherspoon.dtb \ aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \ aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \ aspeed-bmc-portwell-neptune.dtb \
aspeed-bmc-qcom-dc-scm-v1.dtb \
aspeed-bmc-quanta-q71l.dtb \ aspeed-bmc-quanta-q71l.dtb \
aspeed-bmc-quanta-s6q.dtb \ aspeed-bmc-quanta-s6q.dtb \
aspeed-bmc-supermicro-x11spi.dtb \ aspeed-bmc-supermicro-x11spi.dtb \
......
...@@ -6,8 +6,8 @@ ...@@ -6,8 +6,8 @@
#include "aspeed-g6.dtsi" #include "aspeed-g6.dtsi"
/ { / {
model = "Nuvia DC-SCM BMC"; model = "Qualcomm DC-SCM V1 BMC";
compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600"; compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
aliases { aliases {
serial4 = &uart5; serial4 = &uart5;
......
...@@ -28,12 +28,12 @@ gpio-poweroff { ...@@ -28,12 +28,12 @@ gpio-poweroff {
&expgpio { &expgpio {
gpio-line-names = "BT_ON", gpio-line-names = "BT_ON",
"WL_ON", "WL_ON",
"", "PWR_LED_OFF",
"GLOBAL_RESET", "GLOBAL_RESET",
"VDD_SD_IO_SEL", "VDD_SD_IO_SEL",
"CAM_GPIO", "GLOBAL_SHUTDOWN",
"SD_PWR_ON", "SD_PWR_ON",
"SD_OC_N"; "SHUTDOWN_REQUEST";
}; };
&genet_mdio { &genet_mdio {
......
...@@ -593,7 +593,7 @@ atmel_mxt_ts: touchscreen@4a { ...@@ -593,7 +593,7 @@ atmel_mxt_ts: touchscreen@4a {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_atmel_conn>; pinctrl-0 = <&pinctrl_atmel_conn>;
reg = <0x4a>; reg = <0x4a>;
reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */ reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* SODIMM 106 */
status = "disabled"; status = "disabled";
}; };
}; };
......
...@@ -762,7 +762,7 @@ reg_pu: regulator-vddpu { ...@@ -762,7 +762,7 @@ reg_pu: regulator-vddpu {
regulator-name = "vddpu"; regulator-name = "vddpu";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1450000>; regulator-max-microvolt = <1450000>;
regulator-enable-ramp-delay = <150>; regulator-enable-ramp-delay = <380>;
anatop-reg-offset = <0x140>; anatop-reg-offset = <0x140>;
anatop-vol-bit-shift = <9>; anatop-vol-bit-shift = <9>;
anatop-vol-bit-width = <5>; anatop-vol-bit-width = <5>;
......
...@@ -120,6 +120,7 @@ usbphynop3: usbphynop3 { ...@@ -120,6 +120,7 @@ usbphynop3: usbphynop3 {
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>; clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
clock-names = "main_clk"; clock-names = "main_clk";
power-domains = <&pgc_hsic_phy>;
#phy-cells = <0>; #phy-cells = <0>;
}; };
...@@ -1153,7 +1154,6 @@ usbh: usb@30b30000 { ...@@ -1153,7 +1154,6 @@ usbh: usb@30b30000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b30000 0x200>; reg = <0x30b30000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pgc_hsic_phy>;
clocks = <&clks IMX7D_USB_CTRL_CLK>; clocks = <&clks IMX7D_USB_CTRL_CLK>;
fsl,usbphy = <&usbphynop3>; fsl,usbphy = <&usbphynop3>;
fsl,usbmisc = <&usbmisc3 0>; fsl,usbmisc = <&usbmisc3 0>;
......
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
/ {
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
};
scmi: scmi {
compatible = "linaro,scmi-optee";
#address-cells = <1>;
#size-cells = <0>;
linaro,optee-channel-id = <0>;
shmem = <&scmi_shm>;
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
};
scmi_reset: protocol@16 {
reg = <0x16>;
#reset-cells = <1>;
};
};
};
soc {
scmi_sram: sram@2ffff000 {
compatible = "mmio-sram";
reg = <0x2ffff000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2ffff000 0x1000>;
scmi_shm: scmi-sram@0 {
compatible = "arm,scmi-shmem";
reg = <0 0x80>;
};
};
};
};
...@@ -115,33 +115,6 @@ booster: regulator-booster { ...@@ -115,33 +115,6 @@ booster: regulator-booster {
status = "disabled"; status = "disabled";
}; };
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
status = "disabled";
};
scmi: scmi {
compatible = "linaro,scmi-optee";
#address-cells = <1>;
#size-cells = <0>;
linaro,optee-channel-id = <0>;
shmem = <&scmi_shm>;
status = "disabled";
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
};
scmi_reset: protocol@16 {
reg = <0x16>;
#reset-cells = <1>;
};
};
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -149,20 +122,6 @@ soc { ...@@ -149,20 +122,6 @@ soc {
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
ranges; ranges;
scmi_sram: sram@2ffff000 {
compatible = "mmio-sram";
reg = <0x2ffff000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2ffff000 0x1000>;
scmi_shm: scmi-sram@0 {
compatible = "arm,scmi-shmem";
reg = <0 0x80>;
status = "disabled";
};
};
timers2: timer@40000000 { timers2: timer@40000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "stm32mp157a-dk1.dts" #include "stm32mp157a-dk1.dts"
#include "stm32mp15-scmi.dtsi"
/ { / {
model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board"; model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
...@@ -54,10 +55,6 @@ &mlahb { ...@@ -54,10 +55,6 @@ &mlahb {
resets = <&scmi_reset RST_SCMI_MCU>; resets = <&scmi_reset RST_SCMI_MCU>;
}; };
&optee {
status = "okay";
};
&rcc { &rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon"; compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi"; clock-names = "hse", "hsi", "csi", "lse", "lsi";
...@@ -76,11 +73,3 @@ &rng1 { ...@@ -76,11 +73,3 @@ &rng1 {
&rtc { &rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
}; };
&scmi {
status = "okay";
};
&scmi_shm {
status = "okay";
};
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "stm32mp157c-dk2.dts" #include "stm32mp157c-dk2.dts"
#include "stm32mp15-scmi.dtsi"
/ { / {
model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board"; model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
...@@ -63,10 +64,6 @@ &mlahb { ...@@ -63,10 +64,6 @@ &mlahb {
resets = <&scmi_reset RST_SCMI_MCU>; resets = <&scmi_reset RST_SCMI_MCU>;
}; };
&optee {
status = "okay";
};
&rcc { &rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon"; compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi"; clock-names = "hse", "hsi", "csi", "lse", "lsi";
...@@ -85,11 +82,3 @@ &rng1 { ...@@ -85,11 +82,3 @@ &rng1 {
&rtc { &rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
}; };
&scmi {
status = "okay";
};
&scmi_shm {
status = "okay";
};
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "stm32mp157c-ed1.dts" #include "stm32mp157c-ed1.dts"
#include "stm32mp15-scmi.dtsi"
/ { / {
model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter"; model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
...@@ -59,10 +60,6 @@ &mlahb { ...@@ -59,10 +60,6 @@ &mlahb {
resets = <&scmi_reset RST_SCMI_MCU>; resets = <&scmi_reset RST_SCMI_MCU>;
}; };
&optee {
status = "okay";
};
&rcc { &rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon"; compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi"; clock-names = "hse", "hsi", "csi", "lse", "lsi";
...@@ -81,11 +78,3 @@ &rng1 { ...@@ -81,11 +78,3 @@ &rng1 {
&rtc { &rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
}; };
&scmi {
status = "okay";
};
&scmi_shm {
status = "okay";
};
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include "stm32mp157c-ev1.dts" #include "stm32mp157c-ev1.dts"
#include "stm32mp15-scmi.dtsi"
/ { / {
model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother"; model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
...@@ -68,10 +69,6 @@ &mlahb { ...@@ -68,10 +69,6 @@ &mlahb {
resets = <&scmi_reset RST_SCMI_MCU>; resets = <&scmi_reset RST_SCMI_MCU>;
}; };
&optee {
status = "okay";
};
&rcc { &rcc {
compatible = "st,stm32mp1-rcc-secure", "syscon"; compatible = "st,stm32mp1-rcc-secure", "syscon";
clock-names = "hse", "hsi", "csi", "lse", "lsi"; clock-names = "hse", "hsi", "csi", "lse", "lsi";
...@@ -90,11 +87,3 @@ &rng1 { ...@@ -90,11 +87,3 @@ &rng1 {
&rtc { &rtc {
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>; clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
}; };
&scmi {
status = "okay";
};
&scmi_shm {
status = "okay";
};
...@@ -39,6 +39,7 @@ static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -39,6 +39,7 @@ static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
return -ENOENT; return -ENOENT;
syscon = of_iomap(syscon_np, 0); syscon = of_iomap(syscon_np, 0);
of_node_put(syscon_np);
if (!syscon) if (!syscon)
return -ENOMEM; return -ENOMEM;
......
...@@ -372,6 +372,7 @@ static void __init cns3xxx_init(void) ...@@ -372,6 +372,7 @@ static void __init cns3xxx_init(void)
/* De-Asscer SATA Reset */ /* De-Asscer SATA Reset */
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA)); cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
} }
of_node_put(dn);
dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci"); dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
if (of_device_is_available(dn)) { if (of_device_is_available(dn)) {
...@@ -385,6 +386,7 @@ static void __init cns3xxx_init(void) ...@@ -385,6 +386,7 @@ static void __init cns3xxx_init(void)
cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO)); cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO)); cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
} }
of_node_put(dn);
pm_power_off = cns3xxx_power_off; pm_power_off = cns3xxx_power_off;
......
...@@ -149,6 +149,7 @@ static void exynos_map_pmu(void) ...@@ -149,6 +149,7 @@ static void exynos_map_pmu(void)
np = of_find_matching_node(NULL, exynos_dt_pmu_match); np = of_find_matching_node(NULL, exynos_dt_pmu_match);
if (np) if (np)
pmu_base_addr = of_iomap(np, 0); pmu_base_addr = of_iomap(np, 0);
of_node_put(np);
} }
static void __init exynos_init_irq(void) static void __init exynos_init_irq(void)
......
...@@ -218,13 +218,13 @@ void __init spear_setup_of_timer(void) ...@@ -218,13 +218,13 @@ void __init spear_setup_of_timer(void)
irq = irq_of_parse_and_map(np, 0); irq = irq_of_parse_and_map(np, 0);
if (!irq) { if (!irq) {
pr_err("%s: No irq passed for timer via DT\n", __func__); pr_err("%s: No irq passed for timer via DT\n", __func__);
return; goto err_put_np;
} }
gpt_base = of_iomap(np, 0); gpt_base = of_iomap(np, 0);
if (!gpt_base) { if (!gpt_base) {
pr_err("%s: of iomap failed\n", __func__); pr_err("%s: of iomap failed\n", __func__);
return; goto err_put_np;
} }
gpt_clk = clk_get_sys("gpt0", NULL); gpt_clk = clk_get_sys("gpt0", NULL);
...@@ -239,6 +239,8 @@ void __init spear_setup_of_timer(void) ...@@ -239,6 +239,8 @@ void __init spear_setup_of_timer(void)
goto err_prepare_enable_clk; goto err_prepare_enable_clk;
} }
of_node_put(np);
spear_clockevent_init(irq); spear_clockevent_init(irq);
spear_clocksource_init(); spear_clocksource_init();
...@@ -248,4 +250,6 @@ void __init spear_setup_of_timer(void) ...@@ -248,4 +250,6 @@ void __init spear_setup_of_timer(void)
clk_put(gpt_clk); clk_put(gpt_clk);
err_iomap: err_iomap:
iounmap(gpt_base); iounmap(gpt_base);
err_put_np:
of_node_put(np);
} }
...@@ -280,8 +280,8 @@ serial_0: serial@13800000 { ...@@ -280,8 +280,8 @@ serial_0: serial@13800000 {
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>; pinctrl-0 = <&uart0_bus>;
clocks = <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>, clocks = <&cmu_peri CLK_GOUT_UART0_PCLK>,
<&cmu_peri CLK_GOUT_UART0_PCLK>; <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>; samsung,uart-fifosize = <64>;
status = "disabled"; status = "disabled";
...@@ -293,8 +293,8 @@ serial_1: serial@13810000 { ...@@ -293,8 +293,8 @@ serial_1: serial@13810000 {
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart1_bus>; pinctrl-0 = <&uart1_bus>;
clocks = <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>, clocks = <&cmu_peri CLK_GOUT_UART1_PCLK>,
<&cmu_peri CLK_GOUT_UART1_PCLK>; <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>; samsung,uart-fifosize = <256>;
status = "disabled"; status = "disabled";
...@@ -306,8 +306,8 @@ serial_2: serial@13820000 { ...@@ -306,8 +306,8 @@ serial_2: serial@13820000 {
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart2_bus>; pinctrl-0 = <&uart2_bus>;
clocks = <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>, clocks = <&cmu_peri CLK_GOUT_UART2_PCLK>,
<&cmu_peri CLK_GOUT_UART2_PCLK>; <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>;
clock-names = "uart", "clk_uart_baud0"; clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>; samsung,uart-fifosize = <256>;
status = "disabled"; status = "disabled";
......
...@@ -79,7 +79,7 @@ psci { ...@@ -79,7 +79,7 @@ psci {
}; };
}; };
soc { soc@0 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
......
...@@ -456,13 +456,11 @@ sdhci0: mmc@fa10000 { ...@@ -456,13 +456,11 @@ sdhci0: mmc@fa10000 {
clock-names = "clk_ahb", "clk_xin"; clock-names = "clk_ahb", "clk_xin";
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
mmc-hs400-1_8v;
ti,trm-icp = <0x2>; ti,trm-icp = <0x2>;
ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-ddr52 = <0x6>; ti,otap-del-sel-ddr52 = <0x6>;
ti,otap-del-sel-hs200 = <0x7>; ti,otap-del-sel-hs200 = <0x7>;
ti,otap-del-sel-hs400 = <0x4>;
}; };
sdhci1: mmc@fa00000 { sdhci1: mmc@fa00000 {
......
...@@ -33,7 +33,7 @@ gic500: interrupt-controller@1800000 { ...@@ -33,7 +33,7 @@ gic500: interrupt-controller@1800000 {
ranges; ranges;
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupt-controller; interrupt-controller;
reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */ reg = <0x00 0x01800000 0x00 0x100000>, /* GICD */
<0x00 0x01900000 0x00 0x100000>, /* GICR */ <0x00 0x01900000 0x00 0x100000>, /* GICR */
<0x00 0x6f000000 0x00 0x2000>, /* GICC */ <0x00 0x6f000000 0x00 0x2000>, /* GICC */
<0x00 0x6f010000 0x00 0x1000>, /* GICH */ <0x00 0x6f010000 0x00 0x1000>, /* GICH */
......
...@@ -175,10 +175,9 @@ static int bt1_apb_request_rst(struct bt1_apb *apb) ...@@ -175,10 +175,9 @@ static int bt1_apb_request_rst(struct bt1_apb *apb)
int ret; int ret;
apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst"); apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst");
if (IS_ERR(apb->prst)) { if (IS_ERR(apb->prst))
dev_warn(apb->dev, "Couldn't get reset control line\n"); return dev_err_probe(apb->dev, PTR_ERR(apb->prst),
return PTR_ERR(apb->prst); "Couldn't get reset control line\n");
}
ret = reset_control_deassert(apb->prst); ret = reset_control_deassert(apb->prst);
if (ret) if (ret)
...@@ -199,10 +198,9 @@ static int bt1_apb_request_clk(struct bt1_apb *apb) ...@@ -199,10 +198,9 @@ static int bt1_apb_request_clk(struct bt1_apb *apb)
int ret; int ret;
apb->pclk = devm_clk_get(apb->dev, "pclk"); apb->pclk = devm_clk_get(apb->dev, "pclk");
if (IS_ERR(apb->pclk)) { if (IS_ERR(apb->pclk))
dev_err(apb->dev, "Couldn't get APB clock descriptor\n"); return dev_err_probe(apb->dev, PTR_ERR(apb->pclk),
return PTR_ERR(apb->pclk); "Couldn't get APB clock descriptor\n");
}
ret = clk_prepare_enable(apb->pclk); ret = clk_prepare_enable(apb->pclk);
if (ret) { if (ret) {
......
...@@ -135,10 +135,9 @@ static int bt1_axi_request_rst(struct bt1_axi *axi) ...@@ -135,10 +135,9 @@ static int bt1_axi_request_rst(struct bt1_axi *axi)
int ret; int ret;
axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst"); axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst");
if (IS_ERR(axi->arst)) { if (IS_ERR(axi->arst))
dev_warn(axi->dev, "Couldn't get reset control line\n"); return dev_err_probe(axi->dev, PTR_ERR(axi->arst),
return PTR_ERR(axi->arst); "Couldn't get reset control line\n");
}
ret = reset_control_deassert(axi->arst); ret = reset_control_deassert(axi->arst);
if (ret) if (ret)
...@@ -159,10 +158,9 @@ static int bt1_axi_request_clk(struct bt1_axi *axi) ...@@ -159,10 +158,9 @@ static int bt1_axi_request_clk(struct bt1_axi *axi)
int ret; int ret;
axi->aclk = devm_clk_get(axi->dev, "aclk"); axi->aclk = devm_clk_get(axi->dev, "aclk");
if (IS_ERR(axi->aclk)) { if (IS_ERR(axi->aclk))
dev_err(axi->dev, "Couldn't get AXI Interconnect clock\n"); return dev_err_probe(axi->dev, PTR_ERR(axi->aclk),
return PTR_ERR(axi->aclk); "Couldn't get AXI Interconnect clock\n");
}
ret = clk_prepare_enable(axi->aclk); ret = clk_prepare_enable(axi->aclk);
if (ret) { if (ret) {
......
...@@ -36,7 +36,7 @@ struct scmi_msg_resp_base_attributes { ...@@ -36,7 +36,7 @@ struct scmi_msg_resp_base_attributes {
struct scmi_msg_resp_base_discover_agent { struct scmi_msg_resp_base_discover_agent {
__le32 agent_id; __le32 agent_id;
u8 name[SCMI_MAX_STR_SIZE]; u8 name[SCMI_SHORT_NAME_MAX_SIZE];
}; };
...@@ -119,7 +119,7 @@ scmi_base_vendor_id_get(const struct scmi_protocol_handle *ph, bool sub_vendor) ...@@ -119,7 +119,7 @@ scmi_base_vendor_id_get(const struct scmi_protocol_handle *ph, bool sub_vendor)
ret = ph->xops->do_xfer(ph, t); ret = ph->xops->do_xfer(ph, t);
if (!ret) if (!ret)
memcpy(vendor_id, t->rx.buf, size); strscpy(vendor_id, t->rx.buf, size);
ph->xops->xfer_put(ph, t); ph->xops->xfer_put(ph, t);
...@@ -221,12 +221,18 @@ scmi_base_implementation_list_get(const struct scmi_protocol_handle *ph, ...@@ -221,12 +221,18 @@ scmi_base_implementation_list_get(const struct scmi_protocol_handle *ph,
calc_list_sz = (1 + (loop_num_ret - 1) / sizeof(u32)) * calc_list_sz = (1 + (loop_num_ret - 1) / sizeof(u32)) *
sizeof(u32); sizeof(u32);
if (calc_list_sz != real_list_sz) { if (calc_list_sz != real_list_sz) {
dev_err(dev, dev_warn(dev,
"Malformed reply - real_sz:%zd calc_sz:%u\n", "Malformed reply - real_sz:%zd calc_sz:%u (loop_num_ret:%d)\n",
real_list_sz, calc_list_sz); real_list_sz, calc_list_sz, loop_num_ret);
/*
* Bail out if the expected list size is bigger than the
* total payload size of the received reply.
*/
if (calc_list_sz > real_list_sz) {
ret = -EPROTO; ret = -EPROTO;
break; break;
} }
}
for (loop = 0; loop < loop_num_ret; loop++) for (loop = 0; loop < loop_num_ret; loop++)
protocols_imp[tot_num_ret + loop] = *(list + loop); protocols_imp[tot_num_ret + loop] = *(list + loop);
...@@ -270,7 +276,7 @@ static int scmi_base_discover_agent_get(const struct scmi_protocol_handle *ph, ...@@ -270,7 +276,7 @@ static int scmi_base_discover_agent_get(const struct scmi_protocol_handle *ph,
ret = ph->xops->do_xfer(ph, t); ret = ph->xops->do_xfer(ph, t);
if (!ret) { if (!ret) {
agent_info = t->rx.buf; agent_info = t->rx.buf;
strlcpy(name, agent_info->name, SCMI_MAX_STR_SIZE); strscpy(name, agent_info->name, SCMI_SHORT_NAME_MAX_SIZE);
} }
ph->xops->xfer_put(ph, t); ph->xops->xfer_put(ph, t);
...@@ -369,7 +375,7 @@ static int scmi_base_protocol_init(const struct scmi_protocol_handle *ph) ...@@ -369,7 +375,7 @@ static int scmi_base_protocol_init(const struct scmi_protocol_handle *ph)
int id, ret; int id, ret;
u8 *prot_imp; u8 *prot_imp;
u32 version; u32 version;
char name[SCMI_MAX_STR_SIZE]; char name[SCMI_SHORT_NAME_MAX_SIZE];
struct device *dev = ph->dev; struct device *dev = ph->dev;
struct scmi_revision_info *rev = scmi_revision_area_get(ph); struct scmi_revision_info *rev = scmi_revision_area_get(ph);
......
...@@ -153,7 +153,7 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph, ...@@ -153,7 +153,7 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
if (!ret) { if (!ret) {
u32 latency = 0; u32 latency = 0;
attributes = le32_to_cpu(attr->attributes); attributes = le32_to_cpu(attr->attributes);
strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE); strscpy(clk->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
/* clock_enable_latency field is present only since SCMI v3.1 */ /* clock_enable_latency field is present only since SCMI v3.1 */
if (PROTOCOL_REV_MAJOR(version) >= 0x2) if (PROTOCOL_REV_MAJOR(version) >= 0x2)
latency = le32_to_cpu(attr->clock_enable_latency); latency = le32_to_cpu(attr->clock_enable_latency);
...@@ -266,9 +266,7 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, ...@@ -266,9 +266,7 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
struct scmi_clock_info *clk) struct scmi_clock_info *clk)
{ {
int ret; int ret;
void *iter; void *iter;
struct scmi_msg_clock_describe_rates *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_clk_describe_prepare_message, .prepare_message = iter_clk_describe_prepare_message,
.update_state = iter_clk_describe_update_state, .update_state = iter_clk_describe_update_state,
...@@ -281,7 +279,8 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, ...@@ -281,7 +279,8 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES, iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES,
CLOCK_DESCRIBE_RATES, CLOCK_DESCRIBE_RATES,
sizeof(*msg), &cpriv); sizeof(struct scmi_msg_clock_describe_rates),
&cpriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
......
...@@ -252,7 +252,7 @@ scmi_perf_domain_attributes_get(const struct scmi_protocol_handle *ph, ...@@ -252,7 +252,7 @@ scmi_perf_domain_attributes_get(const struct scmi_protocol_handle *ph,
dom_info->mult_factor = dom_info->mult_factor =
(dom_info->sustained_freq_khz * 1000) / (dom_info->sustained_freq_khz * 1000) /
dom_info->sustained_perf_level; dom_info->sustained_perf_level;
strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); strscpy(dom_info->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
} }
ph->xops->xfer_put(ph, t); ph->xops->xfer_put(ph, t);
...@@ -332,7 +332,6 @@ scmi_perf_describe_levels_get(const struct scmi_protocol_handle *ph, u32 domain, ...@@ -332,7 +332,6 @@ scmi_perf_describe_levels_get(const struct scmi_protocol_handle *ph, u32 domain,
{ {
int ret; int ret;
void *iter; void *iter;
struct scmi_msg_perf_describe_levels *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_perf_levels_prepare_message, .prepare_message = iter_perf_levels_prepare_message,
.update_state = iter_perf_levels_update_state, .update_state = iter_perf_levels_update_state,
...@@ -345,7 +344,8 @@ scmi_perf_describe_levels_get(const struct scmi_protocol_handle *ph, u32 domain, ...@@ -345,7 +344,8 @@ scmi_perf_describe_levels_get(const struct scmi_protocol_handle *ph, u32 domain,
iter = ph->hops->iter_response_init(ph, &ops, MAX_OPPS, iter = ph->hops->iter_response_init(ph, &ops, MAX_OPPS,
PERF_DESCRIBE_LEVELS, PERF_DESCRIBE_LEVELS,
sizeof(*msg), &ppriv); sizeof(struct scmi_msg_perf_describe_levels),
&ppriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
......
...@@ -122,7 +122,7 @@ scmi_power_domain_attributes_get(const struct scmi_protocol_handle *ph, ...@@ -122,7 +122,7 @@ scmi_power_domain_attributes_get(const struct scmi_protocol_handle *ph,
dom_info->state_set_notify = SUPPORTS_STATE_SET_NOTIFY(flags); dom_info->state_set_notify = SUPPORTS_STATE_SET_NOTIFY(flags);
dom_info->state_set_async = SUPPORTS_STATE_SET_ASYNC(flags); dom_info->state_set_async = SUPPORTS_STATE_SET_ASYNC(flags);
dom_info->state_set_sync = SUPPORTS_STATE_SET_SYNC(flags); dom_info->state_set_sync = SUPPORTS_STATE_SET_SYNC(flags);
strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); strscpy(dom_info->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
} }
ph->xops->xfer_put(ph, t); ph->xops->xfer_put(ph, t);
......
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
#include <asm/unaligned.h> #include <asm/unaligned.h>
#define SCMI_SHORT_NAME_MAX_SIZE 16
#define PROTOCOL_REV_MINOR_MASK GENMASK(15, 0) #define PROTOCOL_REV_MINOR_MASK GENMASK(15, 0)
#define PROTOCOL_REV_MAJOR_MASK GENMASK(31, 16) #define PROTOCOL_REV_MAJOR_MASK GENMASK(31, 16)
#define PROTOCOL_REV_MAJOR(x) ((u16)(FIELD_GET(PROTOCOL_REV_MAJOR_MASK, (x)))) #define PROTOCOL_REV_MAJOR(x) ((u16)(FIELD_GET(PROTOCOL_REV_MAJOR_MASK, (x))))
......
...@@ -116,7 +116,7 @@ scmi_reset_domain_attributes_get(const struct scmi_protocol_handle *ph, ...@@ -116,7 +116,7 @@ scmi_reset_domain_attributes_get(const struct scmi_protocol_handle *ph,
dom_info->latency_us = le32_to_cpu(attr->latency); dom_info->latency_us = le32_to_cpu(attr->latency);
if (dom_info->latency_us == U32_MAX) if (dom_info->latency_us == U32_MAX)
dom_info->latency_us = 0; dom_info->latency_us = 0;
strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE); strscpy(dom_info->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
} }
ph->xops->xfer_put(ph, t); ph->xops->xfer_put(ph, t);
......
...@@ -338,7 +338,6 @@ static int scmi_sensor_update_intervals(const struct scmi_protocol_handle *ph, ...@@ -338,7 +338,6 @@ static int scmi_sensor_update_intervals(const struct scmi_protocol_handle *ph,
struct scmi_sensor_info *s) struct scmi_sensor_info *s)
{ {
void *iter; void *iter;
struct scmi_msg_sensor_list_update_intervals *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_intervals_prepare_message, .prepare_message = iter_intervals_prepare_message,
.update_state = iter_intervals_update_state, .update_state = iter_intervals_update_state,
...@@ -351,22 +350,28 @@ static int scmi_sensor_update_intervals(const struct scmi_protocol_handle *ph, ...@@ -351,22 +350,28 @@ static int scmi_sensor_update_intervals(const struct scmi_protocol_handle *ph,
iter = ph->hops->iter_response_init(ph, &ops, s->intervals.count, iter = ph->hops->iter_response_init(ph, &ops, s->intervals.count,
SENSOR_LIST_UPDATE_INTERVALS, SENSOR_LIST_UPDATE_INTERVALS,
sizeof(*msg), &upriv); sizeof(struct scmi_msg_sensor_list_update_intervals),
&upriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
return ph->hops->iter_response_run(iter); return ph->hops->iter_response_run(iter);
} }
struct scmi_apriv {
bool any_axes_support_extended_names;
struct scmi_sensor_info *s;
};
static void iter_axes_desc_prepare_message(void *message, static void iter_axes_desc_prepare_message(void *message,
const unsigned int desc_index, const unsigned int desc_index,
const void *priv) const void *priv)
{ {
struct scmi_msg_sensor_axis_description_get *msg = message; struct scmi_msg_sensor_axis_description_get *msg = message;
const struct scmi_sensor_info *s = priv; const struct scmi_apriv *apriv = priv;
/* Set the number of sensors to be skipped/already read */ /* Set the number of sensors to be skipped/already read */
msg->id = cpu_to_le32(s->id); msg->id = cpu_to_le32(apriv->s->id);
msg->axis_desc_index = cpu_to_le32(desc_index); msg->axis_desc_index = cpu_to_le32(desc_index);
} }
...@@ -393,19 +398,21 @@ iter_axes_desc_process_response(const struct scmi_protocol_handle *ph, ...@@ -393,19 +398,21 @@ iter_axes_desc_process_response(const struct scmi_protocol_handle *ph,
u32 attrh, attrl; u32 attrh, attrl;
struct scmi_sensor_axis_info *a; struct scmi_sensor_axis_info *a;
size_t dsize = SCMI_MSG_RESP_AXIS_DESCR_BASE_SZ; size_t dsize = SCMI_MSG_RESP_AXIS_DESCR_BASE_SZ;
struct scmi_sensor_info *s = priv; struct scmi_apriv *apriv = priv;
const struct scmi_axis_descriptor *adesc = st->priv; const struct scmi_axis_descriptor *adesc = st->priv;
attrl = le32_to_cpu(adesc->attributes_low); attrl = le32_to_cpu(adesc->attributes_low);
if (SUPPORTS_EXTENDED_AXIS_NAMES(attrl))
apriv->any_axes_support_extended_names = true;
a = &s->axis[st->desc_index + st->loop_idx]; a = &apriv->s->axis[st->desc_index + st->loop_idx];
a->id = le32_to_cpu(adesc->id); a->id = le32_to_cpu(adesc->id);
a->extended_attrs = SUPPORTS_EXTEND_ATTRS(attrl); a->extended_attrs = SUPPORTS_EXTEND_ATTRS(attrl);
attrh = le32_to_cpu(adesc->attributes_high); attrh = le32_to_cpu(adesc->attributes_high);
a->scale = S32_EXT(SENSOR_SCALE(attrh)); a->scale = S32_EXT(SENSOR_SCALE(attrh));
a->type = SENSOR_TYPE(attrh); a->type = SENSOR_TYPE(attrh);
strscpy(a->name, adesc->name, SCMI_MAX_STR_SIZE); strscpy(a->name, adesc->name, SCMI_SHORT_NAME_MAX_SIZE);
if (a->extended_attrs) { if (a->extended_attrs) {
unsigned int ares = le32_to_cpu(adesc->resolution); unsigned int ares = le32_to_cpu(adesc->resolution);
...@@ -444,10 +451,19 @@ iter_axes_extended_name_process_response(const struct scmi_protocol_handle *ph, ...@@ -444,10 +451,19 @@ iter_axes_extended_name_process_response(const struct scmi_protocol_handle *ph,
void *priv) void *priv)
{ {
struct scmi_sensor_axis_info *a; struct scmi_sensor_axis_info *a;
const struct scmi_sensor_info *s = priv; const struct scmi_apriv *apriv = priv;
struct scmi_sensor_axis_name_descriptor *adesc = st->priv; struct scmi_sensor_axis_name_descriptor *adesc = st->priv;
u32 axis_id = le32_to_cpu(adesc->axis_id);
a = &s->axis[st->desc_index + st->loop_idx]; if (axis_id >= st->max_resources)
return -EPROTO;
/*
* Pick the corresponding descriptor based on the axis_id embedded
* in the reply since the list of axes supporting extended names
* can be a subset of all the axes.
*/
a = &apriv->s->axis[axis_id];
strscpy(a->name, adesc->name, SCMI_MAX_STR_SIZE); strscpy(a->name, adesc->name, SCMI_MAX_STR_SIZE);
st->priv = ++adesc; st->priv = ++adesc;
...@@ -458,21 +474,36 @@ static int ...@@ -458,21 +474,36 @@ static int
scmi_sensor_axis_extended_names_get(const struct scmi_protocol_handle *ph, scmi_sensor_axis_extended_names_get(const struct scmi_protocol_handle *ph,
struct scmi_sensor_info *s) struct scmi_sensor_info *s)
{ {
int ret;
void *iter; void *iter;
struct scmi_msg_sensor_axis_description_get *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_axes_desc_prepare_message, .prepare_message = iter_axes_desc_prepare_message,
.update_state = iter_axes_extended_name_update_state, .update_state = iter_axes_extended_name_update_state,
.process_response = iter_axes_extended_name_process_response, .process_response = iter_axes_extended_name_process_response,
}; };
struct scmi_apriv apriv = {
.any_axes_support_extended_names = false,
.s = s,
};
iter = ph->hops->iter_response_init(ph, &ops, s->num_axis, iter = ph->hops->iter_response_init(ph, &ops, s->num_axis,
SENSOR_AXIS_NAME_GET, SENSOR_AXIS_NAME_GET,
sizeof(*msg), s); sizeof(struct scmi_msg_sensor_axis_description_get),
&apriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
return ph->hops->iter_response_run(iter); /*
* Do not cause whole protocol initialization failure when failing to
* get extended names for axes.
*/
ret = ph->hops->iter_response_run(iter);
if (ret)
dev_warn(ph->dev,
"Failed to get axes extended names for %s (ret:%d).\n",
s->name, ret);
return 0;
} }
static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph, static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph,
...@@ -481,12 +512,15 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph, ...@@ -481,12 +512,15 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph,
{ {
int ret; int ret;
void *iter; void *iter;
struct scmi_msg_sensor_axis_description_get *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_axes_desc_prepare_message, .prepare_message = iter_axes_desc_prepare_message,
.update_state = iter_axes_desc_update_state, .update_state = iter_axes_desc_update_state,
.process_response = iter_axes_desc_process_response, .process_response = iter_axes_desc_process_response,
}; };
struct scmi_apriv apriv = {
.any_axes_support_extended_names = false,
.s = s,
};
s->axis = devm_kcalloc(ph->dev, s->num_axis, s->axis = devm_kcalloc(ph->dev, s->num_axis,
sizeof(*s->axis), GFP_KERNEL); sizeof(*s->axis), GFP_KERNEL);
...@@ -495,7 +529,8 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph, ...@@ -495,7 +529,8 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph,
iter = ph->hops->iter_response_init(ph, &ops, s->num_axis, iter = ph->hops->iter_response_init(ph, &ops, s->num_axis,
SENSOR_AXIS_DESCRIPTION_GET, SENSOR_AXIS_DESCRIPTION_GET,
sizeof(*msg), s); sizeof(struct scmi_msg_sensor_axis_description_get),
&apriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
...@@ -503,7 +538,8 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph, ...@@ -503,7 +538,8 @@ static int scmi_sensor_axis_description(const struct scmi_protocol_handle *ph,
if (ret) if (ret)
return ret; return ret;
if (PROTOCOL_REV_MAJOR(version) >= 0x3) if (PROTOCOL_REV_MAJOR(version) >= 0x3 &&
apriv.any_axes_support_extended_names)
ret = scmi_sensor_axis_extended_names_get(ph, s); ret = scmi_sensor_axis_extended_names_get(ph, s);
return ret; return ret;
...@@ -598,7 +634,7 @@ iter_sens_descr_process_response(const struct scmi_protocol_handle *ph, ...@@ -598,7 +634,7 @@ iter_sens_descr_process_response(const struct scmi_protocol_handle *ph,
SUPPORTS_AXIS(attrh) ? SUPPORTS_AXIS(attrh) ?
SENSOR_AXIS_NUMBER(attrh) : 0, SENSOR_AXIS_NUMBER(attrh) : 0,
SCMI_MAX_NUM_SENSOR_AXIS); SCMI_MAX_NUM_SENSOR_AXIS);
strscpy(s->name, sdesc->name, SCMI_MAX_STR_SIZE); strscpy(s->name, sdesc->name, SCMI_SHORT_NAME_MAX_SIZE);
/* /*
* If supported overwrite short name with the extended * If supported overwrite short name with the extended
......
...@@ -180,7 +180,6 @@ static int scmi_voltage_levels_get(const struct scmi_protocol_handle *ph, ...@@ -180,7 +180,6 @@ static int scmi_voltage_levels_get(const struct scmi_protocol_handle *ph,
{ {
int ret; int ret;
void *iter; void *iter;
struct scmi_msg_cmd_describe_levels *msg;
struct scmi_iterator_ops ops = { struct scmi_iterator_ops ops = {
.prepare_message = iter_volt_levels_prepare_message, .prepare_message = iter_volt_levels_prepare_message,
.update_state = iter_volt_levels_update_state, .update_state = iter_volt_levels_update_state,
...@@ -193,7 +192,8 @@ static int scmi_voltage_levels_get(const struct scmi_protocol_handle *ph, ...@@ -193,7 +192,8 @@ static int scmi_voltage_levels_get(const struct scmi_protocol_handle *ph,
iter = ph->hops->iter_response_init(ph, &ops, v->num_levels, iter = ph->hops->iter_response_init(ph, &ops, v->num_levels,
VOLTAGE_DESCRIBE_LEVELS, VOLTAGE_DESCRIBE_LEVELS,
sizeof(*msg), &vpriv); sizeof(struct scmi_msg_cmd_describe_levels),
&vpriv);
if (IS_ERR(iter)) if (IS_ERR(iter))
return PTR_ERR(iter); return PTR_ERR(iter);
...@@ -225,15 +225,14 @@ static int scmi_voltage_descriptors_get(const struct scmi_protocol_handle *ph, ...@@ -225,15 +225,14 @@ static int scmi_voltage_descriptors_get(const struct scmi_protocol_handle *ph,
/* Retrieve domain attributes at first ... */ /* Retrieve domain attributes at first ... */
put_unaligned_le32(dom, td->tx.buf); put_unaligned_le32(dom, td->tx.buf);
ret = ph->xops->do_xfer(ph, td);
/* Skip domain on comms error */ /* Skip domain on comms error */
if (ret) if (ph->xops->do_xfer(ph, td))
continue; continue;
v = vinfo->domains + dom; v = vinfo->domains + dom;
v->id = dom; v->id = dom;
attributes = le32_to_cpu(resp_dom->attr); attributes = le32_to_cpu(resp_dom->attr);
strlcpy(v->name, resp_dom->name, SCMI_MAX_STR_SIZE); strscpy(v->name, resp_dom->name, SCMI_SHORT_NAME_MAX_SIZE);
/* /*
* If supported overwrite short name with the extended one; * If supported overwrite short name with the extended one;
...@@ -249,12 +248,8 @@ static int scmi_voltage_descriptors_get(const struct scmi_protocol_handle *ph, ...@@ -249,12 +248,8 @@ static int scmi_voltage_descriptors_get(const struct scmi_protocol_handle *ph,
v->async_level_set = true; v->async_level_set = true;
} }
ret = scmi_voltage_levels_get(ph, v);
/* Skip invalid voltage descriptors */ /* Skip invalid voltage descriptors */
if (ret) scmi_voltage_levels_get(ph, v);
continue;
ph->xops->reset_rx_to_maxsz(ph, td);
} }
ph->xops->xfer_put(ph, td); ph->xops->xfer_put(ph, td);
......
...@@ -105,6 +105,7 @@ config TI_EMIF ...@@ -105,6 +105,7 @@ config TI_EMIF
config OMAP_GPMC config OMAP_GPMC
tristate "Texas Instruments OMAP SoC GPMC driver" tristate "Texas Instruments OMAP SoC GPMC driver"
depends on OF_ADDRESS depends on OF_ADDRESS
depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
select GPIOLIB select GPIOLIB
help help
This driver is for the General Purpose Memory Controller (GPMC) This driver is for the General Purpose Memory Controller (GPMC)
......
...@@ -404,13 +404,16 @@ static int mtk_smi_device_link_common(struct device *dev, struct device **com_de ...@@ -404,13 +404,16 @@ static int mtk_smi_device_link_common(struct device *dev, struct device **com_de
of_node_put(smi_com_node); of_node_put(smi_com_node);
if (smi_com_pdev) { if (smi_com_pdev) {
/* smi common is the supplier, Make sure it is ready before */ /* smi common is the supplier, Make sure it is ready before */
if (!platform_get_drvdata(smi_com_pdev)) if (!platform_get_drvdata(smi_com_pdev)) {
put_device(&smi_com_pdev->dev);
return -EPROBE_DEFER; return -EPROBE_DEFER;
}
smi_com_dev = &smi_com_pdev->dev; smi_com_dev = &smi_com_pdev->dev;
link = device_link_add(dev, smi_com_dev, link = device_link_add(dev, smi_com_dev,
DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS); DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
if (!link) { if (!link) {
dev_err(dev, "Unable to link smi-common dev\n"); dev_err(dev, "Unable to link smi-common dev\n");
put_device(&smi_com_pdev->dev);
return -ENODEV; return -ENODEV;
} }
*com_dev = smi_com_dev; *com_dev = smi_com_dev;
......
...@@ -1187,33 +1187,39 @@ static int of_get_dram_timings(struct exynos5_dmc *dmc) ...@@ -1187,33 +1187,39 @@ static int of_get_dram_timings(struct exynos5_dmc *dmc)
dmc->timing_row = devm_kmalloc_array(dmc->dev, TIMING_COUNT, dmc->timing_row = devm_kmalloc_array(dmc->dev, TIMING_COUNT,
sizeof(u32), GFP_KERNEL); sizeof(u32), GFP_KERNEL);
if (!dmc->timing_row) if (!dmc->timing_row) {
return -ENOMEM; ret = -ENOMEM;
goto put_node;
}
dmc->timing_data = devm_kmalloc_array(dmc->dev, TIMING_COUNT, dmc->timing_data = devm_kmalloc_array(dmc->dev, TIMING_COUNT,
sizeof(u32), GFP_KERNEL); sizeof(u32), GFP_KERNEL);
if (!dmc->timing_data) if (!dmc->timing_data) {
return -ENOMEM; ret = -ENOMEM;
goto put_node;
}
dmc->timing_power = devm_kmalloc_array(dmc->dev, TIMING_COUNT, dmc->timing_power = devm_kmalloc_array(dmc->dev, TIMING_COUNT,
sizeof(u32), GFP_KERNEL); sizeof(u32), GFP_KERNEL);
if (!dmc->timing_power) if (!dmc->timing_power) {
return -ENOMEM; ret = -ENOMEM;
goto put_node;
}
dmc->timings = of_lpddr3_get_ddr_timings(np_ddr, dmc->dev, dmc->timings = of_lpddr3_get_ddr_timings(np_ddr, dmc->dev,
DDR_TYPE_LPDDR3, DDR_TYPE_LPDDR3,
&dmc->timings_arr_size); &dmc->timings_arr_size);
if (!dmc->timings) { if (!dmc->timings) {
of_node_put(np_ddr);
dev_warn(dmc->dev, "could not get timings from DT\n"); dev_warn(dmc->dev, "could not get timings from DT\n");
return -EINVAL; ret = -EINVAL;
goto put_node;
} }
dmc->min_tck = of_lpddr3_get_min_tck(np_ddr, dmc->dev); dmc->min_tck = of_lpddr3_get_min_tck(np_ddr, dmc->dev);
if (!dmc->min_tck) { if (!dmc->min_tck) {
of_node_put(np_ddr);
dev_warn(dmc->dev, "could not get tck from DT\n"); dev_warn(dmc->dev, "could not get tck from DT\n");
return -EINVAL; ret = -EINVAL;
goto put_node;
} }
/* Sorted array of OPPs with frequency ascending */ /* Sorted array of OPPs with frequency ascending */
...@@ -1227,13 +1233,14 @@ static int of_get_dram_timings(struct exynos5_dmc *dmc) ...@@ -1227,13 +1233,14 @@ static int of_get_dram_timings(struct exynos5_dmc *dmc)
clk_period_ps); clk_period_ps);
} }
of_node_put(np_ddr);
/* Take the highest frequency's timings as 'bypass' */ /* Take the highest frequency's timings as 'bypass' */
dmc->bypass_timing_row = dmc->timing_row[idx - 1]; dmc->bypass_timing_row = dmc->timing_row[idx - 1];
dmc->bypass_timing_data = dmc->timing_data[idx - 1]; dmc->bypass_timing_data = dmc->timing_data[idx - 1];
dmc->bypass_timing_power = dmc->timing_power[idx - 1]; dmc->bypass_timing_power = dmc->timing_power[idx - 1];
put_node:
of_node_put(np_ddr);
return ret; return ret;
} }
......
...@@ -783,6 +783,7 @@ static int brcmstb_pm_probe(struct platform_device *pdev) ...@@ -783,6 +783,7 @@ static int brcmstb_pm_probe(struct platform_device *pdev)
} }
ret = brcmstb_init_sram(dn); ret = brcmstb_init_sram(dn);
of_node_put(dn);
if (ret) { if (ret) {
pr_err("error setting up SRAM for PM\n"); pr_err("error setting up SRAM for PM\n");
return ret; return ret;
......
...@@ -667,7 +667,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mp_media_blk_ctl_domain_data[ ...@@ -667,7 +667,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mp_media_blk_ctl_domain_data[
}, },
[IMX8MP_MEDIABLK_PD_LCDIF_2] = { [IMX8MP_MEDIABLK_PD_LCDIF_2] = {
.name = "mediablk-lcdif-2", .name = "mediablk-lcdif-2",
.clk_names = (const char *[]){ "disp1", "apb", "axi", }, .clk_names = (const char *[]){ "disp2", "apb", "axi", },
.num_clks = 3, .num_clks = 3,
.gpc_name = "lcdif2", .gpc_name = "lcdif2",
.rst_mask = BIT(11) | BIT(12) | BIT(24), .rst_mask = BIT(11) | BIT(12) | BIT(24),
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/types.h> #include <linux/types.h>
#define SCMI_MAX_STR_SIZE 64 #define SCMI_MAX_STR_SIZE 64
#define SCMI_SHORT_NAME_MAX_SIZE 16
#define SCMI_MAX_NUM_RATES 16 #define SCMI_MAX_NUM_RATES 16
/** /**
...@@ -36,8 +37,8 @@ struct scmi_revision_info { ...@@ -36,8 +37,8 @@ struct scmi_revision_info {
u8 num_protocols; u8 num_protocols;
u8 num_agents; u8 num_agents;
u32 impl_ver; u32 impl_ver;
char vendor_id[SCMI_MAX_STR_SIZE]; char vendor_id[SCMI_SHORT_NAME_MAX_SIZE];
char sub_vendor_id[SCMI_MAX_STR_SIZE]; char sub_vendor_id[SCMI_SHORT_NAME_MAX_SIZE];
}; };
struct scmi_clock_info { struct scmi_clock_info {
......
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