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Commit 18064b09 authored by Matthew Wilcox's avatar Matthew Wilcox Committed by James Bottomley
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[PATCH] Kill off sym1 

 - Remove sym1 driver
 - Remove PCI stuff from sym53c8xx_comm.h
 - Remove PCI stuff from ncr53c8xx.c
 - Remove device_t typedef
 - Remove u_int32 and u_int64
 - Remove first_host and the_template
 - Remove SPARC support (get back to me when someone puts a 720 in a Sparc :-P)

 Makefile         |    1
 NCR_Q720.c       |    4
 ncr53c8xx.c      |  155
 ncr53c8xx.h      |   12
 sym53c8xx.c      |14543 -------------------------------------------------------
 sym53c8xx.h      |   82
 sym53c8xx_comm.h |  666 --
 sym53c8xx_defs.h |   52
 zalon.c          |    4
 9 files changed, 76 insertions(+), 15443 deletions(-)
parent 3d8f02bd
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Showing with 76 additions and 900 deletions
drivers/scsi/Makefile
View file @ 18064b09
...@@ -81,7 +81,6 @@ obj-$(CONFIG_SCSI_T128) += t128.o ...@@ -81,7 +81,6 @@ obj-$(CONFIG_SCSI_T128) += t128.o
obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o
obj-$(CONFIG_SCSI_DTC3280) += dtc.o obj-$(CONFIG_SCSI_DTC3280) += dtc.o
obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/ obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/
obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o
obj-$(CONFIG_SCSI_EATA_PIO) += eata_pio.o obj-$(CONFIG_SCSI_EATA_PIO) += eata_pio.o
obj-$(CONFIG_SCSI_7000FASST) += wd7000.o obj-$(CONFIG_SCSI_7000FASST) += wd7000.o
......
drivers/scsi/NCR_Q720.c
View file @ 18064b09
...@@ -79,7 +79,7 @@ static int __init ...@@ -79,7 +79,7 @@ static int __init
NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop, NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop,
int irq, int slot, __u32 paddr, __u32 vaddr) int irq, int slot, __u32 paddr, __u32 vaddr)
{ {
ncr_device device; struct ncr_device device;
__u8 scsi_id; __u8 scsi_id;
static int unit = 0; static int unit = 0;
__u8 scsr1 = readb(vaddr + NCR_Q720_SCSR_OFFSET + 1); __u8 scsr1 = readb(vaddr + NCR_Q720_SCSR_OFFSET + 1);
...@@ -96,7 +96,7 @@ NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop, ...@@ -96,7 +96,7 @@ NCR_Q720_probe_one(struct NCR_Q720_private *p, int siop,
udelay(10); udelay(10);
version = readb(vaddr + 0x18) >> 4; version = readb(vaddr + 0x18) >> 4;
memset(&device, 0, sizeof(ncr_device)); memset(&device, 0, sizeof(struct ncr_device));
/* Initialise ncr_device structure with items required by ncr_attach. */ /* Initialise ncr_device structure with items required by ncr_attach. */
device.chip = q720_chip; device.chip = q720_chip;
device.chip.revision_id = version; device.chip.revision_id = version;
......
drivers/scsi/ncr53c8xx.c
View file @ 18064b09
...@@ -124,7 +124,6 @@ ...@@ -124,7 +124,6 @@
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/signal.h> #include <linux/signal.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
...@@ -242,9 +241,9 @@ const char *ncr53c8xx_info (struct Scsi_Host *host); ...@@ -242,9 +241,9 @@ const char *ncr53c8xx_info (struct Scsi_Host *host);
** Choose appropriate type for tag bitmap. ** Choose appropriate type for tag bitmap.
*/ */
#if MAX_TAGS > 32 #if MAX_TAGS > 32
typedef u_int64 tagmap_t; typedef u64 tagmap_t;
#else #else
typedef u_int32 tagmap_t; typedef u32 tagmap_t;
#endif #endif
/* /*
...@@ -329,17 +328,6 @@ typedef u_int32 tagmap_t; ...@@ -329,17 +328,6 @@ typedef u_int32 tagmap_t;
#define NCR_SNOOP_TIMEOUT (1000000) #define NCR_SNOOP_TIMEOUT (1000000)
/*
** Head of list of NCR boards
**
** For kernel version < 1.3.70, host is retrieved by its irq level.
** For later kernels, the internal host control block address
** (struct ncb) is used as device id parameter of the irq stuff.
*/
static struct Scsi_Host *first_host = NULL;
static Scsi_Host_Template *the_template = NULL;
/* /*
** Other definitions ** Other definitions
*/ */
...@@ -663,8 +651,8 @@ struct lcb { ...@@ -663,8 +651,8 @@ struct lcb {
** 64 possible tags. ** 64 possible tags.
**---------------------------------------------------------------- **----------------------------------------------------------------
*/ */
u_int32 jump_ccb_0; /* Default table if no tags */ u32 jump_ccb_0; /* Default table if no tags */
u_int32 *jump_ccb; /* Virtual address */ u32 *jump_ccb; /* Virtual address */
/*---------------------------------------------------------------- /*----------------------------------------------------------------
** CCB queue management. ** CCB queue management.
...@@ -756,9 +744,9 @@ struct head { ...@@ -756,9 +744,9 @@ struct head {
** The goalpointer points after the last transfer command. ** The goalpointer points after the last transfer command.
**---------------------------------------------------------------- **----------------------------------------------------------------
*/ */
u_int32 savep; u32 savep;
u_int32 lastp; u32 lastp;
u_int32 goalp; u32 goalp;
/*---------------------------------------------------------------- /*----------------------------------------------------------------
** Alternate data pointer. ** Alternate data pointer.
...@@ -766,8 +754,8 @@ struct head { ...@@ -766,8 +754,8 @@ struct head {
** when the direction is unknown and the device claims data out. ** when the direction is unknown and the device claims data out.
**---------------------------------------------------------------- **----------------------------------------------------------------
*/ */
u_int32 wlastp; u32 wlastp;
u_int32 wgoalp; u32 wgoalp;
/*---------------------------------------------------------------- /*----------------------------------------------------------------
** The virtual address of the ccb containing this header. ** The virtual address of the ccb containing this header.
...@@ -965,7 +953,7 @@ struct ccb { ...@@ -965,7 +953,7 @@ struct ccb {
u_char auto_sense; u_char auto_sense;
ccb_p link_ccb; /* Host adapter CCB chain */ ccb_p link_ccb; /* Host adapter CCB chain */
XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */ XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */
u_int32 startp; /* Initial data pointer */ u32 startp; /* Initial data pointer */
u_long magic; /* Free / busy CCB flag */ u_long magic; /* Free / busy CCB flag */
}; };
...@@ -1064,7 +1052,7 @@ struct ncb { ...@@ -1064,7 +1052,7 @@ struct ncb {
** General controller parameters and configuration. ** General controller parameters and configuration.
**---------------------------------------------------------------- **----------------------------------------------------------------
*/ */
device_t dev; struct device *dev;
u_short device_id; /* PCI device id */ u_short device_id; /* PCI device id */
u_char revision_id; /* PCI device revision id */ u_char revision_id; /* PCI device revision id */
u_char bus; /* PCI BUS number */ u_char bus; /* PCI BUS number */
...@@ -1116,7 +1104,7 @@ struct ncb { ...@@ -1116,7 +1104,7 @@ struct ncb {
*/ */
u_char msgout[8]; /* Buffer for MESSAGE OUT */ u_char msgout[8]; /* Buffer for MESSAGE OUT */
u_char msgin [8]; /* Buffer for MESSAGE IN */ u_char msgin [8]; /* Buffer for MESSAGE IN */
u_int32 lastmsg; /* Last SCSI message sent */ u32 lastmsg; /* Last SCSI message sent */
u_char scratch; /* Scratch for SCSI receive */ u_char scratch; /* Scratch for SCSI receive */
/*---------------------------------------------------------------- /*----------------------------------------------------------------
...@@ -3591,7 +3579,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram) ...@@ -3591,7 +3579,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
*/ */
struct Scsi_Host * __init struct Scsi_Host * __init
ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device) ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device)
{ {
struct host_data *host_data; struct host_data *host_data;
ncb_p np = 0; ncb_p np = 0;
...@@ -3616,20 +3604,11 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device) ...@@ -3616,20 +3604,11 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
if(device->differential) if(device->differential)
driver_setup.diff_support = device->differential; driver_setup.diff_support = device->differential;
printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on pci bus %d device %d function %d " printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on bus %d device %d function %d irq %d\n",
#ifdef __sparc__
"irq %s\n",
#else
"irq %d\n",
#endif
device->chip.name, unit, device->chip.revision_id, device->chip.name, unit, device->chip.revision_id,
device->slot.bus, (device->slot.device_fn & 0xf8) >> 3, device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
device->slot.device_fn & 7, device->slot.device_fn & 7,
#ifdef __sparc__
__irq_itoa(device->slot.irq));
#else
device->slot.irq); device->slot.irq);
#endif
/* /*
** Allocate host_data structure ** Allocate host_data structure
...@@ -3842,7 +3821,7 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device) ...@@ -3842,7 +3821,7 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
ncr_chip_reset(np, 100); ncr_chip_reset(np, 100);
/* /*
** Now check the cache handling of the pci chipset. ** Now check the cache handling of the chipset.
*/ */
if (ncr_snooptest (np)) { if (ncr_snooptest (np)) {
...@@ -3909,14 +3888,6 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device) ...@@ -3909,14 +3888,6 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device)
np->order = M_SIMPLE_TAG; np->order = M_SIMPLE_TAG;
#endif #endif
/*
** Done.
*/
if (!the_template) {
the_template = instance->hostt;
first_host = instance;
}
NCR_UNLOCK_NCB(np, flags); NCR_UNLOCK_NCB(np, flags);
return instance; return instance;
...@@ -4263,7 +4234,7 @@ static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd) ...@@ -4263,7 +4234,7 @@ static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
u_char idmsg, *msgptr; u_char idmsg, *msgptr;
u_int msglen; u_int msglen;
int direction; int direction;
u_int32 lastp, goalp; u32 lastp, goalp;
/*--------------------------------------------- /*---------------------------------------------
** **
...@@ -4702,7 +4673,7 @@ static void ncr_start_reset(ncb_p np) ...@@ -4702,7 +4673,7 @@ static void ncr_start_reset(ncb_p np)
static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay) static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
{ {
u_int32 term; u32 term;
int retv = 0; int retv = 0;
np->settle_time = ktime_get(settle_delay * HZ); np->settle_time = ktime_get(settle_delay * HZ);
...@@ -6192,7 +6163,7 @@ static void ncr_timeout (ncb_p np) ...@@ -6192,7 +6163,7 @@ static void ncr_timeout (ncb_p np)
static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat) static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
{ {
u_int32 dsp; u32 dsp;
int script_ofs; int script_ofs;
int script_size; int script_size;
char *script_name; char *script_name;
...@@ -6533,11 +6504,11 @@ static int ncr_int_sbmc (ncb_p np) ...@@ -6533,11 +6504,11 @@ static int ncr_int_sbmc (ncb_p np)
static int ncr_int_par (ncb_p np) static int ncr_int_par (ncb_p np)
{ {
u_char hsts = INB (HS_PRT); u_char hsts = INB (HS_PRT);
u_int32 dbc = INL (nc_dbc); u32 dbc = INL (nc_dbc);
u_char sstat1 = INB (nc_sstat1); u_char sstat1 = INB (nc_sstat1);
int phase = -1; int phase = -1;
int msg = -1; int msg = -1;
u_int32 jmp; u32 jmp;
printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n",
ncr_name(np), hsts, dbc, sstat1); ncr_name(np), hsts, dbc, sstat1);
...@@ -6619,15 +6590,15 @@ static int ncr_int_par (ncb_p np) ...@@ -6619,15 +6590,15 @@ static int ncr_int_par (ncb_p np)
static void ncr_int_ma (ncb_p np) static void ncr_int_ma (ncb_p np)
{ {
u_int32 dbc; u32 dbc;
u_int32 rest; u32 rest;
u_int32 dsp; u32 dsp;
u_int32 dsa; u32 dsa;
u_int32 nxtdsp; u32 nxtdsp;
u_int32 newtmp; u32 newtmp;
u_int32 *vdsp; u32 *vdsp;
u_int32 oadr, olen; u32 oadr, olen;
u_int32 *tblp; u32 *tblp;
ncrcmd *newcmd; ncrcmd *newcmd;
u_char cmd, sbcl; u_char cmd, sbcl;
ccb_p cp; ccb_p cp;
...@@ -6710,12 +6681,12 @@ static void ncr_int_ma (ncb_p np) ...@@ -6710,12 +6681,12 @@ static void ncr_int_ma (ncb_p np)
nxtdsp = 0; nxtdsp = 0;
if (dsp > np->p_script && if (dsp > np->p_script &&
dsp <= np->p_script + sizeof(struct script)) { dsp <= np->p_script + sizeof(struct script)) {
vdsp = (u_int32 *)((char*)np->script0 + (dsp-np->p_script-8)); vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8));
nxtdsp = dsp; nxtdsp = dsp;
} }
else if (dsp > np->p_scripth && else if (dsp > np->p_scripth &&
dsp <= np->p_scripth + sizeof(struct scripth)) { dsp <= np->p_scripth + sizeof(struct scripth)) {
vdsp = (u_int32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8));
nxtdsp = dsp; nxtdsp = dsp;
} }
else if (cp) { else if (cp) {
...@@ -6760,11 +6731,11 @@ static void ncr_int_ma (ncb_p np) ...@@ -6760,11 +6731,11 @@ static void ncr_int_ma (ncb_p np)
oadr = scr_to_cpu(vdsp[1]); oadr = scr_to_cpu(vdsp[1]);
if (cmd & 0x10) { /* Table indirect */ if (cmd & 0x10) { /* Table indirect */
tblp = (u_int32 *) ((char*) &cp->phys + oadr); tblp = (u32 *) ((char*) &cp->phys + oadr);
olen = scr_to_cpu(tblp[0]); olen = scr_to_cpu(tblp[0]);
oadr = scr_to_cpu(tblp[1]); oadr = scr_to_cpu(tblp[1]);
} else { } else {
tblp = (u_int32 *) 0; tblp = (u32 *) 0;
olen = scr_to_cpu(vdsp[0]) & 0xffffff; olen = scr_to_cpu(vdsp[0]) & 0xffffff;
}; };
...@@ -6927,7 +6898,7 @@ static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp) ...@@ -6927,7 +6898,7 @@ static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
ccb_p cp2; ccb_p cp2;
int disc_cnt = 0; int disc_cnt = 0;
int busy_cnt = 0; int busy_cnt = 0;
u_int32 startp; u32 startp;
u_char s_status = INB (SS_PRT); u_char s_status = INB (SS_PRT);
/* /*
...@@ -8191,7 +8162,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd) ...@@ -8191,7 +8162,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
/*========================================================== /*==========================================================
** **
** **
** Test the pci bus snoop logic :-( ** Test the bus snoop logic :-(
** **
** Has to be called with interrupts disabled. ** Has to be called with interrupts disabled.
** **
...@@ -8202,7 +8173,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd) ...@@ -8202,7 +8173,7 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
#ifndef SCSI_NCR_IOMAPPED #ifndef SCSI_NCR_IOMAPPED
static int __init ncr_regtest (struct ncb* np) static int __init ncr_regtest (struct ncb* np)
{ {
register volatile u_int32 data; register volatile u32 data;
/* /*
** ncr registers may NOT be cached. ** ncr registers may NOT be cached.
** write 0xffffffff to a read only register area, ** write 0xffffffff to a read only register area,
...@@ -8226,7 +8197,7 @@ static int __init ncr_regtest (struct ncb* np) ...@@ -8226,7 +8197,7 @@ static int __init ncr_regtest (struct ncb* np)
static int __init ncr_snooptest (struct ncb* np) static int __init ncr_snooptest (struct ncb* np)
{ {
u_int32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
int i, err=0; int i, err=0;
#ifndef SCSI_NCR_IOMAPPED #ifndef SCSI_NCR_IOMAPPED
if (np->reg) { if (np->reg) {
...@@ -9086,18 +9057,9 @@ static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len) ...@@ -9086,18 +9057,9 @@ static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
copy_info(&info, " Chip NCR53C%s, device id 0x%x, " copy_info(&info, " Chip NCR53C%s, device id 0x%x, "
"revision id 0x%x\n", "revision id 0x%x\n",
np->chip_name, np->device_id, np->revision_id); np->chip_name, np->device_id, np->revision_id);
copy_info(&info, " On PCI bus %d, device %d, function %d, " copy_info(&info, " On PCI bus %d, device %d, function %d, IRQ %d\n",
#ifdef __sparc__
"IRQ %s\n",
#else
"IRQ %d\n",
#endif
np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7, np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
#ifdef __sparc__
__irq_itoa(np->irq));
#else
(int) np->irq); (int) np->irq);
#endif
copy_info(&info, " Synchronous period factor %d, " copy_info(&info, " Synchronous period factor %d, "
"max commands per lun %d\n", "max commands per lun %d\n",
(int) np->minsync, MAX_TAGS); (int) np->minsync, MAX_TAGS);
...@@ -9179,47 +9141,6 @@ int __init ncr53c8xx_setup(char *str) ...@@ -9179,47 +9141,6 @@ int __init ncr53c8xx_setup(char *str)
__setup("ncr53c8xx=", ncr53c8xx_setup); __setup("ncr53c8xx=", ncr53c8xx_setup);
#endif #endif
/*===================================================================
**
** SYM53C8XX supported device list
**
**===================================================================
*/
static u_short ncr_chip_ids[] __initdata = {
PSEUDO_720_ID,
PCI_DEVICE_ID_NCR_53C810,
PCI_DEVICE_ID_NCR_53C815,
PCI_DEVICE_ID_NCR_53C820,
PCI_DEVICE_ID_NCR_53C825,
PCI_DEVICE_ID_NCR_53C860,
PCI_DEVICE_ID_NCR_53C875,
PCI_DEVICE_ID_NCR_53C875J,
PCI_DEVICE_ID_NCR_53C885,
PCI_DEVICE_ID_NCR_53C895,
PCI_DEVICE_ID_NCR_53C896,
PCI_DEVICE_ID_NCR_53C895A,
PCI_DEVICE_ID_NCR_53C1510D
};
/*==========================================================
**
** Chip detection entry point.
**
**==========================================================
*/
int __init ncr53c8xx_detect(Scsi_Host_Template *tpnt)
{
#if defined(SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT) && defined(MODULE)
if (ncr53c8xx)
ncr53c8xx_setup(ncr53c8xx);
#endif
return sym53c8xx__detect(tpnt, ncr_chip_ids,
sizeof(ncr_chip_ids)/sizeof(ncr_chip_ids[0]));
}
/*========================================================== /*==========================================================
** **
** Entry point for info() function ** Entry point for info() function
......
drivers/scsi/ncr53c8xx.h
View file @ 18064b09
...@@ -42,12 +42,6 @@ ...@@ -42,12 +42,6 @@
#ifndef NCR53C8XX_H #ifndef NCR53C8XX_H
#define NCR53C8XX_H #define NCR53C8XX_H
/*
** Define the BSD style u_int32 and u_int64 type.
** Are in fact u_int32_t and u_int64_t :-)
*/
typedef u32 u_int32;
typedef u64 u_int64;
typedef u_long vm_offset_t; typedef u_long vm_offset_t;
#include "sym53c8xx_defs.h" #include "sym53c8xx_defs.h"
...@@ -100,7 +94,7 @@ typedef struct { ...@@ -100,7 +94,7 @@ typedef struct {
** **
**========================================================== **==========================================================
*/ */
typedef struct { struct ncr_device {
struct device *dev; struct device *dev;
ncr_slot slot; ncr_slot slot;
ncr_chip chip; ncr_chip chip;
...@@ -111,9 +105,9 @@ typedef struct { ...@@ -111,9 +105,9 @@ typedef struct {
#endif #endif
__u8 differential; __u8 differential;
int attach_done; int attach_done;
} ncr_device; };
extern struct Scsi_Host *ncr_attach (Scsi_Host_Template *tpnt, int unit, ncr_device *device); extern struct Scsi_Host *ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device);
extern int ncr53c8xx_release(struct Scsi_Host *host); extern int ncr53c8xx_release(struct Scsi_Host *host);
irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs); irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
......
drivers/scsi/sym53c8xx.h deleted 100644 → 0
View file @ 3d8f02bd
/******************************************************************************
** High Performance device driver for the Symbios 53C896 controller.
**
** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
**
** This driver also supports all the Symbios 53C8XX controller family,
** except 53C810 revisions < 16, 53C825 revisions < 16 and all
** revisions of 53C815 controllers.
**
** This driver is based on the Linux port of the FreeBSD ncr driver.
**
** Copyright (C) 1994 Wolfgang Stanglmeier
**
**-----------------------------------------------------------------------------
**
** This program is free software; you can redistribute it and/or modify
** it under the terms of the GNU General Public License as published by
** the Free Software Foundation; either version 2 of the License, or
** (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
**
**-----------------------------------------------------------------------------
**
** The Linux port of the FreeBSD ncr driver has been achieved in
** november 1995 by:
**
** Gerard Roudier <groudier@free.fr>
**
** Being given that this driver originates from the FreeBSD version, and
** in order to keep synergy on both, any suggested enhancements and corrections
** received on Linux are automatically a potential candidate for the FreeBSD
** version.
**
** The original driver has been written for 386bsd and FreeBSD by
** Wolfgang Stanglmeier <wolf@cologne.de>
** Stefan Esser <se@mi.Uni-Koeln.de>
**
**-----------------------------------------------------------------------------
**
** Major contributions:
** --------------------
**
** NVRAM detection and reading.
** Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
**
*******************************************************************************
*/
#ifndef SYM53C8XX_H
#define SYM53C8XX_H
#include "sym53c8xx_defs.h"
/*
** Define Scsi_Host_Template parameters
**
** Used by hosts.c and sym53c8xx.c with module configuration.
*/
#if (LINUX_VERSION_CODE >= 0x020400) || defined(HOSTS_C) || defined(MODULE)
#include <scsi/scsicam.h>
int sym53c8xx_abort(Scsi_Cmnd *);
int sym53c8xx_detect(Scsi_Host_Template *tpnt);
const char *sym53c8xx_info(struct Scsi_Host *host);
int sym53c8xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
int sym53c8xx_reset(Scsi_Cmnd *, unsigned int);
int sym53c8xx_slave_configure(Scsi_Device *);
int sym53c8xx_release(struct Scsi_Host *);
#endif /* defined(HOSTS_C) || defined(MODULE) */
#endif /* SYM53C8XX_H */
drivers/scsi/sym53c8xx_comm.h
View file @ 18064b09
...@@ -246,56 +246,6 @@ static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head) ...@@ -246,56 +246,6 @@ static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head)
return elem; return elem;
} }
/*==========================================================
**
** Simple Wrapper to kernel PCI bus interface.
**
** This wrapper allows to get rid of old kernel PCI
** interface and still allows to preserve linux-2.0
** compatibilty. In fact, it is mostly an incomplete
** emulation of the new PCI code for pre-2.2 kernels.
** When kernel-2.0 support will be dropped, we will
** just have to remove most of this code.
**
**==========================================================
*/
typedef struct pci_dev *pcidev_t;
typedef struct device *device_t;
#define PCIDEV_NULL (0)
#define PciBusNumber(d) (d)->bus->number
#define PciDeviceFn(d) (d)->devfn
#define PciVendorId(d) (d)->vendor
#define PciDeviceId(d) (d)->device
#define PciIrqLine(d) (d)->irq
static u_long __init
pci_get_base_cookie(struct pci_dev *pdev, int index)
{
u_long base = pdev->resource[index].start;
return (base & ~0x7ul);
}
static int __init
pci_get_base_address(struct pci_dev *pdev, int index, u_long *base)
{
u32 tmp;
#define PCI_BAR_OFFSET(index) (PCI_BASE_ADDRESS_0 + (index<<2))
pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
*base = tmp;
++index;
if ((tmp & 0x7) == 0x4) {
#if BITS_PER_LONG > 32
pci_read_config_dword(pdev, PCI_BAR_OFFSET(index), &tmp);
*base |= (((u_long)tmp) << 32);
#endif
++index;
}
return index;
#undef PCI_BAR_OFFSET
}
/*========================================================== /*==========================================================
** **
...@@ -589,24 +539,6 @@ static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep}; ...@@ -589,24 +539,6 @@ static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
#endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */ #endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
static void *m_calloc(int size, char *name)
{
u_long flags;
void *m;
NCR_LOCK_DRIVER(flags);
m = __m_calloc(&mp0, size, name);
NCR_UNLOCK_DRIVER(flags);
return m;
}
static void m_free(void *ptr, int size, char *name)
{
u_long flags;
NCR_LOCK_DRIVER(flags);
__m_free(&mp0, ptr, size, name);
NCR_UNLOCK_DRIVER(flags);
}
/* /*
* DMAable pools. * DMAable pools.
*/ */
...@@ -788,7 +720,7 @@ static m_addr_t __vtobus(m_bush_t bush, void *m) ...@@ -788,7 +720,7 @@ static m_addr_t __vtobus(m_bush_t bush, void *m)
#define __data_mapped SCp.phase #define __data_mapped SCp.phase
#define __data_mapping SCp.have_data_in #define __data_mapping SCp.have_data_in
static void __unmap_scsi_data(device_t dev, Scsi_Cmnd *cmd) static void __unmap_scsi_data(struct device *dev, Scsi_Cmnd *cmd)
{ {
enum dma_data_direction dma_dir = enum dma_data_direction dma_dir =
(enum dma_data_direction)scsi_to_pci_dma_dir(cmd->sc_data_direction); (enum dma_data_direction)scsi_to_pci_dma_dir(cmd->sc_data_direction);
...@@ -805,7 +737,7 @@ static void __unmap_scsi_data(device_t dev, Scsi_Cmnd *cmd) ...@@ -805,7 +737,7 @@ static void __unmap_scsi_data(device_t dev, Scsi_Cmnd *cmd)
cmd->__data_mapped = 0; cmd->__data_mapped = 0;
} }
static u_long __map_scsi_single_data(device_t dev, Scsi_Cmnd *cmd) static u_long __map_scsi_single_data(struct device *dev, Scsi_Cmnd *cmd)
{ {
dma_addr_t mapping; dma_addr_t mapping;
enum dma_data_direction dma_dir = enum dma_data_direction dma_dir =
...@@ -823,7 +755,7 @@ static u_long __map_scsi_single_data(device_t dev, Scsi_Cmnd *cmd) ...@@ -823,7 +755,7 @@ static u_long __map_scsi_single_data(device_t dev, Scsi_Cmnd *cmd)
return mapping; return mapping;
} }
static int __map_scsi_sg_data(device_t dev, Scsi_Cmnd *cmd) static int __map_scsi_sg_data(struct device *dev, Scsi_Cmnd *cmd)
{ {
int use_sg; int use_sg;
enum dma_data_direction dma_dir = enum dma_data_direction dma_dir =
...@@ -839,7 +771,7 @@ static int __map_scsi_sg_data(device_t dev, Scsi_Cmnd *cmd) ...@@ -839,7 +771,7 @@ static int __map_scsi_sg_data(device_t dev, Scsi_Cmnd *cmd)
return use_sg; return use_sg;
} }
static void __sync_scsi_data(device_t dev, Scsi_Cmnd *cmd) static void __sync_scsi_data(struct device *dev, Scsi_Cmnd *cmd)
{ {
enum dma_data_direction dma_dir = enum dma_data_direction dma_dir =
(enum dma_data_direction)scsi_to_pci_dma_dir(cmd->sc_data_direction); (enum dma_data_direction)scsi_to_pci_dma_dir(cmd->sc_data_direction);
...@@ -1402,7 +1334,7 @@ sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram) ...@@ -1402,7 +1334,7 @@ sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
**=================================================================== **===================================================================
*/ */
#ifdef SCSI_NCR_NVRAM_SUPPORT #ifdef SCSI_NCR_NVRAM_SUPPORT
static void __init ncr_get_nvram(ncr_device *devp, ncr_nvram *nvp) static void __init ncr_get_nvram(struct ncr_device *devp, ncr_nvram *nvp)
{ {
devp->nvram = nvp; devp->nvram = nvp;
if (!nvp) if (!nvp)
...@@ -1848,591 +1780,3 @@ static int device_queue_depth(int unit, int target, int lun) ...@@ -1848,591 +1780,3 @@ static int device_queue_depth(int unit, int target, int lun)
} }
return DEF_DEPTH; return DEF_DEPTH;
} }
/*===================================================================
**
** Print out information about driver configuration.
**
**===================================================================
*/
static void __init ncr_print_driver_setup(void)
{
#define YesNo(y) y ? 'y' : 'n'
printk (NAME53C8XX ": setup=disc:%c,specf:%d,tags:%d,sync:%d,"
"burst:%d,wide:%c,diff:%d,revprob:%c,buschk:0x%x\n",
YesNo(driver_setup.disconnection),
driver_setup.special_features,
driver_setup.default_tags,
driver_setup.default_sync,
driver_setup.burst_max,
YesNo(driver_setup.max_wide),
driver_setup.diff_support,
YesNo(driver_setup.reverse_probe),
driver_setup.bus_check);
printk (NAME53C8XX ": setup=mpar:%c,spar:%c,fsn=%c,verb:%d,debug:0x%x,"
"led:%c,settle:%d,irqm:0x%x,nvram:0x%x,pcifix:0x%x\n",
YesNo(driver_setup.master_parity),
YesNo(driver_setup.scsi_parity),
YesNo(driver_setup.force_sync_nego),
driver_setup.verbose,
driver_setup.debug,
YesNo(driver_setup.led_pin),
driver_setup.settle_delay,
driver_setup.irqm,
driver_setup.use_nvram,
driver_setup.pci_fix_up);
#undef YesNo
}
/*===================================================================
**
** SYM53C8XX devices description table.
**
**===================================================================
*/
static ncr_chip ncr_chip_table[] __initdata = SCSI_NCR_CHIP_TABLE;
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
/*===================================================================
**
** Detect all NCR PQS/PDS boards and keep track of their bus nr.
**
** The NCR PQS or PDS card is constructed as a DEC bridge
** behind which sit a proprietary NCR memory controller and
** four or two 53c875s as separate devices. In its usual mode
** of operation, the 875s are slaved to the memory controller
** for all transfers. We can tell if an 875 is part of a
** PQS/PDS or not since if it is, it will be on the same bus
** as the memory controller. To operate with the Linux
** driver, the memory controller is disabled and the 875s
** freed to function independently. The only wrinkle is that
** the preset SCSI ID (which may be zero) must be read in from
** a special configuration space register of the 875.
**
**===================================================================
*/
#define SCSI_NCR_MAX_PQS_BUS 16
static int pqs_bus[SCSI_NCR_MAX_PQS_BUS] __initdata = { 0 };
static void __init ncr_detect_pqs_pds(void)
{
short index;
pcidev_t dev = PCIDEV_NULL;
for(index=0; index < SCSI_NCR_MAX_PQS_BUS; index++) {
u_char tmp;
dev = pci_find_device(0x101a, 0x0009, dev);
if (dev == PCIDEV_NULL) {
pqs_bus[index] = -1;
break;
}
printk(KERN_INFO NAME53C8XX ": NCR PQS/PDS memory controller detected on bus %d\n", PciBusNumber(dev));
pci_read_config_byte(dev, 0x44, &tmp);
/* bit 1: allow individual 875 configuration */
tmp |= 0x2;
pci_write_config_byte(dev, 0x44, tmp);
pci_read_config_byte(dev, 0x45, &tmp);
/* bit 2: drive individual 875 interrupts to the bus */
tmp |= 0x4;
pci_write_config_byte(dev, 0x45, tmp);
pqs_bus[index] = PciBusNumber(dev);
}
}
#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
/*===================================================================
**
** Read and check the PCI configuration for any detected NCR
** boards and save data for attaching after all boards have
** been detected.
**
**===================================================================
*/
static int __init
sym53c8xx_pci_init(Scsi_Host_Template *tpnt, pcidev_t pdev, ncr_device *device)
{
u_short vendor_id, device_id, command;
u_char cache_line_size, latency_timer;
u_char suggested_cache_line_size = 0;
u_char pci_fix_up = driver_setup.pci_fix_up;
u_char revision;
u_int irq;
u_long base, base_c, base_2, base_2_c, io_port;
int i;
ncr_chip *chip;
printk(KERN_INFO NAME53C8XX ": at PCI bus %d, device %d, function %d\n",
PciBusNumber(pdev),
(int) (PciDeviceFn(pdev) & 0xf8) >> 3,
(int) (PciDeviceFn(pdev) & 7));
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
if (!pci_dma_supported(pdev, 0xffffffff)) {
printk(KERN_WARNING NAME53C8XX
"32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
return -1;
}
#endif
/*
** Read info from the PCI config space.
** pci_read_config_xxx() functions are assumed to be used for
** successfully detected PCI devices.
*/
vendor_id = PciVendorId(pdev);
device_id = PciDeviceId(pdev);
irq = PciIrqLine(pdev);
i = pci_get_base_address(pdev, 0, &io_port);
io_port = pci_get_base_cookie(pdev, 0);
base_c = pci_get_base_cookie(pdev, i);
i = pci_get_base_address(pdev, i, &base);
base_2_c = pci_get_base_cookie(pdev, i);
(void) pci_get_base_address(pdev, i, &base_2);
pci_read_config_word(pdev, PCI_COMMAND, &command);
pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
/*
** Match the BUS number for PQS/PDS devices.
** Read the SCSI ID from a special register mapped
** into the configuration space of the individual
** 875s. This register is set up by the PQS bios
*/
for(i = 0; i < SCSI_NCR_MAX_PQS_BUS && pqs_bus[i] != -1; i++) {
u_char tmp;
if (pqs_bus[i] == PciBusNumber(pdev)) {
pci_read_config_byte(pdev, 0x84, &tmp);
device->pqs_pds = 1;
device->host_id = tmp;
break;
}
}
#endif /* SCSI_NCR_PQS_PDS_SUPPORT */
/*
** If user excludes this chip, donnot initialize it.
*/
for (i = 0 ; i < SCSI_NCR_MAX_EXCLUDES ; i++) {
if (driver_setup.excludes[i] ==
(io_port & PCI_BASE_ADDRESS_IO_MASK))
return -1;
}
/*
** Check if the chip is supported
*/
if ((device_id == PCI_DEVICE_ID_LSI_53C1010) ||
(device_id == PCI_DEVICE_ID_LSI_53C1010_66)){
printk(NAME53C8XX ": not initializing, device not supported\n");
return -1;
}
chip = 0;
for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
if (device_id != ncr_chip_table[i].device_id)
continue;
if (revision > ncr_chip_table[i].revision_id)
continue;
chip = &device->chip;
memcpy(chip, &ncr_chip_table[i], sizeof(*chip));
chip->revision_id = revision;
break;
}
/*
** Ignore Symbios chips controlled by SISL RAID controller.
** This controller sets value 0x52414944 at RAM end - 16.
*/
#if defined(__i386__) && !defined(SCSI_NCR_PCI_MEM_NOT_SUPPORTED)
if (chip && (base_2_c & PCI_BASE_ADDRESS_MEM_MASK)) {
unsigned int ram_size, ram_val;
u_long ram_ptr;
if (chip->features & FE_RAM8K)
ram_size = 8192;
else
ram_size = 4096;
ram_ptr = remap_pci_mem(base_2_c & PCI_BASE_ADDRESS_MEM_MASK,
ram_size);
if (ram_ptr) {
ram_val = readl_raw(ram_ptr + ram_size - 16);
unmap_pci_mem(ram_ptr, ram_size);
if (ram_val == 0x52414944) {
printk(NAME53C8XX": not initializing, "
"driven by SISL RAID controller.\n");
return -1;
}
}
}
#endif /* i386 and PCI MEMORY accessible */
if (!chip) {
printk(NAME53C8XX ": not initializing, device not supported\n");
return -1;
}
#ifdef __powerpc__
/*
** Fix-up for power/pc.
** Should not be performed by the driver.
*/
if ((command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
!= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
printk(NAME53C8XX ": setting%s%s...\n",
(command & PCI_COMMAND_IO) ? "" : " PCI_COMMAND_IO",
(command & PCI_COMMAND_MEMORY) ? "" : " PCI_COMMAND_MEMORY");
command |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
pci_write_config_word(pdev, PCI_COMMAND, command);
}
#endif /* __powerpc__ */
#if defined(__i386__) && !defined(MODULE)
if (!cache_line_size) {
switch(boot_cpu_data.x86) {
case 4: suggested_cache_line_size = 4; break;
case 6:
case 5: suggested_cache_line_size = 8; break;
}
}
#endif /* __i386__ */
/*
** Check availability of IO space, memory space.
** Enable master capability if not yet.
**
** We shouldn't have to care about the IO region when
** we are using MMIO. But calling check_region() from
** both the ncr53c8xx and the sym53c8xx drivers prevents
** from attaching devices from the both drivers.
** If you have a better idea, let me know.
*/
/* #ifdef SCSI_NCR_IOMAPPED */
#if 1
if (!(command & PCI_COMMAND_IO)) {
printk(NAME53C8XX ": I/O base address (0x%lx) disabled.\n",
(long) io_port);
io_port = 0;
}
#endif
if (!(command & PCI_COMMAND_MEMORY)) {
printk(NAME53C8XX ": PCI_COMMAND_MEMORY not set.\n");
base = 0;
base_2 = 0;
}
io_port &= PCI_BASE_ADDRESS_IO_MASK;
base &= PCI_BASE_ADDRESS_MEM_MASK;
base_2 &= PCI_BASE_ADDRESS_MEM_MASK;
/* #ifdef SCSI_NCR_IOMAPPED */
#if 1
if (io_port && check_region (io_port, 128)) {
printk(NAME53C8XX ": IO region 0x%lx[0..127] is in use\n",
(long) io_port);
io_port = 0;
}
if (!io_port)
return -1;
#endif
#ifndef SCSI_NCR_IOMAPPED
if (!base) {
printk(NAME53C8XX ": MMIO base address disabled.\n");
return -1;
}
#endif
/* The ncr53c8xx driver never did set the PCI parity bit. */
/* Since setting this bit is known to trigger spurious MDPE */
/* errors on some 895 controllers when noise on power lines is */
/* too high, I donnot want to change previous ncr53c8xx driver */
/* behaviour on that point (the sym53c8xx driver set this bit). */
#if 0
/*
** Set MASTER capable and PARITY bit, if not yet.
*/
if ((command & (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY))
!= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY)) {
printk(NAME53C8XX ": setting%s%s...(fix-up)\n",
(command & PCI_COMMAND_MASTER) ? "" : " PCI_COMMAND_MASTER",
(command & PCI_COMMAND_PARITY) ? "" : " PCI_COMMAND_PARITY");
command |= (PCI_COMMAND_MASTER | PCI_COMMAND_PARITY);
pci_write_config_word(pdev, PCI_COMMAND, command);
}
#else
/*
** Set MASTER capable if not yet.
*/
if ((command & PCI_COMMAND_MASTER) != PCI_COMMAND_MASTER) {
printk(NAME53C8XX ": setting PCI_COMMAND_MASTER...(fix-up)\n");
command |= PCI_COMMAND_MASTER;
pci_write_config_word(pdev, PCI_COMMAND, command);
}
#endif
/*
** Fix some features according to driver setup.
*/
if (!(driver_setup.special_features & 1))
chip->features &= ~FE_SPECIAL_SET;
else {
if (driver_setup.special_features & 2)
chip->features &= ~FE_WRIE;
if (driver_setup.special_features & 4)
chip->features &= ~FE_NOPM;
}
/*
** Some features are required to be enabled in order to
** work around some chip problems. :) ;)
** (ITEM 12 of a DEL about the 896 I haven't yet).
** We must ensure the chip will use WRITE AND INVALIDATE.
** The revision number limit is for now arbitrary.
*/
if (device_id == PCI_DEVICE_ID_NCR_53C896 && revision <= 0x10) {
chip->features |= (FE_WRIE | FE_CLSE);
pci_fix_up |= 3; /* Force appropriate PCI fix-up */
}
#ifdef SCSI_NCR_PCI_FIX_UP_SUPPORT
/*
** Try to fix up PCI config according to wished features.
*/
if ((pci_fix_up & 1) && (chip->features & FE_CLSE) &&
!cache_line_size && suggested_cache_line_size) {
cache_line_size = suggested_cache_line_size;
pci_write_config_byte(pdev,
PCI_CACHE_LINE_SIZE, cache_line_size);
printk(NAME53C8XX ": PCI_CACHE_LINE_SIZE set to %d (fix-up).\n",
cache_line_size);
}
if ((pci_fix_up & 2) && cache_line_size &&
(chip->features & FE_WRIE) && !(command & PCI_COMMAND_INVALIDATE)) {
printk(NAME53C8XX": setting PCI_COMMAND_INVALIDATE (fix-up)\n");
command |= PCI_COMMAND_INVALIDATE;
pci_write_config_word(pdev, PCI_COMMAND, command);
}
/*
** Tune PCI LATENCY TIMER according to burst max length transfer.
** (latency timer >= burst length + 6, we add 10 to be quite sure)
*/
if (chip->burst_max && (latency_timer == 0 || (pci_fix_up & 4))) {
u_char lt = (1 << chip->burst_max) + 6 + 10;
if (latency_timer < lt) {
printk(NAME53C8XX
": changing PCI_LATENCY_TIMER from %d to %d.\n",
(int) latency_timer, (int) lt);
latency_timer = lt;
pci_write_config_byte(pdev,
PCI_LATENCY_TIMER, latency_timer);
}
}
#endif /* SCSI_NCR_PCI_FIX_UP_SUPPORT */
/*
** Initialise ncr_device structure with items required by ncr_attach.
*/
device->dev = &pdev->dev;
device->slot.bus = PciBusNumber(pdev);
device->slot.device_fn = PciDeviceFn(pdev);
device->slot.base = base;
device->slot.base_2 = base_2;
device->slot.base_c = base_c;
device->slot.base_2_c = base_2_c;
device->slot.io_port = io_port;
device->slot.irq = irq;
device->attach_done = 0;
return 0;
}
/*===================================================================
**
** Detect all 53c8xx hosts and then attach them.
**
** If we are using NVRAM, once all hosts are detected, we need to
** check any NVRAM for boot order in case detect and boot order
** differ and attach them using the order in the NVRAM.
**
** If no NVRAM is found or data appears invalid attach boards in
** the order they are detected.
**
**===================================================================
*/
static int __init
sym53c8xx__detect(Scsi_Host_Template *tpnt, u_short ncr_chip_ids[], int chips)
{
pcidev_t pcidev;
int i, j, hosts, count;
int attach_count = 0;
ncr_device *devtbl, *devp;
#ifdef SCSI_NCR_NVRAM_SUPPORT
ncr_nvram nvram0, nvram, *nvp;
#endif
#ifdef SCSI_NCR_DEBUG_INFO_SUPPORT
ncr_debug = driver_setup.debug;
#endif
if (initverbose >= 2)
ncr_print_driver_setup();
/*
** Allocate the device table since we donnot want to
** overflow the kernel stack.
** 1 x 4K PAGE is enough for more than 40 devices for i386.
*/
devtbl = m_calloc(PAGE_SIZE, "devtbl");
if (!devtbl)
return 0;
/*
** Detect all NCR PQS/PDS memory controllers.
*/
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
ncr_detect_pqs_pds();
#endif
/*
** Detect all 53c8xx hosts.
** Save the first Symbios NVRAM content if any
** for the boot order.
*/
hosts = PAGE_SIZE / sizeof(*devtbl);
#ifdef SCSI_NCR_NVRAM_SUPPORT
nvp = (driver_setup.use_nvram & 0x1) ? &nvram0 : 0;
#endif
j = 0;
count = 0;
pcidev = PCIDEV_NULL;
while (1) {
char *msg = "";
if (count >= hosts)
break;
if (j >= chips)
break;
i = driver_setup.reverse_probe ? chips - 1 - j : j;
pcidev = pci_find_device(PCI_VENDOR_ID_NCR, ncr_chip_ids[i],
pcidev);
if (pcidev == PCIDEV_NULL) {
++j;
continue;
}
if (pci_enable_device(pcidev)) /* @!*!$&*!%-*#;! */
continue;
/* Some HW as the HP LH4 may report twice PCI devices */
for (i = 0; i < count ; i++) {
if (devtbl[i].slot.bus == PciBusNumber(pcidev) &&
devtbl[i].slot.device_fn == PciDeviceFn(pcidev))
break;
}
if (i != count) /* Ignore this device if we already have it */
continue;
devp = &devtbl[count];
devp->host_id = driver_setup.host_id;
devp->attach_done = 0;
if (sym53c8xx_pci_init(tpnt, pcidev, devp)) {
continue;
}
++count;
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvp) {
ncr_get_nvram(devp, nvp);
switch(nvp->type) {
case SCSI_NCR_SYMBIOS_NVRAM:
/*
* Switch to the other nvram buffer, so that
* nvram0 will contain the first Symbios
* format NVRAM content with boot order.
*/
nvp = &nvram;
msg = "with Symbios NVRAM";
break;
case SCSI_NCR_TEKRAM_NVRAM:
msg = "with Tekram NVRAM";
break;
}
}
#endif
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
if (devp->pqs_pds)
msg = "(NCR PQS/PDS)";
#endif
printk(KERN_INFO NAME53C8XX ": 53c%s detected %s\n",
devp->chip.name, msg);
}
/*
** If we have found a SYMBIOS NVRAM, use first the NVRAM boot
** sequence as device boot order.
** check devices in the boot record against devices detected.
** attach devices if we find a match. boot table records that
** do not match any detected devices will be ignored.
** devices that do not match any boot table will not be attached
** here but will attempt to be attached during the device table
** rescan.
*/
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (!nvp || nvram0.type != SCSI_NCR_SYMBIOS_NVRAM)
goto next;
for (i = 0; i < 4; i++) {
Symbios_host *h = &nvram0.data.Symbios.host[i];
for (j = 0 ; j < count ; j++) {
devp = &devtbl[j];
if (h->device_fn != devp->slot.device_fn ||
h->bus_nr != devp->slot.bus ||
h->device_id != devp->chip.device_id)
continue;
if (devp->attach_done)
continue;
if (h->flags & SYMBIOS_INIT_SCAN_AT_BOOT) {
ncr_get_nvram(devp, nvp);
if (!ncr_attach (tpnt, attach_count, devp))
attach_count++;
}
#if 0 /* Restore previous behaviour of ncr53c8xx driver */
else if (!(driver_setup.use_nvram & 0x80))
printk(KERN_INFO NAME53C8XX
": 53c%s state OFF thus not attached\n",
devp->chip.name);
#endif
else
continue;
devp->attach_done = 1;
break;
}
}
next:
#endif
/*
** Rescan device list to make sure all boards attached.
** Devices without boot records will not be attached yet
** so try to attach them here.
*/
for (i= 0; i < count; i++) {
devp = &devtbl[i];
if (!devp->attach_done) {
#ifdef SCSI_NCR_NVRAM_SUPPORT
ncr_get_nvram(devp, nvp);
#endif
if (!ncr_attach (tpnt, attach_count, devp))
attach_count++;
}
}
m_free(devtbl, PAGE_SIZE, "devtbl");
return attach_count;
}
drivers/scsi/sym53c8xx_defs.h
View file @ 18064b09
...@@ -951,7 +951,7 @@ struct Symbios_nvram { ...@@ -951,7 +951,7 @@ struct Symbios_nvram {
/* Controller set up 20 bytes */ /* Controller set up 20 bytes */
u_char v_major; /* 0x00 */ u_char v_major; /* 0x00 */
u_char v_minor; /* 0x30 */ u_char v_minor; /* 0x30 */
u_int32 boot_crc; u32 boot_crc;
u_short flags; u_short flags;
#define SYMBIOS_SCAM_ENABLE (1) #define SYMBIOS_SCAM_ENABLE (1)
#define SYMBIOS_PARITY_ENABLE (1<<1) #define SYMBIOS_PARITY_ENABLE (1<<1)
...@@ -1187,7 +1187,7 @@ struct ncr_reg { ...@@ -1187,7 +1187,7 @@ struct ncr_reg {
#define WRIE 0x01 /* mod: write and invalidate enable */ #define WRIE 0x01 /* mod: write and invalidate enable */
/* bits 4-7 rsvd for C1010 */ /* bits 4-7 rsvd for C1010 */
/*1c*/ u_int32 nc_temp; /* ### Temporary stack */ /*1c*/ u32 nc_temp; /* ### Temporary stack */
/*20*/ u_char nc_dfifo; /*20*/ u_char nc_dfifo;
/*21*/ u_char nc_ctest4; /*21*/ u_char nc_ctest4;
...@@ -1200,10 +1200,10 @@ struct ncr_reg { ...@@ -1200,10 +1200,10 @@ struct ncr_reg {
/* bits 0-1, 3-7 rsvd for C1010 */ /* bits 0-1, 3-7 rsvd for C1010 */
/*23*/ u_char nc_ctest6; /*23*/ u_char nc_ctest6;
/*24*/ u_int32 nc_dbc; /* ### Byte count and command */ /*24*/ u32 nc_dbc; /* ### Byte count and command */
/*28*/ u_int32 nc_dnad; /* ### Next command register */ /*28*/ u32 nc_dnad; /* ### Next command register */
/*2c*/ u_int32 nc_dsp; /* --> Script Pointer */ /*2c*/ u32 nc_dsp; /* --> Script Pointer */
/*30*/ u_int32 nc_dsps; /* --> Script pointer save/opcode#2 */ /*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
/*34*/ u_char nc_scratcha; /* Temporary register a */ /*34*/ u_char nc_scratcha; /* Temporary register a */
/*35*/ u_char nc_scratcha1; /*35*/ u_char nc_scratcha1;
...@@ -1232,7 +1232,7 @@ struct ncr_reg { ...@@ -1232,7 +1232,7 @@ struct ncr_reg {
#define NOCOM 0x01 /* cmd: protect sfbr while reselect */ #define NOCOM 0x01 /* cmd: protect sfbr while reselect */
/* bits 0-1 rsvd for C1010 */ /* bits 0-1 rsvd for C1010 */
/*3c*/ u_int32 nc_adder; /*3c*/ u32 nc_adder;
/*40*/ u_short nc_sien; /* -->: interrupt enable */ /*40*/ u_short nc_sien; /* -->: interrupt enable */
/*42*/ u_short nc_sist; /* <--: interrupt status */ /*42*/ u_short nc_sist; /* <--: interrupt status */
...@@ -1311,13 +1311,13 @@ struct ncr_reg { ...@@ -1311,13 +1311,13 @@ struct ncr_reg {
/*5f*/ u_char nc_scr3; /* */ /*5f*/ u_char nc_scr3; /* */
/*60*/ u_char nc_scrx[64]; /* Working register C-R */ /*60*/ u_char nc_scrx[64]; /* Working register C-R */
/*a0*/ u_int32 nc_mmrs; /* Memory Move Read Selector */ /*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
/*a4*/ u_int32 nc_mmws; /* Memory Move Write Selector */ /*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
/*a8*/ u_int32 nc_sfs; /* Script Fetch Selector */ /*a8*/ u32 nc_sfs; /* Script Fetch Selector */
/*ac*/ u_int32 nc_drs; /* DSA Relative Selector */ /*ac*/ u32 nc_drs; /* DSA Relative Selector */
/*b0*/ u_int32 nc_sbms; /* Static Block Move Selector */ /*b0*/ u32 nc_sbms; /* Static Block Move Selector */
/*b4*/ u_int32 nc_dbms; /* Dynamic Block Move Selector */ /*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
/*b8*/ u_int32 nc_dnad64; /* DMA Next Address 64 */ /*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
/*bc*/ u_short nc_scntl4; /* C1010 only */ /*bc*/ u_short nc_scntl4; /* C1010 only */
#define U3EN 0x80 /* Enable Ultra 3 */ #define U3EN 0x80 /* Enable Ultra 3 */
#define AIPEN 0x40 /* Allow check upper byte lanes */ #define AIPEN 0x40 /* Allow check upper byte lanes */
...@@ -1329,8 +1329,8 @@ struct ncr_reg { ...@@ -1329,8 +1329,8 @@ struct ncr_reg {
/*be*/ u_char nc_aipcntl0; /* Epat Control 1 C1010 only */ /*be*/ u_char nc_aipcntl0; /* Epat Control 1 C1010 only */
/*bf*/ u_char nc_aipcntl1; /* AIP Control C1010_66 Only */ /*bf*/ u_char nc_aipcntl1; /* AIP Control C1010_66 Only */
/*c0*/ u_int32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */ /*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
/*c4*/ u_int32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */ /*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
/*c8*/ u_char nc_rbc; /* Remaining Byte Count */ /*c8*/ u_char nc_rbc; /* Remaining Byte Count */
/*c9*/ u_char nc_rbc1; /* */ /*c9*/ u_char nc_rbc1; /* */
/*ca*/ u_char nc_rbc2; /* */ /*ca*/ u_char nc_rbc2; /* */
...@@ -1340,22 +1340,22 @@ struct ncr_reg { ...@@ -1340,22 +1340,22 @@ struct ncr_reg {
/*cd*/ u_char nc_ua1; /* */ /*cd*/ u_char nc_ua1; /* */
/*ce*/ u_char nc_ua2; /* */ /*ce*/ u_char nc_ua2; /* */
/*cf*/ u_char nc_ua3; /* */ /*cf*/ u_char nc_ua3; /* */
/*d0*/ u_int32 nc_esa; /* Entry Storage Address */ /*d0*/ u32 nc_esa; /* Entry Storage Address */
/*d4*/ u_char nc_ia; /* Instruction Address */ /*d4*/ u_char nc_ia; /* Instruction Address */
/*d5*/ u_char nc_ia1; /*d5*/ u_char nc_ia1;
/*d6*/ u_char nc_ia2; /*d6*/ u_char nc_ia2;
/*d7*/ u_char nc_ia3; /*d7*/ u_char nc_ia3;
/*d8*/ u_int32 nc_sbc; /* SCSI Byte Count (3 bytes only) */ /*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
/*dc*/ u_int32 nc_csbc; /* Cumulative SCSI Byte Count */ /*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
/* Following for C1010 only */ /* Following for C1010 only */
/*e0*/ u_short nc_crcpad; /* CRC Value */ /*e0*/ u_short nc_crcpad; /* CRC Value */
/*e2*/ u_char nc_crccntl0; /* CRC control register */ /*e2*/ u_char nc_crccntl0; /* CRC control register */
#define SNDCRC 0x10 /* Send CRC Request */ #define SNDCRC 0x10 /* Send CRC Request */
/*e3*/ u_char nc_crccntl1; /* CRC control register */ /*e3*/ u_char nc_crccntl1; /* CRC control register */
/*e4*/ u_int32 nc_crcdata; /* CRC data register */ /*e4*/ u32 nc_crcdata; /* CRC data register */
/*e8*/ u_int32 nc_e8_; /* rsvd */ /*e8*/ u32 nc_e8_; /* rsvd */
/*ec*/ u_int32 nc_ec_; /* rsvd */ /*ec*/ u32 nc_ec_; /* rsvd */
/*f0*/ u_short nc_dfbc; /* DMA FIFO byte count */ /*f0*/ u_short nc_dfbc; /* DMA FIFO byte count */
}; };
...@@ -1370,7 +1370,7 @@ struct ncr_reg { ...@@ -1370,7 +1370,7 @@ struct ncr_reg {
#define REGJ(p,r) (offsetof(struct ncr_reg, p ## r)) #define REGJ(p,r) (offsetof(struct ncr_reg, p ## r))
#define REG(r) REGJ (nc_, r) #define REG(r) REGJ (nc_, r)
typedef u_int32 ncrcmd; typedef u32 ncrcmd;
/*----------------------------------------------------------- /*-----------------------------------------------------------
** **
...@@ -1422,8 +1422,8 @@ typedef u_int32 ncrcmd; ...@@ -1422,8 +1422,8 @@ typedef u_int32 ncrcmd;
#define SCR_CHMOV_TBL (0x10000000) #define SCR_CHMOV_TBL (0x10000000)
struct scr_tblmove { struct scr_tblmove {
u_int32 size; u32 size;
u_int32 addr; u32 addr;
}; };
/*----------------------------------------------------------- /*-----------------------------------------------------------
...@@ -1464,7 +1464,7 @@ struct scr_tblsel { ...@@ -1464,7 +1464,7 @@ struct scr_tblsel {
#endif #endif
#define SCR_JMP_REL 0x04000000 #define SCR_JMP_REL 0x04000000
#define SCR_ID(id) (((u_int32)(id)) << 16) #define SCR_ID(id) (((u32)(id)) << 16)
/*----------------------------------------------------------- /*-----------------------------------------------------------
** **
......
drivers/scsi/zalon.c
View file @ 18064b09
...@@ -108,7 +108,7 @@ zalon_probe(struct parisc_device *dev) ...@@ -108,7 +108,7 @@ zalon_probe(struct parisc_device *dev)
unsigned long io_port = zalon + GSC_SCSI_ZALON_OFFSET; unsigned long io_port = zalon + GSC_SCSI_ZALON_OFFSET;
static int unit = 0; static int unit = 0;
struct Scsi_Host *host; struct Scsi_Host *host;
ncr_device device; struct ncr_device device;
__raw_writel(CMD_RESET, zalon + IO_MODULE_IO_COMMAND); __raw_writel(CMD_RESET, zalon + IO_MODULE_IO_COMMAND);
while (!(__raw_readl(zalon + IO_MODULE_IO_STATUS) & IOSTATUS_RY)) while (!(__raw_readl(zalon + IO_MODULE_IO_STATUS) & IOSTATUS_RY))
...@@ -133,7 +133,7 @@ zalon_probe(struct parisc_device *dev) ...@@ -133,7 +133,7 @@ zalon_probe(struct parisc_device *dev)
if (zalon_vers == 0) if (zalon_vers == 0)
printk(KERN_WARNING "%s: Zalon 1.1 or earlier\n", __FUNCTION__); printk(KERN_WARNING "%s: Zalon 1.1 or earlier\n", __FUNCTION__);
memset(&device, 0, sizeof(ncr_device)); memset(&device, 0, sizeof(struct ncr_device));
/* The following three are needed before any other access. */ /* The following three are needed before any other access. */
writeb(0x20, io_port + 0x38); /* DCNTL_REG, EA */ writeb(0x20, io_port + 0x38); /* DCNTL_REG, EA */
......
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