Commit 1b981021 authored by Linus Torvalds's avatar Linus Torvalds
parents 384f1fcd f6f3a488
...@@ -738,6 +738,7 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) ...@@ -738,6 +738,7 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
short vtag; short vtag;
#endif #endif
int rx_pkt_limit = dev->quota; int rx_pkt_limit = dev->quota;
unsigned long flags;
do{ do{
/* process receive packets until we use the quota*/ /* process receive packets until we use the quota*/
...@@ -841,18 +842,19 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget) ...@@ -841,18 +842,19 @@ static int amd8111e_rx_poll(struct net_device *dev, int * budget)
/* Receive descriptor is empty now */ /* Receive descriptor is empty now */
dev->quota -= num_rx_pkt; dev->quota -= num_rx_pkt;
*budget -= num_rx_pkt; *budget -= num_rx_pkt;
spin_lock_irqsave(&lp->lock, flags);
netif_rx_complete(dev); netif_rx_complete(dev);
/* enable receive interrupt */
writel(VAL0|RINTEN0, mmio + INTEN0); writel(VAL0|RINTEN0, mmio + INTEN0);
writel(VAL2 | RDMD0, mmio + CMD0); writel(VAL2 | RDMD0, mmio + CMD0);
spin_unlock_irqrestore(&lp->lock, flags);
return 0; return 0;
rx_not_empty: rx_not_empty:
/* Do not call a netif_rx_complete */ /* Do not call a netif_rx_complete */
dev->quota -= num_rx_pkt; dev->quota -= num_rx_pkt;
*budget -= num_rx_pkt; *budget -= num_rx_pkt;
return 1; return 1;
} }
#else #else
...@@ -1261,18 +1263,20 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg ...@@ -1261,18 +1263,20 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
struct net_device * dev = (struct net_device *) dev_id; struct net_device * dev = (struct net_device *) dev_id;
struct amd8111e_priv *lp = netdev_priv(dev); struct amd8111e_priv *lp = netdev_priv(dev);
void __iomem *mmio = lp->mmio; void __iomem *mmio = lp->mmio;
unsigned int intr0; unsigned int intr0, intren0;
unsigned int handled = 1; unsigned int handled = 1;
if(dev == NULL) if(unlikely(dev == NULL))
return IRQ_NONE; return IRQ_NONE;
if (regs) spin_lock (&lp->lock); spin_lock(&lp->lock);
/* disabling interrupt */ /* disabling interrupt */
writel(INTREN, mmio + CMD0); writel(INTREN, mmio + CMD0);
/* Read interrupt status */ /* Read interrupt status */
intr0 = readl(mmio + INT0); intr0 = readl(mmio + INT0);
intren0 = readl(mmio + INTEN0);
/* Process all the INT event until INTR bit is clear. */ /* Process all the INT event until INTR bit is clear. */
...@@ -1293,11 +1297,11 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg ...@@ -1293,11 +1297,11 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
/* Schedule a polling routine */ /* Schedule a polling routine */
__netif_rx_schedule(dev); __netif_rx_schedule(dev);
} }
else { else if (intren0 & RINTEN0) {
printk("************Driver bug! \ printk("************Driver bug! \
interrupt while in poll\n"); interrupt while in poll\n");
/* Fix by disabling interrupts */ /* Fix by disable receive interrupts */
writel(RINT0, mmio + INT0); writel(RINTEN0, mmio + INTEN0);
} }
} }
#else #else
...@@ -1321,7 +1325,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg ...@@ -1321,7 +1325,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg
err_no_interrupt: err_no_interrupt:
writel( VAL0 | INTREN,mmio + CMD0); writel( VAL0 | INTREN,mmio + CMD0);
if (regs) spin_unlock(&lp->lock); spin_unlock(&lp->lock);
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
......
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/******************************************************************************* /*******************************************************************************
Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free under the terms of the GNU General Public License as published by the Free
...@@ -112,6 +112,8 @@ struct e1000_adapter; ...@@ -112,6 +112,8 @@ struct e1000_adapter;
#define E1000_MAX_82544_RXD 4096 #define E1000_MAX_82544_RXD 4096
/* Supported Rx Buffer Sizes */ /* Supported Rx Buffer Sizes */
#define E1000_RXBUFFER_128 128 /* Used for packet split */
#define E1000_RXBUFFER_256 256 /* Used for packet split */
#define E1000_RXBUFFER_2048 2048 #define E1000_RXBUFFER_2048 2048
#define E1000_RXBUFFER_4096 4096 #define E1000_RXBUFFER_4096 4096
#define E1000_RXBUFFER_8192 8192 #define E1000_RXBUFFER_8192 8192
...@@ -138,7 +140,7 @@ struct e1000_adapter; ...@@ -138,7 +140,7 @@ struct e1000_adapter;
#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
#define AUTO_ALL_MODES 0 #define AUTO_ALL_MODES 0
#define E1000_EEPROM_82544_APM 0x0004 #define E1000_EEPROM_82544_APM 0x0400
#define E1000_EEPROM_APME 0x0400 #define E1000_EEPROM_APME 0x0400
#ifndef E1000_MASTER_SLAVE #ifndef E1000_MASTER_SLAVE
...@@ -146,6 +148,10 @@ struct e1000_adapter; ...@@ -146,6 +148,10 @@ struct e1000_adapter;
#define E1000_MASTER_SLAVE e1000_ms_hw_default #define E1000_MASTER_SLAVE e1000_ms_hw_default
#endif #endif
#define E1000_MNG_VLAN_NONE -1
/* Number of packet split data buffers (not including the header buffer) */
#define PS_PAGE_BUFFERS MAX_PS_BUFFERS-1
/* only works for sizes that are powers of 2 */ /* only works for sizes that are powers of 2 */
#define E1000_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1))) #define E1000_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1)))
...@@ -159,6 +165,9 @@ struct e1000_buffer { ...@@ -159,6 +165,9 @@ struct e1000_buffer {
uint16_t next_to_watch; uint16_t next_to_watch;
}; };
struct e1000_ps_page { struct page *ps_page[MAX_PS_BUFFERS]; };
struct e1000_ps_page_dma { uint64_t ps_page_dma[MAX_PS_BUFFERS]; };
struct e1000_desc_ring { struct e1000_desc_ring {
/* pointer to the descriptor ring memory */ /* pointer to the descriptor ring memory */
void *desc; void *desc;
...@@ -174,12 +183,19 @@ struct e1000_desc_ring { ...@@ -174,12 +183,19 @@ struct e1000_desc_ring {
unsigned int next_to_clean; unsigned int next_to_clean;
/* array of buffer information structs */ /* array of buffer information structs */
struct e1000_buffer *buffer_info; struct e1000_buffer *buffer_info;
/* arrays of page information for packet split */
struct e1000_ps_page *ps_page;
struct e1000_ps_page_dma *ps_page_dma;
}; };
#define E1000_DESC_UNUSED(R) \ #define E1000_DESC_UNUSED(R) \
((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \ ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
(R)->next_to_clean - (R)->next_to_use - 1) (R)->next_to_clean - (R)->next_to_use - 1)
#define E1000_RX_DESC_PS(R, i) \
(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
#define E1000_RX_DESC_EXT(R, i) \
(&(((union e1000_rx_desc_extended *)((R).desc))[i]))
#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc) #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
...@@ -192,6 +208,7 @@ struct e1000_adapter { ...@@ -192,6 +208,7 @@ struct e1000_adapter {
struct timer_list watchdog_timer; struct timer_list watchdog_timer;
struct timer_list phy_info_timer; struct timer_list phy_info_timer;
struct vlan_group *vlgrp; struct vlan_group *vlgrp;
uint16_t mng_vlan_id;
uint32_t bd_number; uint32_t bd_number;
uint32_t rx_buffer_len; uint32_t rx_buffer_len;
uint32_t part_num; uint32_t part_num;
...@@ -228,14 +245,23 @@ struct e1000_adapter { ...@@ -228,14 +245,23 @@ struct e1000_adapter {
boolean_t detect_tx_hung; boolean_t detect_tx_hung;
/* RX */ /* RX */
#ifdef CONFIG_E1000_NAPI
boolean_t (*clean_rx) (struct e1000_adapter *adapter, int *work_done,
int work_to_do);
#else
boolean_t (*clean_rx) (struct e1000_adapter *adapter);
#endif
void (*alloc_rx_buf) (struct e1000_adapter *adapter);
struct e1000_desc_ring rx_ring; struct e1000_desc_ring rx_ring;
uint64_t hw_csum_err; uint64_t hw_csum_err;
uint64_t hw_csum_good; uint64_t hw_csum_good;
uint32_t rx_int_delay; uint32_t rx_int_delay;
uint32_t rx_abs_int_delay; uint32_t rx_abs_int_delay;
boolean_t rx_csum; boolean_t rx_csum;
boolean_t rx_ps;
uint32_t gorcl; uint32_t gorcl;
uint64_t gorcl_old; uint64_t gorcl_old;
uint16_t rx_ps_bsize0;
/* Interrupt Throttle Rate */ /* Interrupt Throttle Rate */
uint32_t itr; uint32_t itr;
...@@ -257,5 +283,8 @@ struct e1000_adapter { ...@@ -257,5 +283,8 @@ struct e1000_adapter {
int msg_enable; int msg_enable;
#ifdef CONFIG_PCI_MSI
boolean_t have_msi;
#endif
}; };
#endif /* _E1000_H_ */ #endif /* _E1000_H_ */
/******************************************************************************* /*******************************************************************************
Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free under the terms of the GNU General Public License as published by the Free
...@@ -69,6 +69,7 @@ static const struct e1000_stats e1000_gstrings_stats[] = { ...@@ -69,6 +69,7 @@ static const struct e1000_stats e1000_gstrings_stats[] = {
{ "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) }, { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
{ "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) }, { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
{ "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) }, { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
{ "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
{ "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) }, { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
{ "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) }, { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
{ "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) }, { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
...@@ -593,7 +594,7 @@ e1000_set_ringparam(struct net_device *netdev, ...@@ -593,7 +594,7 @@ e1000_set_ringparam(struct net_device *netdev,
tx_old = adapter->tx_ring; tx_old = adapter->tx_ring;
rx_old = adapter->rx_ring; rx_old = adapter->rx_ring;
if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
return -EINVAL; return -EINVAL;
if(netif_running(adapter->netdev)) if(netif_running(adapter->netdev))
...@@ -842,10 +843,8 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) ...@@ -842,10 +843,8 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
* test failed. * test failed.
*/ */
adapter->test_icr = 0; adapter->test_icr = 0;
E1000_WRITE_REG(&adapter->hw, IMC, E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
(~mask & 0x00007FFF)); E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
E1000_WRITE_REG(&adapter->hw, ICS,
(~mask & 0x00007FFF));
msec_delay(10); msec_delay(10);
if(adapter->test_icr) { if(adapter->test_icr) {
...@@ -919,7 +918,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter) ...@@ -919,7 +918,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter)
/* Setup Tx descriptor ring and Tx buffers */ /* Setup Tx descriptor ring and Tx buffers */
txdr->count = 80; if(!txdr->count)
txdr->count = E1000_DEFAULT_TXD;
size = txdr->count * sizeof(struct e1000_buffer); size = txdr->count * sizeof(struct e1000_buffer);
if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) { if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
...@@ -974,7 +974,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter) ...@@ -974,7 +974,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter)
/* Setup Rx descriptor ring and Rx buffers */ /* Setup Rx descriptor ring and Rx buffers */
rxdr->count = 80; if(!rxdr->count)
rxdr->count = E1000_DEFAULT_RXD;
size = rxdr->count * sizeof(struct e1000_buffer); size = rxdr->count * sizeof(struct e1000_buffer);
if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) { if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
...@@ -1310,31 +1311,62 @@ e1000_run_loopback_test(struct e1000_adapter *adapter) ...@@ -1310,31 +1311,62 @@ e1000_run_loopback_test(struct e1000_adapter *adapter)
struct e1000_desc_ring *txdr = &adapter->test_tx_ring; struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
struct e1000_desc_ring *rxdr = &adapter->test_rx_ring; struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = adapter->pdev;
int i, ret_val; int i, j, k, l, lc, good_cnt, ret_val=0;
unsigned long time;
E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1); E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
for(i = 0; i < 64; i++) { /* Calculate the loop count based on the largest descriptor ring
e1000_create_lbtest_frame(txdr->buffer_info[i].skb, 1024); * The idea is to wrap the largest ring a number of times using 64
pci_dma_sync_single_for_device(pdev, txdr->buffer_info[i].dma, * send/receive pairs during each loop
txdr->buffer_info[i].length, */
if(rxdr->count <= txdr->count)
lc = ((txdr->count / 64) * 2) + 1;
else
lc = ((rxdr->count / 64) * 2) + 1;
k = l = 0;
for(j = 0; j <= lc; j++) { /* loop count loop */
for(i = 0; i < 64; i++) { /* send the packets */
e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1024);
pci_dma_sync_single_for_device(pdev,
txdr->buffer_info[k].dma,
txdr->buffer_info[k].length,
PCI_DMA_TODEVICE); PCI_DMA_TODEVICE);
if(unlikely(++k == txdr->count)) k = 0;
} }
E1000_WRITE_REG(&adapter->hw, TDT, i); E1000_WRITE_REG(&adapter->hw, TDT, k);
msec_delay(200); msec_delay(200);
time = jiffies; /* set the start time for the receive */
i = 0; good_cnt = 0;
do { do { /* receive the sent packets */
pci_dma_sync_single_for_cpu(pdev, rxdr->buffer_info[i].dma, pci_dma_sync_single_for_cpu(pdev,
rxdr->buffer_info[i].length, rxdr->buffer_info[l].dma,
rxdr->buffer_info[l].length,
PCI_DMA_FROMDEVICE); PCI_DMA_FROMDEVICE);
ret_val = e1000_check_lbtest_frame(rxdr->buffer_info[i].skb, ret_val = e1000_check_lbtest_frame(
rxdr->buffer_info[l].skb,
1024); 1024);
i++; if(!ret_val)
} while (ret_val != 0 && i < 64); good_cnt++;
if(unlikely(++l == rxdr->count)) l = 0;
/* time + 20 msecs (200 msecs on 2.4) is more than
* enough time to complete the receives, if it's
* exceeded, break and error off
*/
} while (good_cnt < 64 && jiffies < (time + 20));
if(good_cnt != 64) {
ret_val = 13; /* ret_val is the same as mis-compare */
break;
}
if(jiffies >= (time + 2)) {
ret_val = 14; /* error code for time out error */
break;
}
} /* end loop count loop */
return ret_val; return ret_val;
} }
...@@ -1354,13 +1386,12 @@ static int ...@@ -1354,13 +1386,12 @@ static int
e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
{ {
*data = 0; *data = 0;
if (adapter->hw.media_type == e1000_media_type_internal_serdes) { if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
int i = 0; int i = 0;
adapter->hw.serdes_link_down = TRUE; adapter->hw.serdes_link_down = TRUE;
/* on some blade server designs link establishment */ /* On some blade server designs, link establishment
/* could take as long as 2-3 minutes. */ * could take as long as 2-3 minutes */
do { do {
e1000_check_for_link(&adapter->hw); e1000_check_for_link(&adapter->hw);
if (adapter->hw.serdes_link_down == FALSE) if (adapter->hw.serdes_link_down == FALSE)
...@@ -1371,6 +1402,8 @@ e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) ...@@ -1371,6 +1402,8 @@ e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
*data = 1; *data = 1;
} else { } else {
e1000_check_for_link(&adapter->hw); e1000_check_for_link(&adapter->hw);
if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
msec_delay(4000);
if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) { if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
*data = 1; *data = 1;
......
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/******************************************************************************* /*******************************************************************************
Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free under the terms of the GNU General Public License as published by the Free
...@@ -42,7 +42,12 @@ ...@@ -42,7 +42,12 @@
#include <linux/sched.h> #include <linux/sched.h>
#ifndef msec_delay #ifndef msec_delay
#define msec_delay(x) msleep(x) #define msec_delay(x) do { if(in_interrupt()) { \
/* Don't mdelay in interrupt context! */ \
BUG(); \
} else { \
msleep(x); \
} } while(0)
/* Some workarounds require millisecond delays and are run during interrupt /* Some workarounds require millisecond delays and are run during interrupt
* context. Most notably, when establishing link, the phy may need tweaking * context. Most notably, when establishing link, the phy may need tweaking
...@@ -96,6 +101,29 @@ typedef enum { ...@@ -96,6 +101,29 @@ typedef enum {
(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
((offset) << 2))) ((offset) << 2)))
#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
writew((value), ((a)->hw_addr + \
(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
((offset) << 1))))
#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
readw((a)->hw_addr + \
(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
((offset) << 1)))
#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
writeb((value), ((a)->hw_addr + \
(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
(offset))))
#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
readb((a)->hw_addr + \
(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
(offset)))
#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS) #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
#endif /* _E1000_OSDEP_H_ */ #endif /* _E1000_OSDEP_H_ */
/******************************************************************************* /*******************************************************************************
Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free under the terms of the GNU General Public License as published by the Free
...@@ -478,7 +478,6 @@ e1000_check_options(struct e1000_adapter *adapter) ...@@ -478,7 +478,6 @@ e1000_check_options(struct e1000_adapter *adapter)
DPRINTK(PROBE, INFO, "%s set to dynamic mode\n", DPRINTK(PROBE, INFO, "%s set to dynamic mode\n",
opt.name); opt.name);
break; break;
case -1:
default: default:
e1000_validate_option(&adapter->itr, &opt, e1000_validate_option(&adapter->itr, &opt,
adapter); adapter);
......
...@@ -110,7 +110,7 @@ struct ixgb_adapter; ...@@ -110,7 +110,7 @@ struct ixgb_adapter;
#define IXGB_TX_QUEUE_WAKE 16 #define IXGB_TX_QUEUE_WAKE 16
/* How many Rx Buffers do we bundle into one write to the hardware ? */ /* How many Rx Buffers do we bundle into one write to the hardware ? */
#define IXGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */ #define IXGB_RX_BUFFER_WRITE 4 /* Must be power of 2 */
/* only works for sizes that are powers of 2 */ /* only works for sizes that are powers of 2 */
#define IXGB_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1))) #define IXGB_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1)))
......
...@@ -411,7 +411,7 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) ...@@ -411,7 +411,7 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
ixgb_cleanup_eeprom(hw); ixgb_cleanup_eeprom(hw);
/* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
ee_map->init_ctrl_reg_1 = EEPROM_ICW1_SIGNATURE_CLEAR; ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR);
return; return;
} }
...@@ -483,7 +483,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw) ...@@ -483,7 +483,7 @@ ixgb_get_eeprom_data(struct ixgb_hw *hw)
DEBUGOUT("ixgb_ee: Checksum invalid.\n"); DEBUGOUT("ixgb_ee: Checksum invalid.\n");
/* clear the init_ctrl_reg_1 to signify that the cache is /* clear the init_ctrl_reg_1 to signify that the cache is
* invalidated */ * invalidated */
ee_map->init_ctrl_reg_1 = EEPROM_ICW1_SIGNATURE_CLEAR; ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR);
return (FALSE); return (FALSE);
} }
...@@ -579,7 +579,7 @@ ixgb_get_ee_compatibility(struct ixgb_hw *hw) ...@@ -579,7 +579,7 @@ ixgb_get_ee_compatibility(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->compatibility); return (le16_to_cpu(ee_map->compatibility));
return(0); return(0);
} }
...@@ -616,7 +616,7 @@ ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw) ...@@ -616,7 +616,7 @@ ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->init_ctrl_reg_1); return (le16_to_cpu(ee_map->init_ctrl_reg_1));
return(0); return(0);
} }
...@@ -635,7 +635,7 @@ ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw) ...@@ -635,7 +635,7 @@ ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->init_ctrl_reg_2); return (le16_to_cpu(ee_map->init_ctrl_reg_2));
return(0); return(0);
} }
...@@ -654,7 +654,7 @@ ixgb_get_ee_subsystem_id(struct ixgb_hw *hw) ...@@ -654,7 +654,7 @@ ixgb_get_ee_subsystem_id(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->subsystem_id); return (le16_to_cpu(ee_map->subsystem_id));
return(0); return(0);
} }
...@@ -673,7 +673,7 @@ ixgb_get_ee_subvendor_id(struct ixgb_hw *hw) ...@@ -673,7 +673,7 @@ ixgb_get_ee_subvendor_id(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->subvendor_id); return (le16_to_cpu(ee_map->subvendor_id));
return(0); return(0);
} }
...@@ -692,7 +692,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw) ...@@ -692,7 +692,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->device_id); return (le16_to_cpu(ee_map->device_id));
return(0); return(0);
} }
...@@ -711,7 +711,7 @@ ixgb_get_ee_vendor_id(struct ixgb_hw *hw) ...@@ -711,7 +711,7 @@ ixgb_get_ee_vendor_id(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->vendor_id); return (le16_to_cpu(ee_map->vendor_id));
return(0); return(0);
} }
...@@ -730,7 +730,7 @@ ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw) ...@@ -730,7 +730,7 @@ ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->swdpins_reg); return (le16_to_cpu(ee_map->swdpins_reg));
return(0); return(0);
} }
...@@ -749,7 +749,7 @@ ixgb_get_ee_d3_power(struct ixgb_hw *hw) ...@@ -749,7 +749,7 @@ ixgb_get_ee_d3_power(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->d3_power); return (le16_to_cpu(ee_map->d3_power));
return(0); return(0);
} }
...@@ -768,7 +768,7 @@ ixgb_get_ee_d0_power(struct ixgb_hw *hw) ...@@ -768,7 +768,7 @@ ixgb_get_ee_d0_power(struct ixgb_hw *hw)
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if(ixgb_check_and_get_eeprom_data(hw) == TRUE) if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
return(ee_map->d0_power); return (le16_to_cpu(ee_map->d0_power));
return(0); return(0);
} }
...@@ -252,7 +252,9 @@ ixgb_get_regs(struct net_device *netdev, ...@@ -252,7 +252,9 @@ ixgb_get_regs(struct net_device *netdev,
uint32_t *reg_start = reg; uint32_t *reg_start = reg;
uint8_t i; uint8_t i;
regs->version = (adapter->hw.device_id << 16) | adapter->hw.subsystem_id; /* the 1 (one) below indicates an attempt at versioning, if the
* interface in ethtool or the driver this 1 should be incremented */
regs->version = (1<<24) | hw->revision_id << 16 | hw->device_id;
/* General Registers */ /* General Registers */
*reg++ = IXGB_READ_REG(hw, CTRL0); /* 0 */ *reg++ = IXGB_READ_REG(hw, CTRL0); /* 0 */
......
This diff is collapsed.
...@@ -45,8 +45,7 @@ ...@@ -45,8 +45,7 @@
/* Don't mdelay in interrupt context! */ \ /* Don't mdelay in interrupt context! */ \
BUG(); \ BUG(); \
} else { \ } else { \
set_current_state(TASK_UNINTERRUPTIBLE); \ msleep(x); \
schedule_timeout((x * HZ)/1000 + 2); \
} } while(0) } } while(0)
#endif #endif
......
...@@ -22,8 +22,8 @@ ...@@ -22,8 +22,8 @@
*************************************************************************/ *************************************************************************/
#define DRV_NAME "pcnet32" #define DRV_NAME "pcnet32"
#define DRV_VERSION "1.30i" #define DRV_VERSION "1.30j"
#define DRV_RELDATE "06.28.2004" #define DRV_RELDATE "29.04.2005"
#define PFX DRV_NAME ": " #define PFX DRV_NAME ": "
static const char *version = static const char *version =
...@@ -256,6 +256,7 @@ static int homepna[MAX_UNITS]; ...@@ -256,6 +256,7 @@ static int homepna[MAX_UNITS];
* homepna for selecting HomePNA mode for PCNet/Home 79C978. * homepna for selecting HomePNA mode for PCNet/Home 79C978.
* v1.30h 24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32. * v1.30h 24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32.
* v1.30i 28 Jun 2004 Don Fry change to use module_param. * v1.30i 28 Jun 2004 Don Fry change to use module_param.
* v1.30j 29 Apr 2005 Don Fry fix skb/map leak with loopback test.
*/ */
...@@ -395,6 +396,7 @@ static void pcnet32_led_blink_callback(struct net_device *dev); ...@@ -395,6 +396,7 @@ static void pcnet32_led_blink_callback(struct net_device *dev);
static int pcnet32_get_regs_len(struct net_device *dev); static int pcnet32_get_regs_len(struct net_device *dev);
static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs, static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
void *ptr); void *ptr);
static void pcnet32_purge_tx_ring(struct net_device *dev);
enum pci_flags_bit { enum pci_flags_bit {
PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4, PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
...@@ -785,6 +787,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1) ...@@ -785,6 +787,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1)
} }
clean_up: clean_up:
pcnet32_purge_tx_ring(dev);
x = a->read_csr(ioaddr, 15) & 0xFFFF; x = a->read_csr(ioaddr, 15) & 0xFFFF;
a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */ a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */
......
...@@ -174,6 +174,7 @@ void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val) ...@@ -174,6 +174,7 @@ void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
break; break;
} }
spin_unlock_irqrestore(&tp->mii_lock, flags); spin_unlock_irqrestore(&tp->mii_lock, flags);
return;
} }
/* Establish sync by sending 32 logic ones. */ /* Establish sync by sending 32 logic ones. */
......
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