Commit 1bbecc8c authored by Olof Johansson's avatar Olof Johansson

Merge tag 'at91-ab-4.12-soc' of...

Merge tag 'at91-ab-4.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/soc

SoC for 4.12:

 - huge PM cleanup
 - Move SoC detection to its own driver

* tag 'at91-ab-4.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: at91: move SoC detection to its own driver
  ARM: at91: pm: correct typo
  ARM: at91: pm: Remove at91_pm_set_standby
  ARM: at91: pm: Merge all at91sam9*_pm_init
  ARM: at91: pm: Tie the USB clock mask to the pmc
  ARM: at91: pm: Tie the memory controller type to the ramc id
  ARM: at91: pm: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.
  ARM: at91: pm: Simplify at91rm9200_standby
  ARM: at91: pm: Use struct at91_pm_data in pm_suspend.S
  ARM: at91: pm: Move global variables into at91_pm_data
  ARM: at91: pm: Move at91_ramc_read/write to pm.c
  ARM: at91: pm: Cleanup headers
  MAINTAINERS: Add memory drivers to AT91 entry
  MAINTAINERS: Update AT91 entry
  ARM: at91: pm: cpu_idle: switch DDR to power-down mode
  Revert "ARM: at91/dt: sama5d2: Use new compatible for ohci node"
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d7718c14 b32de9dd
...@@ -1104,7 +1104,6 @@ F: drivers/*/*aspeed* ...@@ -1104,7 +1104,6 @@ F: drivers/*/*aspeed*
ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
M: Nicolas Ferre <nicolas.ferre@microchip.com> M: Nicolas Ferre <nicolas.ferre@microchip.com>
M: Alexandre Belloni <alexandre.belloni@free-electrons.com> M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
M: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
W: http://www.linux4sam.org W: http://www.linux4sam.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git
...@@ -1116,6 +1115,7 @@ F: arch/arm/boot/dts/at91*.dtsi ...@@ -1116,6 +1115,7 @@ F: arch/arm/boot/dts/at91*.dtsi
F: arch/arm/boot/dts/sama*.dts F: arch/arm/boot/dts/sama*.dts
F: arch/arm/boot/dts/sama*.dtsi F: arch/arm/boot/dts/sama*.dtsi
F: arch/arm/include/debug/at91.S F: arch/arm/include/debug/at91.S
F: drivers/memory/atmel*
ARM/ATMEL AT91 Clock Support ARM/ATMEL AT91 Clock Support
M: Boris Brezillon <boris.brezillon@free-electrons.com> M: Boris Brezillon <boris.brezillon@free-electrons.com>
......
...@@ -266,7 +266,7 @@ ep@15 { ...@@ -266,7 +266,7 @@ ep@15 {
}; };
usb1: ohci@00400000 { usb1: ohci@00400000 {
compatible = "atmel,sama5d2-ohci", "usb-ohci"; compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>; reg = <0x00400000 0x100000>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
......
# #
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
obj-y := soc.o
# CPU-specific support # CPU-specific support
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o
...@@ -18,3 +17,36 @@ endif ...@@ -18,3 +17,36 @@ endif
ifeq ($(CONFIG_PM_DEBUG),y) ifeq ($(CONFIG_PM_DEBUG),y)
CFLAGS_pm.o += -DDEBUG CFLAGS_pm.o += -DDEBUG
endif endif
# Default sed regexp - multiline due to syntax constraints
define sed-y
"/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
# Use filechk to avoid rebuilds when a header changes, but the resulting file
# does not
define filechk_offsets
(set -e; \
echo "#ifndef $2"; \
echo "#define $2"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y); \
echo ""; \
echo "#endif" )
endef
arch/arm/mach-at91/pm_data-offsets.s: arch/arm/mach-at91/pm_data-offsets.c
$(call if_changed_dep,cc_s_c)
include/generated/at91_pm_data-offsets.h: arch/arm/mach-at91/pm_data-offsets.s FORCE
$(call filechk,offsets,__PM_DATA_OFFSETS_H__)
arch/arm/mach-at91/pm_suspend.o: include/generated/at91_pm_data-offsets.h
...@@ -14,23 +14,10 @@ ...@@ -14,23 +14,10 @@
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include "generic.h" #include "generic.h"
#include "soc.h"
static const struct at91_soc rm9200_socs[] = {
AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
{ /* sentinel */ },
};
static void __init at91rm9200_dt_device_init(void) static void __init at91rm9200_dt_device_init(void)
{ {
struct soc_device *soc; of_platform_default_populate(NULL, NULL, NULL);
struct device *soc_dev = NULL;
soc = at91_soc_init(rm9200_socs);
if (soc != NULL)
soc_dev = soc_device_to_device(soc);
of_platform_default_populate(NULL, NULL, soc_dev);
at91rm9200_pm_init(); at91rm9200_pm_init();
} }
......
...@@ -14,60 +14,12 @@ ...@@ -14,60 +14,12 @@
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include "generic.h" #include "generic.h"
#include "soc.h"
static const struct at91_soc at91sam9_socs[] = { static void __init at91sam9_init(void)
AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
"at91sam9m11", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
"at91sam9m10", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
"at91sam9g46", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
"at91sam9g45", "at91sam9g45"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
"at91sam9g15", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
"at91sam9g35", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
"at91sam9x35", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
"at91sam9g25", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
"at91sam9x25", "at91sam9x5"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
"at91sam9cn12", "at91sam9n12"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
"at91sam9n12", "at91sam9n12"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
"at91sam9cn11", "at91sam9n12"),
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
{ /* sentinel */ },
};
static void __init at91sam9_common_init(void)
{ {
struct soc_device *soc; of_platform_default_populate(NULL, NULL, NULL);
struct device *soc_dev = NULL;
soc = at91_soc_init(at91sam9_socs);
if (soc != NULL)
soc_dev = soc_device_to_device(soc);
of_platform_default_populate(NULL, NULL, soc_dev); at91sam9_pm_init();
}
static void __init at91sam9_dt_device_init(void)
{
at91sam9_common_init();
at91sam9260_pm_init();
} }
static const char *const at91_dt_board_compat[] __initconst = { static const char *const at91_dt_board_compat[] __initconst = {
...@@ -77,41 +29,6 @@ static const char *const at91_dt_board_compat[] __initconst = { ...@@ -77,41 +29,6 @@ static const char *const at91_dt_board_compat[] __initconst = {
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */ /* Maintainer: Atmel */
.init_machine = at91sam9_dt_device_init, .init_machine = at91sam9_init,
.dt_compat = at91_dt_board_compat, .dt_compat = at91_dt_board_compat,
MACHINE_END MACHINE_END
static void __init at91sam9g45_dt_device_init(void)
{
at91sam9_common_init();
at91sam9g45_pm_init();
}
static const char *const at91sam9g45_board_compat[] __initconst = {
"atmel,at91sam9g45",
NULL
};
DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
/* Maintainer: Atmel */
.init_machine = at91sam9g45_dt_device_init,
.dt_compat = at91sam9g45_board_compat,
MACHINE_END
static void __init at91sam9x5_dt_device_init(void)
{
at91sam9_common_init();
at91sam9x5_pm_init();
}
static const char *const at91sam9x5_board_compat[] __initconst = {
"atmel,at91sam9x5",
"atmel,at91sam9n12",
NULL
};
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
.init_machine = at91sam9x5_dt_device_init,
.dt_compat = at91sam9x5_board_compat,
MACHINE_END
...@@ -13,15 +13,11 @@ ...@@ -13,15 +13,11 @@
#ifdef CONFIG_PM #ifdef CONFIG_PM
extern void __init at91rm9200_pm_init(void); extern void __init at91rm9200_pm_init(void);
extern void __init at91sam9260_pm_init(void); extern void __init at91sam9_pm_init(void);
extern void __init at91sam9g45_pm_init(void);
extern void __init at91sam9x5_pm_init(void);
extern void __init sama5_pm_init(void); extern void __init sama5_pm_init(void);
#else #else
static inline void __init at91rm9200_pm_init(void) { } static inline void __init at91rm9200_pm_init(void) { }
static inline void __init at91sam9260_pm_init(void) { } static inline void __init at91sam9_pm_init(void) { }
static inline void __init at91sam9g45_pm_init(void) { }
static inline void __init at91sam9x5_pm_init(void) { }
static inline void __init sama5_pm_init(void) { } static inline void __init sama5_pm_init(void) { }
#endif #endif
......
...@@ -10,35 +10,22 @@ ...@@ -10,35 +10,22 @@
* (at your option) any later version. * (at your option) any later version.
*/ */
#include <linux/gpio.h>
#include <linux/suspend.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
#include <linux/genalloc.h> #include <linux/genalloc.h>
#include <linux/interrupt.h> #include <linux/io.h>
#include <linux/sysfs.h> #include <linux/of_address.h>
#include <linux/module.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/of_address.h> #include <linux/suspend.h>
#include <linux/platform_device.h>
#include <linux/platform_data/atmel.h>
#include <linux/io.h>
#include <linux/clk/at91_pmc.h> #include <linux/clk/at91_pmc.h>
#include <asm/irq.h>
#include <linux/atomic.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
#include <asm/fncpy.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/fncpy.h>
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include "generic.h" #include "generic.h"
#include "pm.h" #include "pm.h"
static void __iomem *pmc;
/* /*
* FIXME: this is needed to communicate between the pinctrl driver and * FIXME: this is needed to communicate between the pinctrl driver and
* the PM implementation in the machine. Possibly part of the PM * the PM implementation in the machine. Possibly part of the PM
...@@ -50,12 +37,13 @@ extern void at91_pinctrl_gpio_suspend(void); ...@@ -50,12 +37,13 @@ extern void at91_pinctrl_gpio_suspend(void);
extern void at91_pinctrl_gpio_resume(void); extern void at91_pinctrl_gpio_resume(void);
#endif #endif
static struct { static struct at91_pm_data pm_data;
unsigned long uhp_udp_mask;
int memctrl;
} at91_pm_data;
static void __iomem *at91_ramc_base[2]; #define at91_ramc_read(id, field) \
__raw_readl(pm_data.ramc[id] + field)
#define at91_ramc_write(id, field, value) \
__raw_writel(value, pm_data.ramc[id] + field)
static int at91_pm_valid_state(suspend_state_t state) static int at91_pm_valid_state(suspend_state_t state)
{ {
...@@ -91,10 +79,10 @@ static int at91_pm_verify_clocks(void) ...@@ -91,10 +79,10 @@ static int at91_pm_verify_clocks(void)
unsigned long scsr; unsigned long scsr;
int i; int i;
scsr = readl(pmc + AT91_PMC_SCSR); scsr = readl(pm_data.pmc + AT91_PMC_SCSR);
/* USB must not be using PLLB */ /* USB must not be using PLLB */
if ((scsr & at91_pm_data.uhp_udp_mask) != 0) { if ((scsr & pm_data.uhp_udp_mask) != 0) {
pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
return 0; return 0;
} }
...@@ -105,7 +93,7 @@ static int at91_pm_verify_clocks(void) ...@@ -105,7 +93,7 @@ static int at91_pm_verify_clocks(void)
if ((scsr & (AT91_PMC_PCK0 << i)) == 0) if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
continue; continue;
css = readl(pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS; css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
if (css != AT91_PMC_CSS_SLOW) { if (css != AT91_PMC_CSS_SLOW) {
pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
return 0; return 0;
...@@ -131,25 +119,18 @@ int at91_suspend_entering_slow_clock(void) ...@@ -131,25 +119,18 @@ int at91_suspend_entering_slow_clock(void)
} }
EXPORT_SYMBOL(at91_suspend_entering_slow_clock); EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0, static void (*at91_suspend_sram_fn)(struct at91_pm_data *);
void __iomem *ramc1, int memctrl); extern void at91_pm_suspend_in_sram(struct at91_pm_data *pm_data);
extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *ramc0,
void __iomem *ramc1, int memctrl);
extern u32 at91_pm_suspend_in_sram_sz; extern u32 at91_pm_suspend_in_sram_sz;
static void at91_pm_suspend(suspend_state_t state) static void at91_pm_suspend(suspend_state_t state)
{ {
unsigned int pm_data = at91_pm_data.memctrl; pm_data.mode = (state == PM_SUSPEND_MEM) ? AT91_PM_SLOW_CLOCK : 0;
pm_data |= (state == PM_SUSPEND_MEM) ?
AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0;
flush_cache_all(); flush_cache_all();
outer_disable(); outer_disable();
at91_suspend_sram_fn(pmc, at91_ramc_base[0], at91_suspend_sram_fn(&pm_data);
at91_ramc_base[1], pm_data);
outer_resume(); outer_resume();
} }
...@@ -224,12 +205,6 @@ static struct platform_device at91_cpuidle_device = { ...@@ -224,12 +205,6 @@ static struct platform_device at91_cpuidle_device = {
.name = "cpuidle-at91", .name = "cpuidle-at91",
}; };
static void at91_pm_set_standby(void (*at91_standby)(void))
{
if (at91_standby)
at91_cpuidle_device.dev.platform_data = at91_standby;
}
/* /*
* The AT91RM9200 goes into self-refresh mode with this command, and will * The AT91RM9200 goes into self-refresh mode with this command, and will
* terminate self-refresh automatically on the next SDRAM access. * terminate self-refresh automatically on the next SDRAM access.
...@@ -241,20 +216,15 @@ static void at91_pm_set_standby(void (*at91_standby)(void)) ...@@ -241,20 +216,15 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
*/ */
static void at91rm9200_standby(void) static void at91rm9200_standby(void)
{ {
u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);
asm volatile( asm volatile(
"b 1f\n\t" "b 1f\n\t"
".align 5\n\t" ".align 5\n\t"
"1: mcr p15, 0, %0, c7, c10, 4\n\t" "1: mcr p15, 0, %0, c7, c10, 4\n\t"
" str %0, [%1, %2]\n\t" " str %2, [%1, %3]\n\t"
" str %3, [%1, %4]\n\t"
" mcr p15, 0, %0, c7, c0, 4\n\t" " mcr p15, 0, %0, c7, c0, 4\n\t"
" str %5, [%1, %2]"
: :
: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR), : "r" (0), "r" (pm_data.ramc[0]),
"r" (1), "r" (AT91_MC_SDRAMC_SRR), "r" (1), "r" (AT91_MC_SDRAMC_SRR));
"r" (lpr));
} }
/* We manage both DDRAM/SDRAM controllers, we need more than one value to /* We manage both DDRAM/SDRAM controllers, we need more than one value to
...@@ -265,12 +235,27 @@ static void at91_ddr_standby(void) ...@@ -265,12 +235,27 @@ static void at91_ddr_standby(void)
/* Those two values allow us to delay self-refresh activation /* Those two values allow us to delay self-refresh activation
* to the maximum. */ * to the maximum. */
u32 lpr0, lpr1 = 0; u32 lpr0, lpr1 = 0;
u32 mdr, saved_mdr0, saved_mdr1 = 0;
u32 saved_lpr0, saved_lpr1 = 0; u32 saved_lpr0, saved_lpr1 = 0;
if (at91_ramc_base[1]) { /* LPDDR1 --> force DDR2 mode during self-refresh */
saved_mdr0 = at91_ramc_read(0, AT91_DDRSDRC_MDR);
if ((saved_mdr0 & AT91_DDRSDRC_MD) == AT91_DDRSDRC_MD_LOW_POWER_DDR) {
mdr = saved_mdr0 & ~AT91_DDRSDRC_MD;
mdr |= AT91_DDRSDRC_MD_DDR2;
at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr);
}
if (pm_data.ramc[1]) {
saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
saved_mdr1 = at91_ramc_read(1, AT91_DDRSDRC_MDR);
if ((saved_mdr1 & AT91_DDRSDRC_MD) == AT91_DDRSDRC_MD_LOW_POWER_DDR) {
mdr = saved_mdr1 & ~AT91_DDRSDRC_MD;
mdr |= AT91_DDRSDRC_MD_DDR2;
at91_ramc_write(1, AT91_DDRSDRC_MDR, mdr);
}
} }
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
...@@ -279,14 +264,33 @@ static void at91_ddr_standby(void) ...@@ -279,14 +264,33 @@ static void at91_ddr_standby(void)
/* self-refresh mode now */ /* self-refresh mode now */
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
if (at91_ramc_base[1]) if (pm_data.ramc[1])
at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
cpu_do_idle(); cpu_do_idle();
at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0);
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
if (at91_ramc_base[1]) if (pm_data.ramc[1]) {
at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1);
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
}
}
static void sama5d3_ddr_standby(void)
{
u32 lpr0;
u32 saved_lpr0;
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN;
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
cpu_do_idle();
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
} }
/* We manage both DDRAM/SDRAM controllers, we need more than one value to /* We manage both DDRAM/SDRAM controllers, we need more than one value to
...@@ -297,7 +301,7 @@ static void at91sam9_sdram_standby(void) ...@@ -297,7 +301,7 @@ static void at91sam9_sdram_standby(void)
u32 lpr0, lpr1 = 0; u32 lpr0, lpr1 = 0;
u32 saved_lpr0, saved_lpr1 = 0; u32 saved_lpr0, saved_lpr1 = 0;
if (at91_ramc_base[1]) { if (pm_data.ramc[1]) {
saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
...@@ -309,21 +313,33 @@ static void at91sam9_sdram_standby(void) ...@@ -309,21 +313,33 @@ static void at91sam9_sdram_standby(void)
/* self-refresh mode now */ /* self-refresh mode now */
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
if (at91_ramc_base[1]) if (pm_data.ramc[1])
at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
cpu_do_idle(); cpu_do_idle();
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
if (at91_ramc_base[1]) if (pm_data.ramc[1])
at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
} }
struct ramc_info {
void (*idle)(void);
unsigned int memctrl;
};
static const struct ramc_info ramc_infos[] __initconst = {
{ .idle = at91rm9200_standby, .memctrl = AT91_MEMCTRL_MC},
{ .idle = at91sam9_sdram_standby, .memctrl = AT91_MEMCTRL_SDRAMC},
{ .idle = at91_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},
{ .idle = sama5d3_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},
};
static const struct of_device_id const ramc_ids[] __initconst = { static const struct of_device_id const ramc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, { .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, { .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
{ .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, { .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
{ /*sentinel*/ } { /*sentinel*/ }
}; };
...@@ -332,15 +348,18 @@ static __init void at91_dt_ramc(void) ...@@ -332,15 +348,18 @@ static __init void at91_dt_ramc(void)
struct device_node *np; struct device_node *np;
const struct of_device_id *of_id; const struct of_device_id *of_id;
int idx = 0; int idx = 0;
const void *standby = NULL; void *standby = NULL;
const struct ramc_info *ramc;
for_each_matching_node_and_match(np, ramc_ids, &of_id) { for_each_matching_node_and_match(np, ramc_ids, &of_id) {
at91_ramc_base[idx] = of_iomap(np, 0); pm_data.ramc[idx] = of_iomap(np, 0);
if (!at91_ramc_base[idx]) if (!pm_data.ramc[idx])
panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
ramc = of_id->data;
if (!standby) if (!standby)
standby = of_id->data; standby = ramc->idle;
pm_data.memctrl = ramc->memctrl;
idx++; idx++;
} }
...@@ -353,7 +372,7 @@ static __init void at91_dt_ramc(void) ...@@ -353,7 +372,7 @@ static __init void at91_dt_ramc(void)
return; return;
} }
at91_pm_set_standby(standby); at91_cpuidle_device.dev.platform_data = standby;
} }
static void at91rm9200_idle(void) static void at91rm9200_idle(void)
...@@ -362,12 +381,12 @@ static void at91rm9200_idle(void) ...@@ -362,12 +381,12 @@ static void at91rm9200_idle(void)
* Disable the processor clock. The processor will be automatically * Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset. * re-enabled by an interrupt or by a reset.
*/ */
writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR); writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
} }
static void at91sam9_idle(void) static void at91sam9_idle(void)
{ {
writel(AT91_PMC_PCK, pmc + AT91_PMC_SCDR); writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
cpu_do_idle(); cpu_do_idle();
} }
...@@ -417,31 +436,46 @@ static void __init at91_pm_sram_init(void) ...@@ -417,31 +436,46 @@ static void __init at91_pm_sram_init(void)
&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
} }
struct pmc_info {
unsigned long uhp_udp_mask;
};
static const struct pmc_info pmc_infos[] __initconst = {
{ .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP },
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP },
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP },
};
static const struct of_device_id atmel_pmc_ids[] __initconst = { static const struct of_device_id atmel_pmc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-pmc" }, { .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
{ .compatible = "atmel,at91sam9260-pmc" }, { .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9g45-pmc" }, { .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
{ .compatible = "atmel,at91sam9n12-pmc" }, { .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9x5-pmc" }, { .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d3-pmc" }, { .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d2-pmc" }, { .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
{ /* sentinel */ }, { /* sentinel */ },
}; };
static void __init at91_pm_init(void (*pm_idle)(void)) static void __init at91_pm_init(void (*pm_idle)(void))
{ {
struct device_node *pmc_np; struct device_node *pmc_np;
const struct of_device_id *of_id;
const struct pmc_info *pmc;
if (at91_cpuidle_device.dev.platform_data) if (at91_cpuidle_device.dev.platform_data)
platform_device_register(&at91_cpuidle_device); platform_device_register(&at91_cpuidle_device);
pmc_np = of_find_matching_node(NULL, atmel_pmc_ids); pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);
pmc = of_iomap(pmc_np, 0); pm_data.pmc = of_iomap(pmc_np, 0);
if (!pmc) { if (!pm_data.pmc) {
pr_err("AT91: PM not supported, PMC not found\n"); pr_err("AT91: PM not supported, PMC not found\n");
return; return;
} }
pmc = of_id->data;
pm_data.uhp_udp_mask = pmc->uhp_udp_mask;
if (pm_idle) if (pm_idle)
arm_pm_idle = pm_idle; arm_pm_idle = pm_idle;
...@@ -462,40 +496,17 @@ void __init at91rm9200_pm_init(void) ...@@ -462,40 +496,17 @@ void __init at91rm9200_pm_init(void)
*/ */
at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0); at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
at91_pm_data.memctrl = AT91_MEMCTRL_MC;
at91_pm_init(at91rm9200_idle); at91_pm_init(at91rm9200_idle);
} }
void __init at91sam9260_pm_init(void) void __init at91sam9_pm_init(void)
{
at91_dt_ramc();
at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
at91_pm_init(at91sam9_idle);
}
void __init at91sam9g45_pm_init(void)
{
at91_dt_ramc();
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
at91_pm_init(at91sam9_idle);
}
void __init at91sam9x5_pm_init(void)
{ {
at91_dt_ramc(); at91_dt_ramc();
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
at91_pm_init(at91sam9_idle); at91_pm_init(at91sam9_idle);
} }
void __init sama5_pm_init(void) void __init sama5_pm_init(void)
{ {
at91_dt_ramc(); at91_dt_ramc();
at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
at91_pm_init(NULL); at91_pm_init(NULL);
} }
...@@ -17,24 +17,20 @@ ...@@ -17,24 +17,20 @@
#include <soc/at91/at91sam9_ddrsdr.h> #include <soc/at91/at91sam9_ddrsdr.h>
#include <soc/at91/at91sam9_sdramc.h> #include <soc/at91/at91sam9_sdramc.h>
#ifndef __ASSEMBLY__
#define at91_ramc_read(id, field) \
__raw_readl(at91_ramc_base[id] + field)
#define at91_ramc_write(id, field, value) \
__raw_writel(value, at91_ramc_base[id] + field)
#endif
#define AT91_MEMCTRL_MC 0 #define AT91_MEMCTRL_MC 0
#define AT91_MEMCTRL_SDRAMC 1 #define AT91_MEMCTRL_SDRAMC 1
#define AT91_MEMCTRL_DDRSDR 2 #define AT91_MEMCTRL_DDRSDR 2
#define AT91_PM_MEMTYPE_MASK 0x0f
#define AT91_PM_MODE_OFFSET 4
#define AT91_PM_MODE_MASK 0x01
#define AT91_PM_MODE(x) (((x) & AT91_PM_MODE_MASK) << AT91_PM_MODE_OFFSET)
#define AT91_PM_SLOW_CLOCK 0x01 #define AT91_PM_SLOW_CLOCK 0x01
#ifndef __ASSEMBLY__
struct at91_pm_data {
void __iomem *pmc;
void __iomem *ramc[2];
unsigned long uhp_udp_mask;
unsigned int memctrl;
unsigned int mode;
};
#endif
#endif #endif
#include <linux/stddef.h>
#include <linux/kbuild.h>
#include "pm.h"
int main(void)
{
DEFINE(PM_DATA_PMC, offsetof(struct at91_pm_data, pmc));
DEFINE(PM_DATA_RAMC0, offsetof(struct at91_pm_data, ramc[0]));
DEFINE(PM_DATA_RAMC1, offsetof(struct at91_pm_data, ramc[1]));
DEFINE(PM_DATA_MEMCTRL, offsetof(struct at91_pm_data, memctrl));
DEFINE(PM_DATA_MODE, offsetof(struct at91_pm_data, mode));
return 0;
}
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Copyright (C) 2006 Savin Zlobec * Copyright (C) 2006 Savin Zlobec
* *
* AT91SAM9 support: * AT91SAM9 support:
* Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/clk/at91_pmc.h> #include <linux/clk/at91_pmc.h>
#include "pm.h" #include "pm.h"
#include "generated/at91_pm_data-offsets.h"
#define SRAMC_SELF_FRESH_ACTIVE 0x01 #define SRAMC_SELF_FRESH_ACTIVE 0x01
#define SRAMC_SELF_FRESH_EXIT 0x00 #define SRAMC_SELF_FRESH_EXIT 0x00
...@@ -72,13 +73,9 @@ tmp2 .req r5 ...@@ -72,13 +73,9 @@ tmp2 .req r5
.arm .arm
/* /*
* void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *sdramc, * void at91_suspend_sram_fn(struct at91_pm_data*)
* void __iomem *ramc1, int memctrl)
* @input param: * @input param:
* @r0: base address of AT91_PMC * @r0: base address of struct at91_pm_data
* @r1: base address of SDRAM Controller (SDRAM, DDRSDR, or AT91_SYS)
* @r2: base address of second SDRAM Controller or 0 if not present
* @r3: pm information
*/ */
/* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of fncpy() */ /* at91_pm_suspend_in_sram must be 8-byte aligned per the requirements of fncpy() */
.align 3 .align 3
...@@ -90,16 +87,16 @@ ENTRY(at91_pm_suspend_in_sram) ...@@ -90,16 +87,16 @@ ENTRY(at91_pm_suspend_in_sram)
mov tmp1, #0 mov tmp1, #0
mcr p15, 0, tmp1, c7, c10, 4 mcr p15, 0, tmp1, c7, c10, 4
str r0, .pmc_base ldr tmp1, [r0, #PM_DATA_PMC]
str r1, .sramc_base str tmp1, .pmc_base
str r2, .sramc1_base ldr tmp1, [r0, #PM_DATA_RAMC0]
str tmp1, .sramc_base
and r0, r3, #AT91_PM_MEMTYPE_MASK ldr tmp1, [r0, #PM_DATA_RAMC1]
str r0, .memtype str tmp1, .sramc1_base
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
lsr r0, r3, #AT91_PM_MODE_OFFSET str tmp1, .memtype
and r0, r0, #AT91_PM_MODE_MASK ldr tmp1, [r0, #PM_DATA_MODE]
str r0, .pm_mode str tmp1, .pm_mode
/* Active the self-refresh mode */ /* Active the self-refresh mode */
mov r0, #SRAMC_SELF_FRESH_ACTIVE mov r0, #SRAMC_SELF_FRESH_ACTIVE
......
...@@ -15,60 +15,10 @@ ...@@ -15,60 +15,10 @@
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include "generic.h" #include "generic.h"
#include "soc.h"
static const struct at91_soc sama5_socs[] = {
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
"sama5d21", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
"sama5d22", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
"sama5d23", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
"sama5d24", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
"sama5d24", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
"sama5d26", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
"sama5d33", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
"sama5d34", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
"sama5d35", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
"sama5d36", "sama5d3"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
"sama5d41", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
"sama5d42", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
"sama5d43", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
"sama5d44", "sama5d4"),
{ /* sentinel */ },
};
static void __init sama5_dt_device_init(void) static void __init sama5_dt_device_init(void)
{ {
struct soc_device *soc; of_platform_default_populate(NULL, NULL, NULL);
struct device *soc_dev = NULL;
soc = at91_soc_init(sama5_socs);
if (soc != NULL)
soc_dev = soc_device_to_device(soc);
of_platform_default_populate(NULL, NULL, soc_dev);
sama5_pm_init(); sama5_pm_init();
} }
......
menu "SOC (System On Chip) specific Drivers" menu "SOC (System On Chip) specific Drivers"
source "drivers/soc/atmel/Kconfig"
source "drivers/soc/bcm/Kconfig" source "drivers/soc/bcm/Kconfig"
source "drivers/soc/fsl/Kconfig" source "drivers/soc/fsl/Kconfig"
source "drivers/soc/mediatek/Kconfig" source "drivers/soc/mediatek/Kconfig"
......
...@@ -2,6 +2,7 @@ ...@@ -2,6 +2,7 @@
# Makefile for the Linux Kernel SOC specific device drivers. # Makefile for the Linux Kernel SOC specific device drivers.
# #
obj-$(CONFIG_ARCH_AT91) += atmel/
obj-y += bcm/ obj-y += bcm/
obj-$(CONFIG_ARCH_DOVE) += dove/ obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/ obj-$(CONFIG_MACH_DOVE) += dove/
......
config AT91_SOC_ID
bool "SoC bus for Atmel ARM SoCs"
depends on ARCH_AT91 || COMPILE_TEST
default ARCH_AT91
help
Include support for the SoC bus on the Atmel ARM SoCs.
obj-$(CONFIG_AT91_SOC_ID) += soc.o
...@@ -29,6 +29,87 @@ ...@@ -29,6 +29,87 @@
#define AT91_CIDR_EXT BIT(31) #define AT91_CIDR_EXT BIT(31)
#define AT91_CIDR_MATCH_MASK 0x7fffffe0 #define AT91_CIDR_MATCH_MASK 0x7fffffe0
static const struct at91_soc __initconst socs[] = {
#ifdef CONFIG_SOC_AT91RM9200
AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"),
#endif
#ifdef CONFIG_SOC_AT91SAM9
AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
"at91sam9m11", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
"at91sam9m10", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
"at91sam9g46", "at91sam9g45"),
AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
"at91sam9g45", "at91sam9g45"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
"at91sam9g15", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
"at91sam9g35", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
"at91sam9x35", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
"at91sam9g25", "at91sam9x5"),
AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
"at91sam9x25", "at91sam9x5"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
"at91sam9cn12", "at91sam9n12"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
"at91sam9n12", "at91sam9n12"),
AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
"at91sam9cn11", "at91sam9n12"),
AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
#endif
#ifdef CONFIG_SOC_SAMA5
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
"sama5d21", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
"sama5d22", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
"sama5d23", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
"sama5d24", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
"sama5d24", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
"sama5d26", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
"sama5d33", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
"sama5d34", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
"sama5d35", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
"sama5d36", "sama5d3"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
"sama5d41", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
"sama5d42", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
"sama5d43", "sama5d4"),
AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
"sama5d44", "sama5d4"),
#endif
{ /* sentinel */ },
};
static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid) static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
{ {
struct device_node *np; struct device_node *np;
...@@ -140,3 +221,11 @@ struct soc_device * __init at91_soc_init(const struct at91_soc *socs) ...@@ -140,3 +221,11 @@ struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
return soc_dev; return soc_dev;
} }
static int __init atmel_soc_device_init(void)
{
at91_soc_init(socs);
return 0;
}
subsys_initcall(atmel_soc_device_init);
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