Commit 1cca2d2b authored by Wolfgang Ocker's avatar Wolfgang Ocker Committed by Kumar Gala

powerpc/fsl-cpm: Configure clock correctly for SCC

Some board setup functions call cpm1_clk_setup() or cmp2_clk_setup()
to configure the clock source.

If CPM_CLK_RTX has been used for the parameter mode,
the clock has been configured only for TX but not for RX.

With this patch CPM_CLK_RTX configures the clock for both directions
correctly.
Signed-off-by: default avatarWolfgang Ocker <weo@reccoware.de>
Acked-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent e8137341
...@@ -486,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) ...@@ -486,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
return -EINVAL; return -EINVAL;
} }
if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX)
shift += 3;
for (i = 0; i < ARRAY_SIZE(clk_map); i++) { for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
if (clk_map[i][0] == target && clk_map[i][1] == clock) { if (clk_map[i][0] == target && clk_map[i][1] == clock) {
bits = clk_map[i][2]; bits = clk_map[i][2];
...@@ -503,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) ...@@ -503,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
bits <<= shift; bits <<= shift;
mask <<= shift; mask <<= shift;
if (reg == &mpc8xx_immr->im_cpm.cp_sicr) {
if (mode == CPM_CLK_RTX) {
bits |= bits << 3;
mask |= mask << 3;
} else if (mode == CPM_CLK_RX) {
bits <<= 3;
mask <<= 3;
}
}
out_be32(reg, (in_be32(reg) & ~mask) | bits); out_be32(reg, (in_be32(reg) & ~mask) | bits);
return 0; return 0;
......
...@@ -244,9 +244,6 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) ...@@ -244,9 +244,6 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
return -EINVAL; return -EINVAL;
} }
if (mode == CPM_CLK_RX)
shift += 3;
for (i = 0; i < ARRAY_SIZE(clk_map); i++) { for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
if (clk_map[i][0] == target && clk_map[i][1] == clock) { if (clk_map[i][0] == target && clk_map[i][1] == clock) {
bits = clk_map[i][2]; bits = clk_map[i][2];
...@@ -259,6 +256,14 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) ...@@ -259,6 +256,14 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
bits <<= shift; bits <<= shift;
mask <<= shift; mask <<= shift;
if (mode == CPM_CLK_RTX) {
bits |= bits << 3;
mask |= mask << 3;
} else if (mode == CPM_CLK_RX) {
bits <<= 3;
mask <<= 3;
}
out_be32(reg, (in_be32(reg) & ~mask) | bits); out_be32(reg, (in_be32(reg) & ~mask) | bits);
cpm2_unmap(im_cpmux); cpm2_unmap(im_cpmux);
......
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