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Commit 1d47490a authored by Deepak Saxena's avatar Deepak Saxena
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Merge plexity.net:/home/dsaxena/src/linux-2.5-bk 

into plexity.net:/home/dsaxena/src/linux-2.6-for-rmk
parents e6524140 14287c83
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Showing with 2143 additions and 2117 deletions
Documentation/crypto/api-intro.txt
View file @ 1d47490a
......@@ -216,6 +216,7 @@ AES algorithm contributors:
Kyle McMartin
Adam J. Richter
Fruhwirth Clemens (i586)
Linus Torvalds (i586)
CAST5 algorithm contributors:
Kartikey Mahendra Bhatt (original developers unknown, FSF copyright).
......
MAINTAINERS
View file @ 1d47490a
......@@ -1384,7 +1384,7 @@ MEMORY TECHNOLOGY DEVICES
P: David Woodhouse
M: dwmw2@redhat.com
W: http://www.linux-mtd.infradead.org/
L: mtd@infradead.org
L: linux-mtd@lists.infradead.org
S: Maintained
MICROTEK X6 SCANNER
......
arch/arm/boot/compressed/head-clps7500.S
View file @ 1d47490a
......@@ -34,7 +34,7 @@
mov r0, #0x30
mcr p15, 0, r0, c1, c0, 0
mov r0, #0x13
msr cpsr, r0
msr cpsr_cxsf, r0
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
......@@ -71,7 +71,7 @@
/* Ensure all interrupts are off and MMU disabled */
mrs r0, cpsr
orr r0, r0, #0xc0
msr cpsr, r0
msr cpsr_cxsf, r0
adr lr, 1b
orr lr, lr, #0x10000000
......
arch/arm/configs/bast_defconfig
View file @ 1d47490a
......@@ -20,17 +20,24 @@ CONFIG_BROKEN_ON_SMP=y
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=17
# CONFIG_HOTPLUG is not set
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
#
# Loadable module support
......@@ -44,57 +51,32 @@ CONFIG_KMOD=y
#
# System Type
#
# CONFIG_ARCH_ADIFCC is not set
# CONFIG_ARCH_ANAKIN is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_SHARK is not set
CONFIG_ARCH_S3C2410=y
#
# CLPS711X/EP721X Implementations
#
#
# Epxa10db
#
#
# Footbridge Implementations
#
#
# IOP3xx Implementation Options
#
# CONFIG_ARCH_IOP310 is not set
# CONFIG_ARCH_IOP321 is not set
#
# IOP3xx Chipset Features
#
#
# Intel PXA250/210 Implementations
#
#
# SA11x0 Implementations
#
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE_PB is not set
#
# S3C2410 Implementations
#
CONFIG_ARCH_BAST=y
# CONFIG_ARCH_H1940 is not set
# CONFIG_ARCH_SMDK2410 is not set
CONFIG_MACH_VR1000=y
#
# Processor Type
......@@ -119,9 +101,8 @@ CONFIG_CPU_TLB_V4WBI=y
# General setup
#
# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZBOOT_ROM_BSS=0
# CONFIG_HOTPLUG is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
#
# At least one math emulation must be selected
......@@ -129,6 +110,7 @@ CONFIG_ZBOOT_ROM_BSS=0
CONFIG_FPE_NWFPE=y
CONFIG_FPE_NWFPE_XP=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_VFP is not set
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_AOUT=y
# CONFIG_BINFMT_MISC is not set
......@@ -136,9 +118,13 @@ CONFIG_BINFMT_AOUT=y
#
# Generic Driver Options
#
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_PM is not set
# CONFIG_PREEMPT is not set
# CONFIG_ARTHUR is not set
CONFIG_S3C2410_DMA=y
# CONFIG_S3C2410_DMA_DEBUG is not set
CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0"
CONFIG_ALIGNMENT_TRAP=y
......@@ -148,7 +134,6 @@ CONFIG_ALIGNMENT_TRAP=y
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=y
CONFIG_PARPORT_PC_CML1=y
# CONFIG_PARPORT_SERIAL is not set
CONFIG_PARPORT_PC_FIFO=y
CONFIG_PARPORT_PC_SUPERIO=y
# CONFIG_PARPORT_ARC is not set
......@@ -217,7 +202,6 @@ CONFIG_MTD_CFI_INTELEXT=y
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Block devices
......@@ -258,23 +242,21 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
......@@ -290,11 +272,17 @@ CONFIG_IPV6_SCTP__=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
......@@ -315,40 +303,25 @@ CONFIG_NET_ETHERNET=y
#
# Ethernet (10000 Mbit)
#
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
# Token Ring devices
#
# CONFIG_NET_RADIO is not set
# CONFIG_HOSTAP is not set
#
# Token Ring devices
# Wireless LAN (non-hamradio)
#
# CONFIG_SHAPER is not set
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ATA/ATAPI/MFM/RLL support
......@@ -359,9 +332,9 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=m
CONFIG_BLK_DEV_IDEFLOPPY=m
......@@ -371,10 +344,10 @@ CONFIG_BLK_DEV_IDEFLOPPY=m
#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_IDE_BAST=y
CONFIG_IDE_GENERIC=y
# CONFIG_IDE_ARM is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
# CONFIG_BLK_DEV_HD is not set
#
......@@ -382,6 +355,15 @@ CONFIG_BLK_DEV_IDE_BAST=y
#
# CONFIG_SCSI is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
......@@ -389,7 +371,7 @@ CONFIG_BLK_DEV_IDE_BAST=y
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
# CONFIG_ISDN is not set
#
# Input device support
......@@ -405,7 +387,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_TSLIBDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
......@@ -415,7 +396,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PARKBD is not set
......@@ -424,14 +405,15 @@ CONFIG_SERIO_SERPORT=y
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
# CONFIG_MOUSE_PS2_SYNAPTICS is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
......@@ -478,15 +460,40 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_S3C2410=y
CONFIG_SERIAL_S3C2410_CONSOLE=y
# CONFIG_SERIAL_DZ is not set
# CONFIG_SERIAL_BAST_SIO is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_PRINTER=y
# CONFIG_LP_CONSOLE is not set
CONFIG_PPDEV=y
# CONFIG_TIPAR is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# I2C support
......@@ -505,55 +512,44 @@ CONFIG_I2C_ALGOBIT=m
#
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_PHILIPSPAR is not set
# CONFIG_I2C_ISA is not set
# CONFIG_I2C_PARPORT is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_SCx200_ACB is not set
#
# I2C Hardware Sensors Chip support
# Hardware Sensors Chip support
#
CONFIG_I2C_SENSOR=m
# CONFIG_SENSORS_ADM1021 is not set
CONFIG_SENSORS_EEPROM=m
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_IT87 is not set
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_LM78=m
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
CONFIG_SENSORS_LM85=m
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
#
# L3 serial bus support
#
# CONFIG_L3 is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
# Other I2C Chip support
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_SENSORS_EEPROM=m
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_RTC8564 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
#
# Multimedia devices
......@@ -565,11 +561,6 @@ CONFIG_RTC=y
#
# CONFIG_DVB is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# File systems
#
......@@ -603,14 +594,16 @@ CONFIG_ROMFS_FS=y
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
......@@ -623,6 +616,7 @@ CONFIG_RAMFS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
......@@ -650,12 +644,11 @@ CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
......@@ -679,16 +672,15 @@ CONFIG_BSD_DISKLABEL=y
CONFIG_SOLARIS_X86_PARTITION=y
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_NLS=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
......@@ -713,6 +705,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
......@@ -728,6 +721,11 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Graphics support
#
......@@ -748,21 +746,20 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_LOGO is not set
#
# Misc devices
# Sound
#
# CONFIG_SOUND is not set
#
# Multimedia Capabilities Port drivers
# Misc devices
#
# CONFIG_MCP is not set
#
# Console Switches
# USB support
#
# CONFIG_SWITCHES is not set
#
# USB support
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
......@@ -780,7 +777,7 @@ CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_ERRORS is not set
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_PRINTK=y
# CONFIG_DEBUG_ICEDCC is not set
CONFIG_DEBUG_S3C2410_PORT=y
CONFIG_DEBUG_S3C2410_UART=0
......@@ -797,6 +794,8 @@ CONFIG_DEBUG_S3C2410_UART=0
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
arch/arm/kernel/entry-armv.S
View file @ 1d47490a
......@@ -952,7 +952,7 @@ __dabt_svc: sub sp, sp, #S_FRAME_SIZE
bl do_DataAbort
disable_irq r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.align 5
......@@ -988,7 +988,7 @@ preempt_return:
strne r0, [r0, -r0] @ bug()
#endif
ldr r0, [sp, #S_PSR] @ irqs are already disabled
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.ltorg
......@@ -1031,7 +1031,7 @@ __und_svc: sub sp, sp, #S_FRAME_SIZE
1: disable_irq r0
ldr lr, [sp, #S_PSR] @ Get SVC cpsr
msr spsr, lr
msr spsr_cxsf, lr
ldmia sp, {r0 - pc}^ @ Restore SVC registers
.align 5
......@@ -1052,7 +1052,7 @@ __pabt_svc: sub sp, sp, #S_FRAME_SIZE
bl do_PrefetchAbort @ call abort handler
disable_irq r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.align 5
......@@ -1303,7 +1303,7 @@ vector_IRQ: @
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1346,7 +1346,7 @@ vector_data: @
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1390,7 +1390,7 @@ vector_prefetch:
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
ands lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......@@ -1433,7 +1433,7 @@ vector_undefinstr:
mrs r13, cpsr
bic r13, r13, #MODE_MASK
orr r13, r13, #MODE_SVC
msr spsr, r13 @ switch to SVC_32 mode
msr spsr_cxsf, r13 @ switch to SVC_32 mode
and lr, lr, #15
ldr lr, [pc, lr, lsl #2]
......
arch/arm/kernel/entry-common.S
View file @ 1d47490a
......@@ -102,7 +102,7 @@ ENTRY(ret_from_fork)
ldr r0, [sp, #S_PSR] @ Get calling cpsr
sub lr, lr, #4
str lr, [r8]
msr spsr, r0
msr spsr_cxsf, r0
ldmia sp, {r0 - lr}^ @ Get calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC] @ Get PC
......
arch/arm/kernel/entry-header.S
View file @ 1d47490a
......@@ -99,7 +99,7 @@
ldr r1, [sp, #S_PSR] @ Get calling cpsr
disable_irq ip @ disable IRQs
ldr lr, [sp, #S_PC]! @ Get PC
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r0 - lr}^ @ Get calling r0 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......@@ -112,7 +112,7 @@
.macro fast_restore_user_regs
ldr r1, [sp, #S_OFF + S_PSR] @ get calling cpsr
ldr lr, [sp, #S_OFF + S_PC]! @ get pc
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......@@ -125,7 +125,7 @@
.macro slow_restore_user_regs
ldr r1, [sp, #S_PSR] @ get calling cpsr
ldr lr, [sp, #S_PC]! @ get pc
msr spsr, r1 @ save in spsr_svc
msr spsr_cxsf, r1 @ save in spsr_svc
ldmdb sp, {r0 - lr}^ @ get calling r1 - lr
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
......
arch/arm/lib/ecard.S
View file @ 1d47490a
......@@ -16,7 +16,7 @@
#define CPSR2SPSR(rt) \
mrs rt, cpsr; \
msr spsr, rt
msr spsr_cxsf, rt
@ Purpose: call an expansion card loader to read bytes.
@ Proto : char read_loader(int offset, char *card_base, char *loader);
......
arch/arm/mach-s3c2410/Makefile
View file @ 1d47490a
......@@ -4,7 +4,7 @@
# Object file lists.
obj-y := s3c2410.o irq.o time.o
obj-y := s3c2410.o irq.o time.o gpio.o
obj-m :=
obj-n :=
obj- :=
......
arch/arm/mach-s3c2410/gpio.c 0 → 100644
View file @ 1d47490a
/* linux/arch/arm/mach-s3c2410/gpio.c
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 GPIO support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/arch/regs-gpio.h>
void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long shift = 1;
unsigned long mask = 3;
unsigned long con;
unsigned long flags;
if (pin < S3C2410_GPIO_BANKB) {
shift = 0;
mask = 1;
}
mask <<= S3C2410_GPIO_OFFSET(pin);
local_irq_save(flags);
con = __raw_readl(base + 0x00);
con &= mask << shift;
con |= function;
__raw_writel(con, base + 0x00);
local_irq_restore(flags);
}
void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long up;
if (pin < S3C2410_GPIO_BANKB)
return;
local_irq_save(flags);
up = __raw_readl(base + 0x08);
up &= 1 << offs;
up |= to << offs;
__raw_writel(up, base + 0x08);
local_irq_restore(flags);
}
void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
{
unsigned long base = S3C2410_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long dat;
local_irq_save(flags);
dat = __raw_readl(base + 0x04);
dat &= 1 << offs;
dat |= to << offs;
__raw_writel(dat, base + 0x04);
local_irq_restore(flags);
}
arch/arm/mach-s3c2410/mach-h1940.c
View file @ 1d47490a
......@@ -52,7 +52,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[0] = {
.hwport = 0,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
......@@ -60,7 +60,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[1] = {
.hwport = 1,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x245,
.ulcon = 0x03,
.ufcon = 0x00,
......@@ -69,7 +69,7 @@ static struct s3c2410_uartcfg ipaq_uartcfgs[] = {
[2] = {
.hwport = 2,
.flags = 0,
.clock = &s3c2410_hclk,
.clock = &s3c2410_pclk,
.ucon = 0x3c5,
.ulcon = 0x43,
.ufcon = 0x51,
......
arch/arm/mach-s3c2410/s3c2410.h
View file @ 1d47490a
......@@ -4,5 +4,5 @@ extern void s3c2410_map_io(struct map_desc *, int count);
extern void s3c2410_init_irq(void);
extern s3c2410_init_time(void);
extern void s3c2410_init_time(void);
arch/arm/mach-sa1100/collie.c
View file @ 1d47490a
......@@ -141,4 +141,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
MAPIO(collie_map_io)
INITIRQ(sa1100_init_irq)
INIT_MACHINE(collie_init)
INITTIME(sa1100_init_time)
MACHINE_END
arch/arm/mm/blockops.c
View file @ 1d47490a
......@@ -130,6 +130,7 @@ static struct undef_hook blockops_hook __initdata = {
static int __init blockops_check(void)
{
register unsigned int err asm("r4") = 0;
unsigned int err_pos = 1;
unsigned int cache_type;
int i;
......@@ -156,8 +157,8 @@ static int __init blockops_check(void)
unregister_undef_hook(&blockops_hook);
for (i = 0; i < ARRAY_SIZE(func); i++, err >>= 1)
printk("%30s: %ssupported\n", func[i], err & 1 ? "not " : "");
for (i = 0; i < ARRAY_SIZE(func); i++, err_pos <<= 1)
printk("%30s: %ssupported\n", func[i], err & err_pos ? "not " : "");
if ((err & 8) == 0) {
printk(" --> Using %s block cache invalidate\n",
......
arch/i386/crypto/Makefile
View file @ 1d47490a
......@@ -6,4 +6,4 @@
obj-$(CONFIG_CRYPTO_AES_586) += aes-i586.o
aes-i586-y := aes-i586-asm.o aes-i586-glue.o
aes-i586-y := aes-i586-asm.o aes.o
arch/i386/crypto/aes-i586-asm.S
View file @ 1d47490a
// Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.
// -------------------------------------------------------------------------
// Copyright (c) 2001, Dr Brian Gladman < >, Worcester, UK.
// All rights reserved.
//
// TERMS
// LICENSE TERMS
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted subject to the following conditions:
// The free distribution and use of this software in both source and binary
// form is allowed (with or without changes) provided that:
//
// 1. Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// 1. distributions of this source code include the above copyright
// notice, this list of conditions and the following disclaimer//
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
// 2. distributions in binary form include the above copyright
// notice, this list of conditions and the following disclaimer
// in the documentation and/or other associated materials//
//
// 3. the copyright holder's name is not used to endorse products
// built using this software without specific written permission.
//
// 3. The copyright holder's name must not be used to endorse or promote
// any products derived from this software without his specific prior
// written permission.
//
// ALTERNATIVELY, provided that this notice is retained in full, this product
// may be distributed under the terms of the GNU General Public License (GPL),
// in which case the provisions of the GPL apply INSTEAD OF those given above.
//
// This software is provided 'as is' with no express or implied warranties
// of correctness or fitness for purpose.
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 of the License, or (at your option)
// any later version.
// Modified by Jari Ruusu, December 24 2001
// - Converted syntax to GNU CPP/assembler syntax
// - C programming interface converted back to "old" API
// - Minor portability cleanups and speed optimizations
// Modified by Jari Ruusu, April 11 2002
// - Added above copyright and terms to resulting object code so that
// binary distributions can avoid legal trouble
// Copyright (c) 2004 Linus Torvalds <torvalds@osdl.org>
// Copyright (c) 2004 Red Hat, Inc., James Morris <jmorris@redhat.com>
// Modified by Clemens Fruhwirth, Feb 04 2003
// - Switched in/out to fit CryptoAPI calls.
// Modified by James Morris, July 31 2004
// - Added alternate GPL licensing clause with permission from Dr Gladman.
// An AES (Rijndael) implementation for the Pentium. This version only
// implements the standard AES block length (128 bits, 16 bytes). This code
// does not preserve the eax, ecx or edx registers or the artihmetic status
// flags. However, the ebx, esi, edi, and ebp registers are preserved across
// calls.
// void aes_set_key(aes_context *cx, const unsigned char key[], const int key_len, const int f)
// void aes_encrypt(const aes_context *cx, unsigned char out_blk[], const unsigned char in_blk[])
// void aes_decrypt(const aes_context *cx, unsigned char out_blk[], const unsigned char in_blk[])
// DISCLAIMER
//
// This software is provided 'as is' with no explicit or implied warranties
// in respect of its properties including, but not limited to, correctness
// and fitness for purpose.
// -------------------------------------------------------------------------
// Issue Date: 29/07/2002
# define ALIGN32BYTES 32
.file "aes-i586-asm.S"
.text
.file "aes-i586.S"
.globl aes_set_key
.globl aes_encrypt
.globl aes_decrypt
// aes_rval aes_enc_blk(const unsigned char in_blk[], unsigned char out_blk[], const aes_ctx cx[1])//
// aes_rval aes_dec_blk(const unsigned char in_blk[], unsigned char out_blk[], const aes_ctx cx[1])//
#define tlen 1024 // length of each of 4 'xor' arrays (256 32-bit words)
// offsets to parameters with one register pushed onto stack
#define ctx 8 // AES context structure
#define in_blk 8 // input byte array address parameter
#define out_blk 12 // output byte array address parameter
#define in_blk 16 // input byte array address parameter
#define ctx 16 // AES context structure
// offsets in context structure
#define nkey 0 // key length, size 4
#define nrnd 4 // number of rounds, size 4
#define ekey 8 // encryption key schedule base address, size 256
#define dkey 264 // decryption key schedule base address, size 256
#define ekey 0 // encryption key schedule base address
#define nrnd 256 // number of rounds
#define dkey 260 // decryption key schedule base address
// register mapping for encrypt and decrypt subroutines
#define r0 eax
#define r1 ebx
#define r2 ecx
#define r3 edx
#define r4 esi
#define r5 edi
#define r6 ebp
#define eaxl al
#define eaxh ah
#define ebxl bl
#define ebxh bh
#define ecxl cl
#define ecxh ch
#define edxl dl
#define edxh dh
#define _h(reg) reg##h
#define h(reg) _h(reg)
#define _l(reg) reg##l
#define l(reg) _l(reg)
// This macro takes a 32-bit word representing a column and uses
// each of its four bytes to index into four tables of 256 32-bit
// words to obtain values that are then xored into the appropriate
// output registers r0, r1, r4 or r5.
// Parameters:
// %1 out_state[0]
// %2 out_state[1]
// %3 out_state[2]
// %4 out_state[3]
// %5 table base address
// %6 input register for the round (destroyed)
// %7 scratch register for the round
#define do_col(a1, a2, a3, a4, a5, a6, a7) \
movzx %l(a6),%a7; \
xor a5(,%a7,4),%a1; \
movzx %h(a6),%a7; \
shr $16,%a6; \
xor a5+tlen(,%a7,4),%a2; \
movzx %l(a6),%a7; \
movzx %h(a6),%a6; \
xor a5+2*tlen(,%a7,4),%a3; \
xor a5+3*tlen(,%a6,4),%a4;
// initialise output registers from the key schedule
#define do_fcol(a1, a2, a3, a4, a5, a6, a7, a8) \
mov 0 a8,%a1; \
movzx %l(a6),%a7; \
mov 12 a8,%a2; \
xor a5(,%a7,4),%a1; \
mov 4 a8,%a4; \
movzx %h(a6),%a7; \
shr $16,%a6; \
xor a5+tlen(,%a7,4),%a2; \
movzx %l(a6),%a7; \
movzx %h(a6),%a6; \
xor a5+3*tlen(,%a6,4),%a4; \
mov %a3,%a6; \
mov 8 a8,%a3; \
xor a5+2*tlen(,%a7,4),%a3;
// initialise output registers from the key schedule
#define do_icol(a1, a2, a3, a4, a5, a6, a7, a8) \
mov 0 a8,%a1; \
movzx %l(a6),%a7; \
mov 4 a8,%a2; \
xor a5(,%a7,4),%a1; \
mov 12 a8,%a4; \
movzx %h(a6),%a7; \
shr $16,%a6; \
xor a5+tlen(,%a7,4),%a2; \
movzx %l(a6),%a7; \
movzx %h(a6),%a6; \
xor a5+3*tlen(,%a6,4),%a4; \
mov %a3,%a6; \
mov 8 a8,%a3; \
xor a5+2*tlen(,%a7,4),%a3;
// original Gladman had conditional saves to MMX regs.
#define save(a1, a2) \
mov %a2,4*a1(%esp)
#define restore(a1, a2) \
mov 4*a2(%esp),%a1
// This macro performs a forward encryption cycle. It is entered with
// the first previous round column values in %eax, %ebx, %esi and %edi and
// exits with the final values in the same registers.
#define fwd_rnd(p1,p2) \
mov %ebx,(%esp) ;\
movzbl %al,%edx ;\
mov %eax,%ecx ;\
mov p2(%ebp),%eax ;\
mov %edi,4(%esp) ;\
mov p2+12(%ebp),%edi ;\
xor p1(,%edx,4),%eax ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
mov p2+4(%ebp),%ebx ;\
xor p1+tlen(,%edx,4),%edi ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+3*tlen(,%ecx,4),%ebx ;\
mov %esi,%ecx ;\
mov p1+2*tlen(,%edx,4),%esi ;\
movzbl %cl,%edx ;\
xor p1(,%edx,4),%esi ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
xor p1+tlen(,%edx,4),%ebx ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+2*tlen(,%edx,4),%eax ;\
mov (%esp),%edx ;\
xor p1+3*tlen(,%ecx,4),%edi ;\
movzbl %dl,%ecx ;\
xor p2+8(%ebp),%esi ;\
xor p1(,%ecx,4),%ebx ;\
movzbl %dh,%ecx ;\
shr $16,%edx ;\
xor p1+tlen(,%ecx,4),%eax ;\
movzbl %dl,%ecx ;\
movzbl %dh,%edx ;\
xor p1+2*tlen(,%ecx,4),%edi ;\
mov 4(%esp),%ecx ;\
xor p1+3*tlen(,%edx,4),%esi ;\
movzbl %cl,%edx ;\
xor p1(,%edx,4),%edi ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
xor p1+tlen(,%edx,4),%esi ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+2*tlen(,%edx,4),%ebx ;\
xor p1+3*tlen(,%ecx,4),%eax
// the first previous round column values in r0, r1, r4 and r5 and
// exits with the final values in the same registers, using the MMX
// registers mm0-mm1 or the stack for temporary storage
// mov current column values into the MMX registers
#define fwd_rnd(arg, table) \
/* mov current column values into the MMX registers */ \
mov %r0,%r2; \
save (0,r1); \
save (1,r5); \
\
/* compute new column values */ \
do_fcol(r0,r5,r4,r1,table, r2,r3, arg); \
do_col (r4,r1,r0,r5,table, r2,r3); \
restore(r2,0); \
do_col (r1,r0,r5,r4,table, r2,r3); \
restore(r2,1); \
do_col (r5,r4,r1,r0,table, r2,r3);
// This macro performs an inverse encryption cycle. It is entered with
// the first previous round column values in %eax, %ebx, %esi and %edi and
// exits with the final values in the same registers.
#define inv_rnd(p1,p2) \
movzbl %al,%edx ;\
mov %ebx,(%esp) ;\
mov %eax,%ecx ;\
mov p2(%ebp),%eax ;\
mov %edi,4(%esp) ;\
mov p2+4(%ebp),%ebx ;\
xor p1(,%edx,4),%eax ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
mov p2+12(%ebp),%edi ;\
xor p1+tlen(,%edx,4),%ebx ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+3*tlen(,%ecx,4),%edi ;\
mov %esi,%ecx ;\
mov p1+2*tlen(,%edx,4),%esi ;\
movzbl %cl,%edx ;\
xor p1(,%edx,4),%esi ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
xor p1+tlen(,%edx,4),%edi ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+2*tlen(,%edx,4),%eax ;\
mov (%esp),%edx ;\
xor p1+3*tlen(,%ecx,4),%ebx ;\
movzbl %dl,%ecx ;\
xor p2+8(%ebp),%esi ;\
xor p1(,%ecx,4),%ebx ;\
movzbl %dh,%ecx ;\
shr $16,%edx ;\
xor p1+tlen(,%ecx,4),%esi ;\
movzbl %dl,%ecx ;\
movzbl %dh,%edx ;\
xor p1+2*tlen(,%ecx,4),%edi ;\
mov 4(%esp),%ecx ;\
xor p1+3*tlen(,%edx,4),%eax ;\
movzbl %cl,%edx ;\
xor p1(,%edx,4),%edi ;\
movzbl %ch,%edx ;\
shr $16,%ecx ;\
xor p1+tlen(,%edx,4),%eax ;\
movzbl %cl,%edx ;\
movzbl %ch,%ecx ;\
xor p1+2*tlen(,%edx,4),%ebx ;\
xor p1+3*tlen(,%ecx,4),%esi
// the first previous round column values in r0, r1, r4 and r5 and
// exits with the final values in the same registers, using the MMX
// registers mm0-mm1 or the stack for temporary storage
#define inv_rnd(arg, table) \
/* mov current column values into the MMX registers */ \
mov %r0,%r2; \
save (0,r1); \
save (1,r5); \
\
/* compute new column values */ \
do_icol(r0,r1,r4,r5, table, r2,r3, arg); \
do_col (r4,r5,r0,r1, table, r2,r3); \
restore(r2,0); \
do_col (r1,r4,r5,r0, table, r2,r3); \
restore(r2,1); \
do_col (r5,r0,r1,r4, table, r2,r3);
// AES (Rijndael) Encryption Subroutine
.text
.align ALIGN32BYTES
aes_encrypt:
.global aes_enc_blk
.extern ft_tab
.extern fl_tab
.align 4
aes_enc_blk:
push %ebp
mov ctx(%esp),%ebp // pointer to context
mov in_blk(%esp),%ecx
push %ebx
xor %eax,%eax
// CAUTION: the order and the values used in these assigns
// rely on the register mappings
1: push %ebx
mov in_blk+4(%esp),%r2
push %esi
mov nrnd(%ebp),%r3 // number of rounds
push %edi
mov nrnd(%ebp),%edx // number of rounds
lea ekey+16(%ebp),%ebp // key pointer
lea ekey(%ebp),%r6 // key pointer
// input four columns and xor in first round key
mov (%ecx),%eax
mov 4(%ecx),%ebx
mov 8(%ecx),%esi
mov 12(%ecx),%edi
xor -16(%ebp),%eax
xor -12(%ebp),%ebx
xor -8(%ebp),%esi
xor -4(%ebp),%edi
mov (%r2),%r0
mov 4(%r2),%r1
mov 8(%r2),%r4
mov 12(%r2),%r5
xor (%r6),%r0
xor 4(%r6),%r1
xor 8(%r6),%r4
xor 12(%r6),%r5
sub $8,%esp // space for register saves on stack
add $16,%r6 // increment to next round key
sub $10,%r3
je 4f // 10 rounds for 128-bit key
add $32,%r6
sub $2,%r3
je 3f // 12 rounds for 128-bit key
add $32,%r6
2: fwd_rnd( -64(%r6) ,ft_tab) // 14 rounds for 128-bit key
fwd_rnd( -48(%r6) ,ft_tab)
3: fwd_rnd( -32(%r6) ,ft_tab) // 12 rounds for 128-bit key
fwd_rnd( -16(%r6) ,ft_tab)
4: fwd_rnd( (%r6) ,ft_tab) // 10 rounds for 128-bit key
fwd_rnd( +16(%r6) ,ft_tab)
fwd_rnd( +32(%r6) ,ft_tab)
fwd_rnd( +48(%r6) ,ft_tab)
fwd_rnd( +64(%r6) ,ft_tab)
fwd_rnd( +80(%r6) ,ft_tab)
fwd_rnd( +96(%r6) ,ft_tab)
fwd_rnd(+112(%r6) ,ft_tab)
fwd_rnd(+128(%r6) ,ft_tab)
fwd_rnd(+144(%r6) ,fl_tab) // last round uses a different table
// move final values to the output array. CAUTION: the
// order of these assigns rely on the register mappings
sub $10,%edx
je aes_15
add $32,%ebp
sub $2,%edx
je aes_13
add $32,%ebp
fwd_rnd(aes_ft_tab,-64) // 14 rounds for 256-bit key
fwd_rnd(aes_ft_tab,-48)
aes_13: fwd_rnd(aes_ft_tab,-32) // 12 rounds for 192-bit key
fwd_rnd(aes_ft_tab,-16)
aes_15: fwd_rnd(aes_ft_tab,0) // 10 rounds for 128-bit key
fwd_rnd(aes_ft_tab,16)
fwd_rnd(aes_ft_tab,32)
fwd_rnd(aes_ft_tab,48)
fwd_rnd(aes_ft_tab,64)
fwd_rnd(aes_ft_tab,80)
fwd_rnd(aes_ft_tab,96)
fwd_rnd(aes_ft_tab,112)
fwd_rnd(aes_ft_tab,128)
fwd_rnd(aes_fl_tab,144) // last round uses a different table
// move final values to the output array.
mov out_blk+20(%esp),%ebp
add $8,%esp
mov %eax,(%ebp)
mov %ebx,4(%ebp)
mov %esi,8(%ebp)
mov %edi,12(%ebp)
mov out_blk+12(%esp),%r6
mov %r5,12(%r6)
pop %edi
mov %r4,8(%r6)
pop %esi
mov %r1,4(%r6)
pop %ebx
mov %r0,(%r6)
pop %ebp
mov $1,%eax
ret
// AES (Rijndael) Decryption Subroutine
.align ALIGN32BYTES
aes_decrypt:
.global aes_dec_blk
.extern it_tab
.extern il_tab
.align 4
aes_dec_blk:
push %ebp
mov ctx(%esp),%ebp // pointer to context
mov in_blk(%esp),%ecx
push %ebx
xor %eax,%eax
// CAUTION: the order and the values used in these assigns
// rely on the register mappings
1: push %ebx
mov in_blk+4(%esp),%r2
push %esi
mov nrnd(%ebp),%r3 // number of rounds
push %edi
mov nrnd(%ebp),%edx // number of rounds
lea dkey+16(%ebp),%ebp // key pointer
lea dkey(%ebp),%r6 // key pointer
mov %r3,%r0
shl $4,%r0
add %r0,%r6
// input four columns and xor in first round key
mov (%ecx),%eax
mov 4(%ecx),%ebx
mov 8(%ecx),%esi
mov 12(%ecx),%edi
xor -16(%ebp),%eax
xor -12(%ebp),%ebx
xor -8(%ebp),%esi
xor -4(%ebp),%edi
mov (%r2),%r0
mov 4(%r2),%r1
mov 8(%r2),%r4
mov 12(%r2),%r5
xor (%r6),%r0
xor 4(%r6),%r1
xor 8(%r6),%r4
xor 12(%r6),%r5
sub $8,%esp // space for register saves on stack
sub $16,%r6 // increment to next round key
sub $10,%r3
je 4f // 10 rounds for 128-bit key
sub $32,%r6
sub $2,%r3
je 3f // 12 rounds for 128-bit key
sub $32,%r6
2: inv_rnd( +64(%r6), it_tab) // 14 rounds for 128-bit key
inv_rnd( +48(%r6), it_tab)
3: inv_rnd( +32(%r6), it_tab) // 12 rounds for 128-bit key
inv_rnd( +16(%r6), it_tab)
4: inv_rnd( (%r6), it_tab) // 10 rounds for 128-bit key
inv_rnd( -16(%r6), it_tab)
inv_rnd( -32(%r6), it_tab)
inv_rnd( -48(%r6), it_tab)
inv_rnd( -64(%r6), it_tab)
inv_rnd( -80(%r6), it_tab)
inv_rnd( -96(%r6), it_tab)
inv_rnd(-112(%r6), it_tab)
inv_rnd(-128(%r6), it_tab)
inv_rnd(-144(%r6), il_tab) // last round uses a different table
// move final values to the output array. CAUTION: the
// order of these assigns rely on the register mappings
sub $10,%edx
je aes_25
add $32,%ebp
sub $2,%edx
je aes_23
add $32,%ebp
inv_rnd(aes_it_tab,-64) // 14 rounds for 256-bit key
inv_rnd(aes_it_tab,-48)
aes_23: inv_rnd(aes_it_tab,-32) // 12 rounds for 192-bit key
inv_rnd(aes_it_tab,-16)
aes_25: inv_rnd(aes_it_tab,0) // 10 rounds for 128-bit key
inv_rnd(aes_it_tab,16)
inv_rnd(aes_it_tab,32)
inv_rnd(aes_it_tab,48)
inv_rnd(aes_it_tab,64)
inv_rnd(aes_it_tab,80)
inv_rnd(aes_it_tab,96)
inv_rnd(aes_it_tab,112)
inv_rnd(aes_it_tab,128)
inv_rnd(aes_il_tab,144) // last round uses a different table
// move final values to the output array.
mov out_blk+20(%esp),%ebp
add $8,%esp
mov %eax,(%ebp)
mov %ebx,4(%ebp)
mov %esi,8(%ebp)
mov %edi,12(%ebp)
mov out_blk+12(%esp),%r6
mov %r5,12(%r6)
pop %edi
mov %r4,8(%r6)
pop %esi
mov %r1,4(%r6)
pop %ebx
mov %r0,(%r6)
pop %ebp
mov $1,%eax
ret
// AES (Rijndael) Key Schedule Subroutine
// input/output parameters
#define aes_cx 12 // AES context
#define in_key 16 // key input array address
#define key_ln 20 // key length, bytes (16,24,32) or bits (128,192,256)
#define ed_flg 24 // 0=create both encr/decr keys, 1=create encr key only
// offsets for locals
#define cnt -4
#define kpf -8
#define slen 8
// This macro performs a column mixing operation on an input 32-bit
// word to give a 32-bit result. It uses each of the 4 bytes in the
// the input column to index 4 different tables of 256 32-bit words
// that are xored together to form the output value.
#define mix_col(p1) \
movzbl %bl,%ecx ;\
mov p1(,%ecx,4),%eax ;\
movzbl %bh,%ecx ;\
ror $16,%ebx ;\
xor p1+tlen(,%ecx,4),%eax ;\
movzbl %bl,%ecx ;\
xor p1+2*tlen(,%ecx,4),%eax ;\
movzbl %bh,%ecx ;\
xor p1+3*tlen(,%ecx,4),%eax
// Key Schedule Macros
#define ksc4(p1) \
rol $24,%ebx ;\
mix_col(aes_fl_tab) ;\
ror $8,%ebx ;\
xor 4*p1+aes_rcon_tab,%eax ;\
xor %eax,%esi ;\
xor %esi,%ebp ;\
mov %esi,16*p1(%edi) ;\
mov %ebp,16*p1+4(%edi) ;\
xor %ebp,%edx ;\
xor %edx,%ebx ;\
mov %edx,16*p1+8(%edi) ;\
mov %ebx,16*p1+12(%edi)
#define ksc6(p1) \
rol $24,%ebx ;\
mix_col(aes_fl_tab) ;\
ror $8,%ebx ;\
xor 4*p1+aes_rcon_tab,%eax ;\
xor 24*p1-24(%edi),%eax ;\
mov %eax,24*p1(%edi) ;\
xor 24*p1-20(%edi),%eax ;\
mov %eax,24*p1+4(%edi) ;\
xor %eax,%esi ;\
xor %esi,%ebp ;\
mov %esi,24*p1+8(%edi) ;\
mov %ebp,24*p1+12(%edi) ;\
xor %ebp,%edx ;\
xor %edx,%ebx ;\
mov %edx,24*p1+16(%edi) ;\
mov %ebx,24*p1+20(%edi)
#define ksc8(p1) \
rol $24,%ebx ;\
mix_col(aes_fl_tab) ;\
ror $8,%ebx ;\
xor 4*p1+aes_rcon_tab,%eax ;\
xor 32*p1-32(%edi),%eax ;\
mov %eax,32*p1(%edi) ;\
xor 32*p1-28(%edi),%eax ;\
mov %eax,32*p1+4(%edi) ;\
xor 32*p1-24(%edi),%eax ;\
mov %eax,32*p1+8(%edi) ;\
xor 32*p1-20(%edi),%eax ;\
mov %eax,32*p1+12(%edi) ;\
push %ebx ;\
mov %eax,%ebx ;\
mix_col(aes_fl_tab) ;\
pop %ebx ;\
xor %eax,%esi ;\
xor %esi,%ebp ;\
mov %esi,32*p1+16(%edi) ;\
mov %ebp,32*p1+20(%edi) ;\
xor %ebp,%edx ;\
xor %edx,%ebx ;\
mov %edx,32*p1+24(%edi) ;\
mov %ebx,32*p1+28(%edi)
.align ALIGN32BYTES
aes_set_key:
pushfl
push %ebp
mov %esp,%ebp
sub $slen,%esp
push %ebx
push %esi
push %edi
mov aes_cx(%ebp),%edx // edx -> AES context
mov key_ln(%ebp),%ecx // key length
cmpl $128,%ecx
jb aes_30
shr $3,%ecx
aes_30: cmpl $32,%ecx
je aes_32
cmpl $24,%ecx
je aes_32
mov $16,%ecx
aes_32: shr $2,%ecx
mov %ecx,nkey(%edx)
lea 6(%ecx),%eax // 10/12/14 for 4/6/8 32-bit key length
mov %eax,nrnd(%edx)
mov in_key(%ebp),%esi // key input array
lea ekey(%edx),%edi // key position in AES context
cld
push %ebp
mov %ecx,%eax // save key length in eax
rep ; movsl // words in the key schedule
mov -4(%esi),%ebx // put some values in registers
mov -8(%esi),%edx // to allow faster code
mov -12(%esi),%ebp
mov -16(%esi),%esi
cmpl $4,%eax // jump on key size
je aes_36
cmpl $6,%eax
je aes_35
ksc8(0)
ksc8(1)
ksc8(2)
ksc8(3)
ksc8(4)
ksc8(5)
ksc8(6)
jmp aes_37
aes_35: ksc6(0)
ksc6(1)
ksc6(2)
ksc6(3)
ksc6(4)
ksc6(5)
ksc6(6)
ksc6(7)
jmp aes_37
aes_36: ksc4(0)
ksc4(1)
ksc4(2)
ksc4(3)
ksc4(4)
ksc4(5)
ksc4(6)
ksc4(7)
ksc4(8)
ksc4(9)
aes_37: pop %ebp
mov aes_cx(%ebp),%edx // edx -> AES context
cmpl $0,ed_flg(%ebp)
jne aes_39
// compile decryption key schedule from encryption schedule - reverse
// order and do mix_column operation on round keys except first and last
mov nrnd(%edx),%eax // kt = cx->d_key + nc * cx->Nrnd
shl $2,%eax
lea dkey(%edx,%eax,4),%edi
lea ekey(%edx),%esi // kf = cx->e_key
movsl // copy first round key (unmodified)
movsl
movsl
movsl
sub $32,%edi
movl $1,cnt(%ebp)
aes_38: // do mix column on each column of
lodsl // each round key
mov %eax,%ebx
mix_col(aes_im_tab)
stosl
lodsl
mov %eax,%ebx
mix_col(aes_im_tab)
stosl
lodsl
mov %eax,%ebx
mix_col(aes_im_tab)
stosl
lodsl
mov %eax,%ebx
mix_col(aes_im_tab)
stosl
sub $32,%edi
incl cnt(%ebp)
mov cnt(%ebp),%eax
cmp nrnd(%edx),%eax
jb aes_38
movsl // copy last round key (unmodified)
movsl
movsl
movsl
aes_39: pop %edi
pop %esi
pop %ebx
mov %ebp,%esp
pop %ebp
popfl
ret
// finite field multiplies by {02}, {04} and {08}
#define f2(x) ((x<<1)^(((x>>7)&1)*0x11b))
#define f4(x) ((x<<2)^(((x>>6)&1)*0x11b)^(((x>>6)&2)*0x11b))
#define f8(x) ((x<<3)^(((x>>5)&1)*0x11b)^(((x>>5)&2)*0x11b)^(((x>>5)&4)*0x11b))
// finite field multiplies required in table generation
#define f3(x) (f2(x) ^ x)
#define f9(x) (f8(x) ^ x)
#define fb(x) (f8(x) ^ f2(x) ^ x)
#define fd(x) (f8(x) ^ f4(x) ^ x)
#define fe(x) (f8(x) ^ f4(x) ^ f2(x))
// These defines generate the forward table entries
#define u0(x) ((f3(x) << 24) | (x << 16) | (x << 8) | f2(x))
#define u1(x) ((x << 24) | (x << 16) | (f2(x) << 8) | f3(x))
#define u2(x) ((x << 24) | (f2(x) << 16) | (f3(x) << 8) | x)
#define u3(x) ((f2(x) << 24) | (f3(x) << 16) | (x << 8) | x)
// These defines generate the inverse table entries
#define v0(x) ((fb(x) << 24) | (fd(x) << 16) | (f9(x) << 8) | fe(x))
#define v1(x) ((fd(x) << 24) | (f9(x) << 16) | (fe(x) << 8) | fb(x))
#define v2(x) ((f9(x) << 24) | (fe(x) << 16) | (fb(x) << 8) | fd(x))
#define v3(x) ((fe(x) << 24) | (fb(x) << 16) | (fd(x) << 8) | f9(x))
// These defines generate entries for the last round tables
#define w0(x) (x)
#define w1(x) (x << 8)
#define w2(x) (x << 16)
#define w3(x) (x << 24)
// macro to generate inverse mix column tables (needed for the key schedule)
#define im_data0(p1) \
.long p1(0x00),p1(0x01),p1(0x02),p1(0x03),p1(0x04),p1(0x05),p1(0x06),p1(0x07) ;\
.long p1(0x08),p1(0x09),p1(0x0a),p1(0x0b),p1(0x0c),p1(0x0d),p1(0x0e),p1(0x0f) ;\
.long p1(0x10),p1(0x11),p1(0x12),p1(0x13),p1(0x14),p1(0x15),p1(0x16),p1(0x17) ;\
.long p1(0x18),p1(0x19),p1(0x1a),p1(0x1b),p1(0x1c),p1(0x1d),p1(0x1e),p1(0x1f)
#define im_data1(p1) \
.long p1(0x20),p1(0x21),p1(0x22),p1(0x23),p1(0x24),p1(0x25),p1(0x26),p1(0x27) ;\
.long p1(0x28),p1(0x29),p1(0x2a),p1(0x2b),p1(0x2c),p1(0x2d),p1(0x2e),p1(0x2f) ;\
.long p1(0x30),p1(0x31),p1(0x32),p1(0x33),p1(0x34),p1(0x35),p1(0x36),p1(0x37) ;\
.long p1(0x38),p1(0x39),p1(0x3a),p1(0x3b),p1(0x3c),p1(0x3d),p1(0x3e),p1(0x3f)
#define im_data2(p1) \
.long p1(0x40),p1(0x41),p1(0x42),p1(0x43),p1(0x44),p1(0x45),p1(0x46),p1(0x47) ;\
.long p1(0x48),p1(0x49),p1(0x4a),p1(0x4b),p1(0x4c),p1(0x4d),p1(0x4e),p1(0x4f) ;\
.long p1(0x50),p1(0x51),p1(0x52),p1(0x53),p1(0x54),p1(0x55),p1(0x56),p1(0x57) ;\
.long p1(0x58),p1(0x59),p1(0x5a),p1(0x5b),p1(0x5c),p1(0x5d),p1(0x5e),p1(0x5f)
#define im_data3(p1) \
.long p1(0x60),p1(0x61),p1(0x62),p1(0x63),p1(0x64),p1(0x65),p1(0x66),p1(0x67) ;\
.long p1(0x68),p1(0x69),p1(0x6a),p1(0x6b),p1(0x6c),p1(0x6d),p1(0x6e),p1(0x6f) ;\
.long p1(0x70),p1(0x71),p1(0x72),p1(0x73),p1(0x74),p1(0x75),p1(0x76),p1(0x77) ;\
.long p1(0x78),p1(0x79),p1(0x7a),p1(0x7b),p1(0x7c),p1(0x7d),p1(0x7e),p1(0x7f)
#define im_data4(p1) \
.long p1(0x80),p1(0x81),p1(0x82),p1(0x83),p1(0x84),p1(0x85),p1(0x86),p1(0x87) ;\
.long p1(0x88),p1(0x89),p1(0x8a),p1(0x8b),p1(0x8c),p1(0x8d),p1(0x8e),p1(0x8f) ;\
.long p1(0x90),p1(0x91),p1(0x92),p1(0x93),p1(0x94),p1(0x95),p1(0x96),p1(0x97) ;\
.long p1(0x98),p1(0x99),p1(0x9a),p1(0x9b),p1(0x9c),p1(0x9d),p1(0x9e),p1(0x9f)
#define im_data5(p1) \
.long p1(0xa0),p1(0xa1),p1(0xa2),p1(0xa3),p1(0xa4),p1(0xa5),p1(0xa6),p1(0xa7) ;\
.long p1(0xa8),p1(0xa9),p1(0xaa),p1(0xab),p1(0xac),p1(0xad),p1(0xae),p1(0xaf) ;\
.long p1(0xb0),p1(0xb1),p1(0xb2),p1(0xb3),p1(0xb4),p1(0xb5),p1(0xb6),p1(0xb7) ;\
.long p1(0xb8),p1(0xb9),p1(0xba),p1(0xbb),p1(0xbc),p1(0xbd),p1(0xbe),p1(0xbf)
#define im_data6(p1) \
.long p1(0xc0),p1(0xc1),p1(0xc2),p1(0xc3),p1(0xc4),p1(0xc5),p1(0xc6),p1(0xc7) ;\
.long p1(0xc8),p1(0xc9),p1(0xca),p1(0xcb),p1(0xcc),p1(0xcd),p1(0xce),p1(0xcf) ;\
.long p1(0xd0),p1(0xd1),p1(0xd2),p1(0xd3),p1(0xd4),p1(0xd5),p1(0xd6),p1(0xd7) ;\
.long p1(0xd8),p1(0xd9),p1(0xda),p1(0xdb),p1(0xdc),p1(0xdd),p1(0xde),p1(0xdf)
#define im_data7(p1) \
.long p1(0xe0),p1(0xe1),p1(0xe2),p1(0xe3),p1(0xe4),p1(0xe5),p1(0xe6),p1(0xe7) ;\
.long p1(0xe8),p1(0xe9),p1(0xea),p1(0xeb),p1(0xec),p1(0xed),p1(0xee),p1(0xef) ;\
.long p1(0xf0),p1(0xf1),p1(0xf2),p1(0xf3),p1(0xf4),p1(0xf5),p1(0xf6),p1(0xf7) ;\
.long p1(0xf8),p1(0xf9),p1(0xfa),p1(0xfb),p1(0xfc),p1(0xfd),p1(0xfe),p1(0xff)
// S-box data - 256 entries
#define sb_data0(p1) \
.long p1(0x63),p1(0x7c),p1(0x77),p1(0x7b),p1(0xf2),p1(0x6b),p1(0x6f),p1(0xc5) ;\
.long p1(0x30),p1(0x01),p1(0x67),p1(0x2b),p1(0xfe),p1(0xd7),p1(0xab),p1(0x76) ;\
.long p1(0xca),p1(0x82),p1(0xc9),p1(0x7d),p1(0xfa),p1(0x59),p1(0x47),p1(0xf0) ;\
.long p1(0xad),p1(0xd4),p1(0xa2),p1(0xaf),p1(0x9c),p1(0xa4),p1(0x72),p1(0xc0)
#define sb_data1(p1) \
.long p1(0xb7),p1(0xfd),p1(0x93),p1(0x26),p1(0x36),p1(0x3f),p1(0xf7),p1(0xcc) ;\
.long p1(0x34),p1(0xa5),p1(0xe5),p1(0xf1),p1(0x71),p1(0xd8),p1(0x31),p1(0x15) ;\
.long p1(0x04),p1(0xc7),p1(0x23),p1(0xc3),p1(0x18),p1(0x96),p1(0x05),p1(0x9a) ;\
.long p1(0x07),p1(0x12),p1(0x80),p1(0xe2),p1(0xeb),p1(0x27),p1(0xb2),p1(0x75)
#define sb_data2(p1) \
.long p1(0x09),p1(0x83),p1(0x2c),p1(0x1a),p1(0x1b),p1(0x6e),p1(0x5a),p1(0xa0) ;\
.long p1(0x52),p1(0x3b),p1(0xd6),p1(0xb3),p1(0x29),p1(0xe3),p1(0x2f),p1(0x84) ;\
.long p1(0x53),p1(0xd1),p1(0x00),p1(0xed),p1(0x20),p1(0xfc),p1(0xb1),p1(0x5b) ;\
.long p1(0x6a),p1(0xcb),p1(0xbe),p1(0x39),p1(0x4a),p1(0x4c),p1(0x58),p1(0xcf)
#define sb_data3(p1) \
.long p1(0xd0),p1(0xef),p1(0xaa),p1(0xfb),p1(0x43),p1(0x4d),p1(0x33),p1(0x85) ;\
.long p1(0x45),p1(0xf9),p1(0x02),p1(0x7f),p1(0x50),p1(0x3c),p1(0x9f),p1(0xa8) ;\
.long p1(0x51),p1(0xa3),p1(0x40),p1(0x8f),p1(0x92),p1(0x9d),p1(0x38),p1(0xf5) ;\
.long p1(0xbc),p1(0xb6),p1(0xda),p1(0x21),p1(0x10),p1(0xff),p1(0xf3),p1(0xd2)
#define sb_data4(p1) \
.long p1(0xcd),p1(0x0c),p1(0x13),p1(0xec),p1(0x5f),p1(0x97),p1(0x44),p1(0x17) ;\
.long p1(0xc4),p1(0xa7),p1(0x7e),p1(0x3d),p1(0x64),p1(0x5d),p1(0x19),p1(0x73) ;\
.long p1(0x60),p1(0x81),p1(0x4f),p1(0xdc),p1(0x22),p1(0x2a),p1(0x90),p1(0x88) ;\
.long p1(0x46),p1(0xee),p1(0xb8),p1(0x14),p1(0xde),p1(0x5e),p1(0x0b),p1(0xdb)
#define sb_data5(p1) \
.long p1(0xe0),p1(0x32),p1(0x3a),p1(0x0a),p1(0x49),p1(0x06),p1(0x24),p1(0x5c) ;\
.long p1(0xc2),p1(0xd3),p1(0xac),p1(0x62),p1(0x91),p1(0x95),p1(0xe4),p1(0x79) ;\
.long p1(0xe7),p1(0xc8),p1(0x37),p1(0x6d),p1(0x8d),p1(0xd5),p1(0x4e),p1(0xa9) ;\
.long p1(0x6c),p1(0x56),p1(0xf4),p1(0xea),p1(0x65),p1(0x7a),p1(0xae),p1(0x08)
#define sb_data6(p1) \
.long p1(0xba),p1(0x78),p1(0x25),p1(0x2e),p1(0x1c),p1(0xa6),p1(0xb4),p1(0xc6) ;\
.long p1(0xe8),p1(0xdd),p1(0x74),p1(0x1f),p1(0x4b),p1(0xbd),p1(0x8b),p1(0x8a) ;\
.long p1(0x70),p1(0x3e),p1(0xb5),p1(0x66),p1(0x48),p1(0x03),p1(0xf6),p1(0x0e) ;\
.long p1(0x61),p1(0x35),p1(0x57),p1(0xb9),p1(0x86),p1(0xc1),p1(0x1d),p1(0x9e)
#define sb_data7(p1) \
.long p1(0xe1),p1(0xf8),p1(0x98),p1(0x11),p1(0x69),p1(0xd9),p1(0x8e),p1(0x94) ;\
.long p1(0x9b),p1(0x1e),p1(0x87),p1(0xe9),p1(0xce),p1(0x55),p1(0x28),p1(0xdf) ;\
.long p1(0x8c),p1(0xa1),p1(0x89),p1(0x0d),p1(0xbf),p1(0xe6),p1(0x42),p1(0x68) ;\
.long p1(0x41),p1(0x99),p1(0x2d),p1(0x0f),p1(0xb0),p1(0x54),p1(0xbb),p1(0x16)
// Inverse S-box data - 256 entries
#define ib_data0(p1) \
.long p1(0x52),p1(0x09),p1(0x6a),p1(0xd5),p1(0x30),p1(0x36),p1(0xa5),p1(0x38) ;\
.long p1(0xbf),p1(0x40),p1(0xa3),p1(0x9e),p1(0x81),p1(0xf3),p1(0xd7),p1(0xfb) ;\
.long p1(0x7c),p1(0xe3),p1(0x39),p1(0x82),p1(0x9b),p1(0x2f),p1(0xff),p1(0x87) ;\
.long p1(0x34),p1(0x8e),p1(0x43),p1(0x44),p1(0xc4),p1(0xde),p1(0xe9),p1(0xcb)
#define ib_data1(p1) \
.long p1(0x54),p1(0x7b),p1(0x94),p1(0x32),p1(0xa6),p1(0xc2),p1(0x23),p1(0x3d) ;\
.long p1(0xee),p1(0x4c),p1(0x95),p1(0x0b),p1(0x42),p1(0xfa),p1(0xc3),p1(0x4e) ;\
.long p1(0x08),p1(0x2e),p1(0xa1),p1(0x66),p1(0x28),p1(0xd9),p1(0x24),p1(0xb2) ;\
.long p1(0x76),p1(0x5b),p1(0xa2),p1(0x49),p1(0x6d),p1(0x8b),p1(0xd1),p1(0x25)
#define ib_data2(p1) \
.long p1(0x72),p1(0xf8),p1(0xf6),p1(0x64),p1(0x86),p1(0x68),p1(0x98),p1(0x16) ;\
.long p1(0xd4),p1(0xa4),p1(0x5c),p1(0xcc),p1(0x5d),p1(0x65),p1(0xb6),p1(0x92) ;\
.long p1(0x6c),p1(0x70),p1(0x48),p1(0x50),p1(0xfd),p1(0xed),p1(0xb9),p1(0xda) ;\
.long p1(0x5e),p1(0x15),p1(0x46),p1(0x57),p1(0xa7),p1(0x8d),p1(0x9d),p1(0x84)
#define ib_data3(p1) \
.long p1(0x90),p1(0xd8),p1(0xab),p1(0x00),p1(0x8c),p1(0xbc),p1(0xd3),p1(0x0a) ;\
.long p1(0xf7),p1(0xe4),p1(0x58),p1(0x05),p1(0xb8),p1(0xb3),p1(0x45),p1(0x06) ;\
.long p1(0xd0),p1(0x2c),p1(0x1e),p1(0x8f),p1(0xca),p1(0x3f),p1(0x0f),p1(0x02) ;\
.long p1(0xc1),p1(0xaf),p1(0xbd),p1(0x03),p1(0x01),p1(0x13),p1(0x8a),p1(0x6b)
#define ib_data4(p1) \
.long p1(0x3a),p1(0x91),p1(0x11),p1(0x41),p1(0x4f),p1(0x67),p1(0xdc),p1(0xea) ;\
.long p1(0x97),p1(0xf2),p1(0xcf),p1(0xce),p1(0xf0),p1(0xb4),p1(0xe6),p1(0x73) ;\
.long p1(0x96),p1(0xac),p1(0x74),p1(0x22),p1(0xe7),p1(0xad),p1(0x35),p1(0x85) ;\
.long p1(0xe2),p1(0xf9),p1(0x37),p1(0xe8),p1(0x1c),p1(0x75),p1(0xdf),p1(0x6e)
#define ib_data5(p1) \
.long p1(0x47),p1(0xf1),p1(0x1a),p1(0x71),p1(0x1d),p1(0x29),p1(0xc5),p1(0x89) ;\
.long p1(0x6f),p1(0xb7),p1(0x62),p1(0x0e),p1(0xaa),p1(0x18),p1(0xbe),p1(0x1b) ;\
.long p1(0xfc),p1(0x56),p1(0x3e),p1(0x4b),p1(0xc6),p1(0xd2),p1(0x79),p1(0x20) ;\
.long p1(0x9a),p1(0xdb),p1(0xc0),p1(0xfe),p1(0x78),p1(0xcd),p1(0x5a),p1(0xf4)
#define ib_data6(p1) \
.long p1(0x1f),p1(0xdd),p1(0xa8),p1(0x33),p1(0x88),p1(0x07),p1(0xc7),p1(0x31) ;\
.long p1(0xb1),p1(0x12),p1(0x10),p1(0x59),p1(0x27),p1(0x80),p1(0xec),p1(0x5f) ;\
.long p1(0x60),p1(0x51),p1(0x7f),p1(0xa9),p1(0x19),p1(0xb5),p1(0x4a),p1(0x0d) ;\
.long p1(0x2d),p1(0xe5),p1(0x7a),p1(0x9f),p1(0x93),p1(0xc9),p1(0x9c),p1(0xef)
#define ib_data7(p1) \
.long p1(0xa0),p1(0xe0),p1(0x3b),p1(0x4d),p1(0xae),p1(0x2a),p1(0xf5),p1(0xb0) ;\
.long p1(0xc8),p1(0xeb),p1(0xbb),p1(0x3c),p1(0x83),p1(0x53),p1(0x99),p1(0x61) ;\
.long p1(0x17),p1(0x2b),p1(0x04),p1(0x7e),p1(0xba),p1(0x77),p1(0xd6),p1(0x26) ;\
.long p1(0xe1),p1(0x69),p1(0x14),p1(0x63),p1(0x55),p1(0x21),p1(0x0c),p1(0x7d)
// The rcon_table (needed for the key schedule)
//
// Here is original Dr Brian Gladman's source code:
// _rcon_tab:
// %assign x 1
// %rep 29
// dd x
// %assign x f2(x)
// %endrep
//
// Here is precomputed output (it's more portable this way):
.align ALIGN32BYTES
aes_rcon_tab:
.long 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
.long 0x1b,0x36,0x6c,0xd8,0xab,0x4d,0x9a,0x2f
.long 0x5e,0xbc,0x63,0xc6,0x97,0x35,0x6a,0xd4
.long 0xb3,0x7d,0xfa,0xef,0xc5
// The forward xor tables
.align ALIGN32BYTES
aes_ft_tab:
sb_data0(u0)
sb_data1(u0)
sb_data2(u0)
sb_data3(u0)
sb_data4(u0)
sb_data5(u0)
sb_data6(u0)
sb_data7(u0)
sb_data0(u1)
sb_data1(u1)
sb_data2(u1)
sb_data3(u1)
sb_data4(u1)
sb_data5(u1)
sb_data6(u1)
sb_data7(u1)
sb_data0(u2)
sb_data1(u2)
sb_data2(u2)
sb_data3(u2)
sb_data4(u2)
sb_data5(u2)
sb_data6(u2)
sb_data7(u2)
sb_data0(u3)
sb_data1(u3)
sb_data2(u3)
sb_data3(u3)
sb_data4(u3)
sb_data5(u3)
sb_data6(u3)
sb_data7(u3)
.align ALIGN32BYTES
aes_fl_tab:
sb_data0(w0)
sb_data1(w0)
sb_data2(w0)
sb_data3(w0)
sb_data4(w0)
sb_data5(w0)
sb_data6(w0)
sb_data7(w0)
sb_data0(w1)
sb_data1(w1)
sb_data2(w1)
sb_data3(w1)
sb_data4(w1)
sb_data5(w1)
sb_data6(w1)
sb_data7(w1)
sb_data0(w2)
sb_data1(w2)
sb_data2(w2)
sb_data3(w2)
sb_data4(w2)
sb_data5(w2)
sb_data6(w2)
sb_data7(w2)
sb_data0(w3)
sb_data1(w3)
sb_data2(w3)
sb_data3(w3)
sb_data4(w3)
sb_data5(w3)
sb_data6(w3)
sb_data7(w3)
// The inverse xor tables
.align ALIGN32BYTES
aes_it_tab:
ib_data0(v0)
ib_data1(v0)
ib_data2(v0)
ib_data3(v0)
ib_data4(v0)
ib_data5(v0)
ib_data6(v0)
ib_data7(v0)
ib_data0(v1)
ib_data1(v1)
ib_data2(v1)
ib_data3(v1)
ib_data4(v1)
ib_data5(v1)
ib_data6(v1)
ib_data7(v1)
ib_data0(v2)
ib_data1(v2)
ib_data2(v2)
ib_data3(v2)
ib_data4(v2)
ib_data5(v2)
ib_data6(v2)
ib_data7(v2)
ib_data0(v3)
ib_data1(v3)
ib_data2(v3)
ib_data3(v3)
ib_data4(v3)
ib_data5(v3)
ib_data6(v3)
ib_data7(v3)
.align ALIGN32BYTES
aes_il_tab:
ib_data0(w0)
ib_data1(w0)
ib_data2(w0)
ib_data3(w0)
ib_data4(w0)
ib_data5(w0)
ib_data6(w0)
ib_data7(w0)
ib_data0(w1)
ib_data1(w1)
ib_data2(w1)
ib_data3(w1)
ib_data4(w1)
ib_data5(w1)
ib_data6(w1)
ib_data7(w1)
ib_data0(w2)
ib_data1(w2)
ib_data2(w2)
ib_data3(w2)
ib_data4(w2)
ib_data5(w2)
ib_data6(w2)
ib_data7(w2)
ib_data0(w3)
ib_data1(w3)
ib_data2(w3)
ib_data3(w3)
ib_data4(w3)
ib_data5(w3)
ib_data6(w3)
ib_data7(w3)
// The inverse mix column tables
.align ALIGN32BYTES
aes_im_tab:
im_data0(v0)
im_data1(v0)
im_data2(v0)
im_data3(v0)
im_data4(v0)
im_data5(v0)
im_data6(v0)
im_data7(v0)
im_data0(v1)
im_data1(v1)
im_data2(v1)
im_data3(v1)
im_data4(v1)
im_data5(v1)
im_data6(v1)
im_data7(v1)
im_data0(v2)
im_data1(v2)
im_data2(v2)
im_data3(v2)
im_data4(v2)
im_data5(v2)
im_data6(v2)
im_data7(v2)
im_data0(v3)
im_data1(v3)
im_data2(v3)
im_data3(v3)
im_data4(v3)
im_data5(v3)
im_data6(v3)
im_data7(v3)
arch/i386/crypto/aes-i586-glue.c deleted 100644 → 0
View file @ e6524140
/*
*
* Glue Code for optimized 586 assembler version of AES
*
* Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.
* Copyright (c) 2003, Adam J. Richter <adam@yggdrasil.com> (conversion to
* 2.5 API).
* Copyright (c) 2003, 2004 Fruhwirth Clemens <clemens@endorphin.org>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/crypto.h>
#include <linux/linkage.h>
#define AES_MIN_KEY_SIZE 16
#define AES_MAX_KEY_SIZE 32
#define AES_BLOCK_SIZE 16
#define AES_KS_LENGTH 4 * AES_BLOCK_SIZE
#define AES_RC_LENGTH (9 * AES_BLOCK_SIZE) / 8 - 8
typedef struct
{
u_int32_t aes_Nkey; // the number of words in the key input block
u_int32_t aes_Nrnd; // the number of cipher rounds
u_int32_t aes_e_key[AES_KS_LENGTH]; // the encryption key schedule
u_int32_t aes_d_key[AES_KS_LENGTH]; // the decryption key schedule
u_int32_t aes_Ncol; // the number of columns in the cipher state
} aes_context;
/*
* The Cipher Interface
*/
asmlinkage void aes_set_key(void *, const unsigned char [], const int, const int);
/* Actually:
* extern void aes_encrypt(const aes_context *, unsigned char [], const unsigned char []);
* extern void aes_decrypt(const aes_context *, unsigned char [], const unsigned char []);
*/
asmlinkage void aes_encrypt(void*, unsigned char [], const unsigned char []);
asmlinkage void aes_decrypt(void*, unsigned char [], const unsigned char []);
static int aes_set_key_glue(void *cx, const u8 *key,unsigned int key_length, u32 *flags)
{
if(key_length != 16 && key_length != 24 && key_length != 32)
{
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
return -EINVAL;
}
aes_set_key(cx, key,key_length,0);
return 0;
}
#ifdef CONFIG_REGPARM
static void aes_encrypt_glue(void* a, unsigned char b[], const unsigned char c[]) {
aes_encrypt(a,b,c);
}
static void aes_decrypt_glue(void* a, unsigned char b[], const unsigned char c[]) {
aes_decrypt(a,b,c);
}
#else
#define aes_encrypt_glue aes_encrypt
#define aes_decrypt_glue aes_decrypt
#endif /* CONFIG_REGPARM */
static struct crypto_alg aes_alg = {
.cra_name = "aes",
.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(aes_context),
.cra_module = THIS_MODULE,
.cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
.cra_u = {
.cipher = {
.cia_min_keysize = AES_MIN_KEY_SIZE,
.cia_max_keysize = AES_MAX_KEY_SIZE,
.cia_setkey = aes_set_key_glue,
.cia_encrypt = aes_encrypt_glue,
.cia_decrypt = aes_decrypt_glue
}
}
};
static int __init aes_init(void)
{
return crypto_register_alg(&aes_alg);
}
static void __exit aes_fini(void)
{
crypto_unregister_alg(&aes_alg);
}
module_init(aes_init);
module_exit(aes_fini);
MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, i586 asm optimized");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Fruhwirth Clemens");
MODULE_ALIAS("aes");
arch/i386/crypto/aes.c 0 → 100644
View file @ 1d47490a
/*
*
* Glue Code for optimized 586 assembler version of AES
*
* Copyright (c) 2002, Dr Brian Gladman <>, Worcester, UK.
* All rights reserved.
*
* LICENSE TERMS
*
* The free distribution and use of this software in both source and binary
* form is allowed (with or without changes) provided that:
*
* 1. distributions of this source code include the above copyright
* notice, this list of conditions and the following disclaimer;
*
* 2. distributions in binary form include the above copyright
* notice, this list of conditions and the following disclaimer
* in the documentation and/or other associated materials;
*
* 3. the copyright holder's name is not used to endorse products
* built using this software without specific written permission.
*
* ALTERNATIVELY, provided that this notice is retained in full, this product
* may be distributed under the terms of the GNU General Public License (GPL),
* in which case the provisions of the GPL apply INSTEAD OF those given above.
*
* DISCLAIMER
*
* This software is provided 'as is' with no explicit or implied warranties
* in respect of its properties, including, but not limited to, correctness
* and/or fitness for purpose.
*
* Copyright (c) 2003, Adam J. Richter <adam@yggdrasil.com> (conversion to
* 2.5 API).
* Copyright (c) 2003, 2004 Fruhwirth Clemens <clemens@endorphin.org>
* Copyright (c) 2004 Red Hat, Inc., James Morris <jmorris@redhat.com>
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/crypto.h>
#include <linux/linkage.h>
asmlinkage void aes_enc_blk(const u8 *src, u8 *dst, void *ctx);
asmlinkage void aes_dec_blk(const u8 *src, u8 *dst, void *ctx);
#define AES_MIN_KEY_SIZE 16
#define AES_MAX_KEY_SIZE 32
#define AES_BLOCK_SIZE 16
#define AES_KS_LENGTH 4 * AES_BLOCK_SIZE
#define RC_LENGTH 29
struct aes_ctx {
u32 ekey[AES_KS_LENGTH];
u32 rounds;
u32 dkey[AES_KS_LENGTH];
};
#define WPOLY 0x011b
#define u32_in(x) le32_to_cpu(*(const u32 *)(x))
#define bytes2word(b0, b1, b2, b3) \
(((u32)(b3) << 24) | ((u32)(b2) << 16) | ((u32)(b1) << 8) | (b0))
/* define the finite field multiplies required for Rijndael */
#define f2(x) ((x) ? pow[log[x] + 0x19] : 0)
#define f3(x) ((x) ? pow[log[x] + 0x01] : 0)
#define f9(x) ((x) ? pow[log[x] + 0xc7] : 0)
#define fb(x) ((x) ? pow[log[x] + 0x68] : 0)
#define fd(x) ((x) ? pow[log[x] + 0xee] : 0)
#define fe(x) ((x) ? pow[log[x] + 0xdf] : 0)
#define fi(x) ((x) ? pow[255 - log[x]]: 0)
static inline u32 upr(u32 x, int n)
{
return (x << 8 * n) | (x >> (32 - 8 * n));
}
static inline u8 bval(u32 x, int n)
{
return x >> 8 * n;
}
/* The forward and inverse affine transformations used in the S-box */
#define fwd_affine(x) \
(w = (u32)x, w ^= (w<<1)^(w<<2)^(w<<3)^(w<<4), 0x63^(u8)(w^(w>>8)))
#define inv_affine(x) \
(w = (u32)x, w = (w<<1)^(w<<3)^(w<<6), 0x05^(u8)(w^(w>>8)))
static u32 rcon_tab[RC_LENGTH];
u32 ft_tab[4][256];
u32 fl_tab[4][256];
u32 ls_tab[4][256];
u32 im_tab[4][256];
u32 il_tab[4][256];
u32 it_tab[4][256];
void gen_tabs(void)
{
u32 i, w;
u8 pow[512], log[256];
/*
* log and power tables for GF(2^8) finite field with
* WPOLY as modular polynomial - the simplest primitive
* root is 0x03, used here to generate the tables.
*/
i = 0; w = 1;
do {
pow[i] = (u8)w;
pow[i + 255] = (u8)w;
log[w] = (u8)i++;
w ^= (w << 1) ^ (w & 0x80 ? WPOLY : 0);
} while (w != 1);
for(i = 0, w = 1; i < RC_LENGTH; ++i) {
rcon_tab[i] = bytes2word(w, 0, 0, 0);
w = f2(w);
}
for(i = 0; i < 256; ++i) {
u8 b;
b = fwd_affine(fi((u8)i));
w = bytes2word(f2(b), b, b, f3(b));
/* tables for a normal encryption round */
ft_tab[0][i] = w;
ft_tab[1][i] = upr(w, 1);
ft_tab[2][i] = upr(w, 2);
ft_tab[3][i] = upr(w, 3);
w = bytes2word(b, 0, 0, 0);
/*
* tables for last encryption round
* (may also be used in the key schedule)
*/
fl_tab[0][i] = w;
fl_tab[1][i] = upr(w, 1);
fl_tab[2][i] = upr(w, 2);
fl_tab[3][i] = upr(w, 3);
/*
* table for key schedule if fl_tab above is
* not of the required form
*/
ls_tab[0][i] = w;
ls_tab[1][i] = upr(w, 1);
ls_tab[2][i] = upr(w, 2);
ls_tab[3][i] = upr(w, 3);
b = fi(inv_affine((u8)i));
w = bytes2word(fe(b), f9(b), fd(b), fb(b));
/* tables for the inverse mix column operation */
im_tab[0][b] = w;
im_tab[1][b] = upr(w, 1);
im_tab[2][b] = upr(w, 2);
im_tab[3][b] = upr(w, 3);
/* tables for a normal decryption round */
it_tab[0][i] = w;
it_tab[1][i] = upr(w,1);
it_tab[2][i] = upr(w,2);
it_tab[3][i] = upr(w,3);
w = bytes2word(b, 0, 0, 0);
/* tables for last decryption round */
il_tab[0][i] = w;
il_tab[1][i] = upr(w,1);
il_tab[2][i] = upr(w,2);
il_tab[3][i] = upr(w,3);
}
}
#define four_tables(x,tab,vf,rf,c) \
( tab[0][bval(vf(x,0,c),rf(0,c))] ^ \
tab[1][bval(vf(x,1,c),rf(1,c))] ^ \
tab[2][bval(vf(x,2,c),rf(2,c))] ^ \
tab[3][bval(vf(x,3,c),rf(3,c))] \
)
#define vf1(x,r,c) (x)
#define rf1(r,c) (r)
#define rf2(r,c) ((r-c)&3)
#define inv_mcol(x) four_tables(x,im_tab,vf1,rf1,0)
#define ls_box(x,c) four_tables(x,fl_tab,vf1,rf2,c)
#define ff(x) inv_mcol(x)
#define ke4(k,i) \
{ \
k[4*(i)+4] = ss[0] ^= ls_box(ss[3],3) ^ rcon_tab[i]; \
k[4*(i)+5] = ss[1] ^= ss[0]; \
k[4*(i)+6] = ss[2] ^= ss[1]; \
k[4*(i)+7] = ss[3] ^= ss[2]; \
}
#define kel4(k,i) \
{ \
k[4*(i)+4] = ss[0] ^= ls_box(ss[3],3) ^ rcon_tab[i]; \
k[4*(i)+5] = ss[1] ^= ss[0]; \
k[4*(i)+6] = ss[2] ^= ss[1]; k[4*(i)+7] = ss[3] ^= ss[2]; \
}
#define ke6(k,i) \
{ \
k[6*(i)+ 6] = ss[0] ^= ls_box(ss[5],3) ^ rcon_tab[i]; \
k[6*(i)+ 7] = ss[1] ^= ss[0]; \
k[6*(i)+ 8] = ss[2] ^= ss[1]; \
k[6*(i)+ 9] = ss[3] ^= ss[2]; \
k[6*(i)+10] = ss[4] ^= ss[3]; \
k[6*(i)+11] = ss[5] ^= ss[4]; \
}
#define kel6(k,i) \
{ \
k[6*(i)+ 6] = ss[0] ^= ls_box(ss[5],3) ^ rcon_tab[i]; \
k[6*(i)+ 7] = ss[1] ^= ss[0]; \
k[6*(i)+ 8] = ss[2] ^= ss[1]; \
k[6*(i)+ 9] = ss[3] ^= ss[2]; \
}
#define ke8(k,i) \
{ \
k[8*(i)+ 8] = ss[0] ^= ls_box(ss[7],3) ^ rcon_tab[i]; \
k[8*(i)+ 9] = ss[1] ^= ss[0]; \
k[8*(i)+10] = ss[2] ^= ss[1]; \
k[8*(i)+11] = ss[3] ^= ss[2]; \
k[8*(i)+12] = ss[4] ^= ls_box(ss[3],0); \
k[8*(i)+13] = ss[5] ^= ss[4]; \
k[8*(i)+14] = ss[6] ^= ss[5]; \
k[8*(i)+15] = ss[7] ^= ss[6]; \
}
#define kel8(k,i) \
{ \
k[8*(i)+ 8] = ss[0] ^= ls_box(ss[7],3) ^ rcon_tab[i]; \
k[8*(i)+ 9] = ss[1] ^= ss[0]; \
k[8*(i)+10] = ss[2] ^= ss[1]; \
k[8*(i)+11] = ss[3] ^= ss[2]; \
}
#define kdf4(k,i) \
{ \
ss[0] = ss[0] ^ ss[2] ^ ss[1] ^ ss[3]; \
ss[1] = ss[1] ^ ss[3]; \
ss[2] = ss[2] ^ ss[3]; \
ss[3] = ss[3]; \
ss[4] = ls_box(ss[(i+3) % 4], 3) ^ rcon_tab[i]; \
ss[i % 4] ^= ss[4]; \
ss[4] ^= k[4*(i)]; \
k[4*(i)+4] = ff(ss[4]); \
ss[4] ^= k[4*(i)+1]; \
k[4*(i)+5] = ff(ss[4]); \
ss[4] ^= k[4*(i)+2]; \
k[4*(i)+6] = ff(ss[4]); \
ss[4] ^= k[4*(i)+3]; \
k[4*(i)+7] = ff(ss[4]); \
}
#define kd4(k,i) \
{ \
ss[4] = ls_box(ss[(i+3) % 4], 3) ^ rcon_tab[i]; \
ss[i % 4] ^= ss[4]; \
ss[4] = ff(ss[4]); \
k[4*(i)+4] = ss[4] ^= k[4*(i)]; \
k[4*(i)+5] = ss[4] ^= k[4*(i)+1]; \
k[4*(i)+6] = ss[4] ^= k[4*(i)+2]; \
k[4*(i)+7] = ss[4] ^= k[4*(i)+3]; \
}
#define kdl4(k,i) \
{ \
ss[4] = ls_box(ss[(i+3) % 4], 3) ^ rcon_tab[i]; \
ss[i % 4] ^= ss[4]; \
k[4*(i)+4] = (ss[0] ^= ss[1]) ^ ss[2] ^ ss[3]; \
k[4*(i)+5] = ss[1] ^ ss[3]; \
k[4*(i)+6] = ss[0]; \
k[4*(i)+7] = ss[1]; \
}
#define kdf6(k,i) \
{ \
ss[0] ^= ls_box(ss[5],3) ^ rcon_tab[i]; \
k[6*(i)+ 6] = ff(ss[0]); \
ss[1] ^= ss[0]; \
k[6*(i)+ 7] = ff(ss[1]); \
ss[2] ^= ss[1]; \
k[6*(i)+ 8] = ff(ss[2]); \
ss[3] ^= ss[2]; \
k[6*(i)+ 9] = ff(ss[3]); \
ss[4] ^= ss[3]; \
k[6*(i)+10] = ff(ss[4]); \
ss[5] ^= ss[4]; \
k[6*(i)+11] = ff(ss[5]); \
}
#define kd6(k,i) \
{ \
ss[6] = ls_box(ss[5],3) ^ rcon_tab[i]; \
ss[0] ^= ss[6]; ss[6] = ff(ss[6]); \
k[6*(i)+ 6] = ss[6] ^= k[6*(i)]; \
ss[1] ^= ss[0]; \
k[6*(i)+ 7] = ss[6] ^= k[6*(i)+ 1]; \
ss[2] ^= ss[1]; \
k[6*(i)+ 8] = ss[6] ^= k[6*(i)+ 2]; \
ss[3] ^= ss[2]; \
k[6*(i)+ 9] = ss[6] ^= k[6*(i)+ 3]; \
ss[4] ^= ss[3]; \
k[6*(i)+10] = ss[6] ^= k[6*(i)+ 4]; \
ss[5] ^= ss[4]; \
k[6*(i)+11] = ss[6] ^= k[6*(i)+ 5]; \
}
#define kdl6(k,i) \
{ \
ss[0] ^= ls_box(ss[5],3) ^ rcon_tab[i]; \
k[6*(i)+ 6] = ss[0]; \
ss[1] ^= ss[0]; \
k[6*(i)+ 7] = ss[1]; \
ss[2] ^= ss[1]; \
k[6*(i)+ 8] = ss[2]; \
ss[3] ^= ss[2]; \
k[6*(i)+ 9] = ss[3]; \
}
#define kdf8(k,i) \
{ \
ss[0] ^= ls_box(ss[7],3) ^ rcon_tab[i]; \
k[8*(i)+ 8] = ff(ss[0]); \
ss[1] ^= ss[0]; \
k[8*(i)+ 9] = ff(ss[1]); \
ss[2] ^= ss[1]; \
k[8*(i)+10] = ff(ss[2]); \
ss[3] ^= ss[2]; \
k[8*(i)+11] = ff(ss[3]); \
ss[4] ^= ls_box(ss[3],0); \
k[8*(i)+12] = ff(ss[4]); \
ss[5] ^= ss[4]; \
k[8*(i)+13] = ff(ss[5]); \
ss[6] ^= ss[5]; \
k[8*(i)+14] = ff(ss[6]); \
ss[7] ^= ss[6]; \
k[8*(i)+15] = ff(ss[7]); \
}
#define kd8(k,i) \
{ \
u32 __g = ls_box(ss[7],3) ^ rcon_tab[i]; \
ss[0] ^= __g; \
__g = ff(__g); \
k[8*(i)+ 8] = __g ^= k[8*(i)]; \
ss[1] ^= ss[0]; \
k[8*(i)+ 9] = __g ^= k[8*(i)+ 1]; \
ss[2] ^= ss[1]; \
k[8*(i)+10] = __g ^= k[8*(i)+ 2]; \
ss[3] ^= ss[2]; \
k[8*(i)+11] = __g ^= k[8*(i)+ 3]; \
__g = ls_box(ss[3],0); \
ss[4] ^= __g; \
__g = ff(__g); \
k[8*(i)+12] = __g ^= k[8*(i)+ 4]; \
ss[5] ^= ss[4]; \
k[8*(i)+13] = __g ^= k[8*(i)+ 5]; \
ss[6] ^= ss[5]; \
k[8*(i)+14] = __g ^= k[8*(i)+ 6]; \
ss[7] ^= ss[6]; \
k[8*(i)+15] = __g ^= k[8*(i)+ 7]; \
}
#define kdl8(k,i) \
{ \
ss[0] ^= ls_box(ss[7],3) ^ rcon_tab[i]; \
k[8*(i)+ 8] = ss[0]; \
ss[1] ^= ss[0]; \
k[8*(i)+ 9] = ss[1]; \
ss[2] ^= ss[1]; \
k[8*(i)+10] = ss[2]; \
ss[3] ^= ss[2]; \
k[8*(i)+11] = ss[3]; \
}
static int
aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
{
int i;
u32 ss[8];
struct aes_ctx *ctx = ctx_arg;
/* encryption schedule */
ctx->ekey[0] = ss[0] = u32_in(in_key);
ctx->ekey[1] = ss[1] = u32_in(in_key + 4);
ctx->ekey[2] = ss[2] = u32_in(in_key + 8);
ctx->ekey[3] = ss[3] = u32_in(in_key + 12);
switch(key_len) {
case 16:
for (i = 0; i < 9; i++)
ke4(ctx->ekey, i);
kel4(ctx->ekey, 9);
ctx->rounds = 10;
break;
case 24:
ctx->ekey[4] = ss[4] = u32_in(in_key + 16);
ctx->ekey[5] = ss[5] = u32_in(in_key + 20);
for (i = 0; i < 7; i++)
ke6(ctx->ekey, i);
kel6(ctx->ekey, 7);
ctx->rounds = 12;
break;
case 32:
ctx->ekey[4] = ss[4] = u32_in(in_key + 16);
ctx->ekey[5] = ss[5] = u32_in(in_key + 20);
ctx->ekey[6] = ss[6] = u32_in(in_key + 24);
ctx->ekey[7] = ss[7] = u32_in(in_key + 28);
for (i = 0; i < 6; i++)
ke8(ctx->ekey, i);
kel8(ctx->ekey, 6);
ctx->rounds = 14;
break;
default:
*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
return -EINVAL;
}
/* decryption schedule */
ctx->dkey[0] = ss[0] = u32_in(in_key);
ctx->dkey[1] = ss[1] = u32_in(in_key + 4);
ctx->dkey[2] = ss[2] = u32_in(in_key + 8);
ctx->dkey[3] = ss[3] = u32_in(in_key + 12);
switch (key_len) {
case 16:
kdf4(ctx->dkey, 0);
for (i = 1; i < 9; i++)
kd4(ctx->dkey, i);
kdl4(ctx->dkey, 9);
break;
case 24:
ctx->dkey[4] = ff(ss[4] = u32_in(in_key + 16));
ctx->dkey[5] = ff(ss[5] = u32_in(in_key + 20));
kdf6(ctx->dkey, 0);
for (i = 1; i < 7; i++)
kd6(ctx->dkey, i);
kdl6(ctx->dkey, 7);
break;
case 32:
ctx->dkey[4] = ff(ss[4] = u32_in(in_key + 16));
ctx->dkey[5] = ff(ss[5] = u32_in(in_key + 20));
ctx->dkey[6] = ff(ss[6] = u32_in(in_key + 24));
ctx->dkey[7] = ff(ss[7] = u32_in(in_key + 28));
kdf8(ctx->dkey, 0);
for (i = 1; i < 6; i++)
kd8(ctx->dkey, i);
kdl8(ctx->dkey, 6);
break;
}
return 0;
}
static inline void aes_encrypt(void *ctx, u8 *dst, const u8 *src)
{
aes_enc_blk(src, dst, ctx);
}
static inline void aes_decrypt(void *ctx, u8 *dst, const u8 *src)
{
aes_dec_blk(src, dst, ctx);
}
static struct crypto_alg aes_alg = {
.cra_name = "aes",
.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct aes_ctx),
.cra_module = THIS_MODULE,
.cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
.cra_u = {
.cipher = {
.cia_min_keysize = AES_MIN_KEY_SIZE,
.cia_max_keysize = AES_MAX_KEY_SIZE,
.cia_setkey = aes_set_key,
.cia_encrypt = aes_encrypt,
.cia_decrypt = aes_decrypt
}
}
};
static int __init aes_init(void)
{
gen_tabs();
return crypto_register_alg(&aes_alg);
}
static void __exit aes_fini(void)
{
crypto_unregister_alg(&aes_alg);
}
module_init(aes_init);
module_exit(aes_fini);
MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, i586 asm optimized");
MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Fruhwirth Clemens, James Morris, Brian Gladman, Adam Richter");
MODULE_ALIAS("aes");
arch/ia64/Kconfig
View file @ 1d47490a
......@@ -170,7 +170,7 @@ config VIRTUAL_MEM_MAP
config DISCONTIGMEM
bool "Discontiguous memory support"
depends on (IA64_DIG || IA64_SGI_SN2 || IA64_GENERIC) && NUMA && VIRTUAL_MEM_MAP
depends on (IA64_DIG || IA64_SGI_SN2 || IA64_GENERIC || IA64_HP_ZX1) && NUMA && VIRTUAL_MEM_MAP
default y if (IA64_SGI_SN2 || IA64_GENERIC) && NUMA
help
Say Y to support efficient handling of discontiguous physical memory,
......@@ -179,7 +179,7 @@ config DISCONTIGMEM
See <file:Documentation/vm/numa> for more.
config IA64_CYCLONE
bool "Support Cyclone(EXA) Time Source"
bool "Cyclone (EXA) Time Source support"
help
Say Y here to enable support for IBM EXA Cyclone time source.
If you're unsure, answer N.
......
arch/ia64/configs/generic_defconfig
View file @ 1d47490a
......@@ -7,25 +7,30 @@
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_STANDALONE=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=20
CONFIG_HOTPLUG=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
#
......@@ -37,6 +42,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
#
# Processor type and features
......@@ -46,55 +52,54 @@ CONFIG_64BIT=y
CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_TIME_INTERPOLATION=y
# CONFIG_ITANIUM is not set
CONFIG_MCKINLEY=y
CONFIG_EFI=y
CONFIG_IA64_GENERIC=y
# CONFIG_IA64_DIG is not set
# CONFIG_IA64_HP_SIM is not set
# CONFIG_IA64_HP_ZX1 is not set
# CONFIG_IA64_SGI_SN2 is not set
# CONFIG_IA64_HP_SIM is not set
# CONFIG_ITANIUM is not set
CONFIG_MCKINLEY=y
# CONFIG_IA64_PAGE_SIZE_4KB is not set
# CONFIG_IA64_PAGE_SIZE_8KB is not set
CONFIG_IA64_PAGE_SIZE_16KB=y
# CONFIG_IA64_PAGE_SIZE_64KB is not set
CONFIG_ACPI=y
CONFIG_ACPI_INTERPRETER=y
CONFIG_ACPI_KERNEL_CONFIG=y
CONFIG_IA64_L1_CACHE_SHIFT=7
# CONFIG_MCKINLEY_ASTEP_SPECIFIC is not set
CONFIG_NUMA=y
CONFIG_DISCONTIGMEM=y
CONFIG_VIRTUAL_MEM_MAP=y
CONFIG_IA64_MCA=y
CONFIG_PM=y
CONFIG_DISCONTIGMEM=y
CONFIG_IA64_CYCLONE=y
CONFIG_IOSAPIC=y
CONFIG_FORCE_MAX_ZONEORDER=18
# CONFIG_HUGETLB_PAGE_SIZE_4GB is not set
# CONFIG_HUGETLB_PAGE_SIZE_1GB is not set
# CONFIG_HUGETLB_PAGE_SIZE_256MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
CONFIG_HUGETLB_PAGE_SIZE_16MB=y
# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_256KB is not set
# CONFIG_IA64_PAL_IDLE is not set
CONFIG_SMP=y
CONFIG_NR_CPUS=512
CONFIG_HOTPLUG_CPU=y
# CONFIG_PREEMPT is not set
CONFIG_HAVE_DEC_LOCK=y
CONFIG_IA32_SUPPORT=y
CONFIG_COMPAT=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_PERFMON=y
CONFIG_IA64_PALINFO=y
CONFIG_EFI=y
#
# Firmware Drivers
#
CONFIG_EFI_VARS=y
CONFIG_NR_CPUS=512
CONFIG_EFI_PCDP=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
#
# Power management and ACPI
#
CONFIG_PM=y
CONFIG_ACPI=y
#
# ACPI (Advanced Configuration and Power Interface) Support
#
CONFIG_ACPI_BOOT=y
CONFIG_ACPI_INTERPRETER=y
CONFIG_ACPI_BUTTON=m
CONFIG_ACPI_FAN=m
CONFIG_ACPI_PROCESSOR=m
......@@ -105,11 +110,15 @@ CONFIG_ACPI_BUS=y
CONFIG_ACPI_POWER=y
CONFIG_ACPI_PCI=y
CONFIG_ACPI_SYSTEM=y
#
# Bus options (PCI, PCMCIA)
#
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
CONFIG_HOTPLUG=y
#
# PCI Hotplug Support
......@@ -118,6 +127,8 @@ CONFIG_HOTPLUG_PCI=m
# CONFIG_HOTPLUG_PCI_FAKE is not set
CONFIG_HOTPLUG_PCI_ACPI=m
# CONFIG_HOTPLUG_PCI_CPCI is not set
# CONFIG_HOTPLUG_PCI_PCIE is not set
# CONFIG_HOTPLUG_PCI_SHPC is not set
#
# PCMCIA/CardBus support
......@@ -125,29 +136,34 @@ CONFIG_HOTPLUG_PCI_ACPI=m
# CONFIG_PCMCIA is not set
#
# Parallel port support
# Device Drivers
#
# CONFIG_PARPORT is not set
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
......@@ -155,9 +171,9 @@ CONFIG_HOTPLUG_PCI_ACPI=m
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
......@@ -168,9 +184,9 @@ CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
CONFIG_BLK_DEV_IDEFLOPPY=y
......@@ -181,6 +197,7 @@ CONFIG_BLK_DEV_IDESCSI=m
#
# IDE chipset support/bugfixes
#
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
......@@ -207,46 +224,17 @@ CONFIG_BLK_DEV_PIIX=y
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
CONFIG_BLK_DEV_SGIIOC4=y
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_BLK_DEV_HD is not set
#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID5=m
CONFIG_MD_MULTIPATH=m
CONFIG_BLK_DEV_DM=m
#
# Fusion MPT device support
#
CONFIG_FUSION=y
CONFIG_FUSION_BOOT=y
CONFIG_FUSION_MAX_SGE=40
# CONFIG_FUSION_ISENSE is not set
# CONFIG_FUSION_CTL is not set
#
# SCSI device support
#
......@@ -267,24 +255,28 @@ CONFIG_CHR_DEV_SG=m
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_REPORT_LUNS=y
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
#
# SCSI Transport Attributes
#
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SCSI_FC_ATTRS=y
#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_PIO is not set
......@@ -297,15 +289,57 @@ CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
CONFIG_SCSI_QLOGIC_FC=y
# CONFIG_SCSI_QLOGIC_FC_FIRMWARE is not set
CONFIG_SCSI_QLOGIC_1280=y
CONFIG_SCSI_QLA2XXX=y
CONFIG_SCSI_QLA21XX=m
CONFIG_SCSI_QLA22XX=m
CONFIG_SCSI_QLA2300=m
CONFIG_SCSI_QLA2322=m
# CONFIG_SCSI_QLA6312 is not set
# CONFIG_SCSI_QLA6322 is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID5=m
CONFIG_MD_RAID6=m
CONFIG_MD_MULTIPATH=m
CONFIG_BLK_DEV_DM=m
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
#
# Fusion MPT device support
#
CONFIG_FUSION=y
CONFIG_FUSION_MAX_SGE=40
# CONFIG_FUSION_ISENSE is not set
# CONFIG_FUSION_CTL is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Networking support
#
......@@ -327,23 +361,21 @@ CONFIG_IP_MULTICAST=y
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
CONFIG_ARPD=y
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
......@@ -359,23 +391,31 @@ CONFIG_IPV6_SCTP__=y
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETPOLL=y
# CONFIG_NETPOLL_RX is not set
# CONFIG_NETPOLL_TRAP is not set
CONFIG_NET_POLL_CONTROLLER=y
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# Ethernet (10 or 100Mbit)
#
......@@ -393,6 +433,7 @@ CONFIG_NET_TULIP=y
CONFIG_TULIP=m
# CONFIG_TULIP_MWI is not set
# CONFIG_TULIP_MMIO is not set
# CONFIG_TULIP_NAPI is not set
# CONFIG_DE4X5 is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
......@@ -402,10 +443,12 @@ CONFIG_NET_PCI=y
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
# CONFIG_DGRS is not set
CONFIG_EEPRO100=m
# CONFIG_EEPRO100_PIO is not set
CONFIG_E100=m
# CONFIG_E100_NAPI is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
......@@ -415,6 +458,7 @@ CONFIG_E100=m
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_VELOCITY is not set
#
# Ethernet (1000 Mbit)
......@@ -427,7 +471,6 @@ CONFIG_E1000=m
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SK98LIN is not set
CONFIG_TIGON3=y
......@@ -435,47 +478,39 @@ CONFIG_TIGON3=y
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
# CONFIG_S2IO is not set
#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
# Wireless LAN (non-hamradio)
#
# CONFIG_HAMRADIO is not set
# CONFIG_NET_RADIO is not set
#
# IrDA (infrared) support
# Wan interfaces
#
# CONFIG_IRDA is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
CONFIG_NETCONSOLE=y
#
# Bluetooth support
# ISDN subsystem
#
# CONFIG_BT is not set
# CONFIG_ISDN is not set
#
# ISDN subsystem
# Telephony Support
#
# CONFIG_ISDN_BOOL is not set
# CONFIG_PHONE is not set
#
# Input device support
......@@ -517,11 +552,13 @@ CONFIG_SERIO_I8042=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
......@@ -534,12 +571,11 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_ROCKETPORT is not set
# CONFIG_CYCLADES is not set
# CONFIG_SYNCLINK is not set
# CONFIG_SYNCLINKMP is not set
# CONFIG_N_HDLC is not set
# CONFIG_STALDRV is not set
CONFIG_SGI_L1_SERIAL=y
CONFIG_SGI_L1_SERIAL_CONSOLE=y
#
# Serial drivers
......@@ -547,7 +583,6 @@ CONFIG_SGI_L1_SERIAL_CONSOLE=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_ACPI=y
CONFIG_SERIAL_8250_HCDP=y
CONFIG_SERIAL_8250_NR_UARTS=6
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
......@@ -560,31 +595,10 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_SGI_L1_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Algorithms
#
#
# I2C Hardware Bus support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_QIC02_TAPE is not set
#
......@@ -597,8 +611,6 @@ CONFIG_UNIX98_PTY_COUNT=256
#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
CONFIG_EFI_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
......@@ -618,182 +630,34 @@ CONFIG_DRM_RADEON=m
CONFIG_DRM_MGA=m
CONFIG_DRM_SIS=m
CONFIG_RAW_DRIVER=m
CONFIG_HPET=y
# CONFIG_HPET_RTC_IRQ is not set
CONFIG_HPET_MMAP=y
CONFIG_MAX_RAW_DEVS=256
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
CONFIG_REISERFS_FS=m
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_XFS_FS=y
# CONFIG_XFS_RT is not set
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
# CONFIG_ZISOFS is not set
CONFIG_UDF_FS=m
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
# CONFIG_NTFS_RW is not set
#
# Pseudo filesystems
# I2C support
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_RAMFS=y
# CONFIG_I2C is not set
#
# Miscellaneous filesystems
# Dallas's 1-wire bus
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_W1 is not set
#
# Network File Systems
# Misc devices
#
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_NFS_DIRECTIO=y
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_TCP=y
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=m
# CONFIG_SUNRPC_GSS is not set
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp437"
CONFIG_CIFS=m
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
# Multimedia devices
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_NEC98_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_EFI_PARTITION=y
# CONFIG_VIDEO_DEV is not set
#
# Native Language Support
# Digital Video Broadcasting Devices
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
# CONFIG_DVB is not set
#
# Graphics support
......@@ -816,6 +680,10 @@ CONFIG_SOUND=m
# Advanced Linux Sound Architecture
#
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
CONFIG_SND_HWDEP=m
CONFIG_SND_RAWMIDI=m
CONFIG_SND_SEQUENCER=m
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_OSSEMUL=y
......@@ -828,6 +696,8 @@ CONFIG_SND_VERBOSE_PRINTK=y
#
# Generic devices
#
CONFIG_SND_MPU401_UART=m
CONFIG_SND_OPL3_LIB=m
CONFIG_SND_DUMMY=m
CONFIG_SND_VIRMIDI=m
CONFIG_SND_MTPAV=m
......@@ -837,13 +707,20 @@ CONFIG_SND_MPU401=m
#
# PCI devices
#
CONFIG_SND_AC97_CODEC=m
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
CONFIG_SND_CS46XX=m
CONFIG_SND_CS46XX_NEW_DSP=y
CONFIG_SND_CS4281=m
CONFIG_SND_EMU10K1=m
# CONFIG_SND_KORG1212 is not set
# CONFIG_SND_MIXART is not set
# CONFIG_SND_NM256 is not set
# CONFIG_SND_RME32 is not set
# CONFIG_SND_RME96 is not set
......@@ -859,9 +736,11 @@ CONFIG_SND_EMU10K1=m
# CONFIG_SND_ES1968 is not set
# CONFIG_SND_MAESTRO3 is not set
CONFIG_SND_FM801=m
# CONFIG_SND_FM801_TEA575X is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_INTEL8X0M is not set
# CONFIG_SND_SONICVIBES is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VX222 is not set
......@@ -893,6 +772,8 @@ CONFIG_USB_DEVICEFS=y
# USB Host Controller Drivers
#
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_EHCI_SPLIT_ISO is not set
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_OHCI_HCD=m
CONFIG_USB_UHCI_HCD=m
......@@ -906,6 +787,7 @@ CONFIG_USB_UHCI_HCD=m
# CONFIG_USB_PRINTER is not set
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_RW_DETECT is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
......@@ -932,13 +814,15 @@ CONFIG_USB_HIDINPUT=y
# CONFIG_USB_WACOM is not set
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set
# CONFIG_USB_MTOUCH is not set
# CONFIG_USB_EGALAX is not set
# CONFIG_USB_XPAD is not set
# CONFIG_USB_ATI_REMOTE is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set
......@@ -972,18 +856,202 @@ CONFIG_USB_HIDINPUT=y
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_TIGL is not set
# CONFIG_USB_AUERSWALD is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_PHIDGETSERVO is not set
# CONFIG_USB_TEST is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
CONFIG_REISERFS_FS=m
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_REISERFS_FS_XATTR is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_XFS_FS=y
# CONFIG_XFS_RT is not set
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
# CONFIG_ZISOFS is not set
CONFIG_UDF_FS=m
CONFIG_UDF_NLS=y
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
# CONFIG_NTFS_RW is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_NFS_DIRECTIO=y
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_TCP=y
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
CONFIG_RPCSEC_GSS_KRB5=m
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp437"
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_POSIX is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_EFI_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
#
# HP Simulator drivers
......@@ -1012,6 +1080,7 @@ CONFIG_MAGIC_SYSRQ=y
# CONFIG_IA64_DEBUG_CMPXCHG is not set
# CONFIG_IA64_DEBUG_IRQ is not set
# CONFIG_DEBUG_INFO is not set
CONFIG_SYSVIPC_COMPAT=y
#
# Security options
......@@ -1025,16 +1094,20 @@ CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
CONFIG_CRYPTO_MD5=m
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_DES is not set
CONFIG_CRYPTO_DES=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_AES_GENERIC is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
arch/ia64/hp/common/sba_iommu.c
View file @ 1d47490a
......@@ -469,6 +469,14 @@ sba_search_bitmap(struct ioc *ioc, unsigned long bits_wanted)
ASSERT(((unsigned long) ioc->res_hint & (sizeof(unsigned long) - 1UL)) == 0);
ASSERT(res_ptr < res_end);
/*
* N.B. REO/Grande defect AR2305 can cause TLB fetch timeouts
* if a TLB entry is purged while in use. sba_mark_invalid()
* purges IOTLB entries in power-of-two sizes, so we also
* allocate IOVA space in power-of-two sizes.
*/
bits_wanted = 1UL << get_iovp_order(bits_wanted << PAGE_SHIFT);
if (likely(bits_wanted == 1)) {
unsigned int bitshiftcnt;
for(; res_ptr < res_end ; res_ptr++) {
......@@ -675,6 +683,8 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
int bits_not_wanted = size >> iovp_shift;
unsigned long m;
/* Round up to power-of-two size: see AR2305 note above */
bits_not_wanted = 1UL << get_iovp_order(bits_not_wanted << PAGE_SHIFT);
for (; bits_not_wanted > 0 ; res_ptr++) {
if (unlikely(bits_not_wanted > BITS_PER_LONG)) {
......
arch/ia64/kernel/acpi.c
View file @ 1d47490a
......@@ -293,20 +293,20 @@ acpi_parse_nmi_src (acpi_table_entry_header *header, const unsigned long end)
return 0;
}
/* Hook from generic ACPI tables.c */
void __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
static void __init
acpi_madt_oem_check (char *oem_id, char *oem_table_id)
{
if (!strncmp(oem_id, "IBM", 3) &&
(!strncmp(oem_table_id, "SERMOW", 6))){
(!strncmp(oem_table_id, "SERMOW", 6))) {
/* Unfortunatly ITC_DRIFT is not yet part of the
/*
* Unfortunately ITC_DRIFT is not yet part of the
* official SAL spec, so the ITC_DRIFT bit is not
* set by the BIOS on this hardware.
*/
sal_platform_features |= IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT;
/*Start cyclone clock*/
cyclone_setup(0);
cyclone_setup();
}
}
......
arch/ia64/kernel/cyclone.c
View file @ 1d47490a
......@@ -10,10 +10,9 @@
#define CYCLONE_TIMER_FREQ 100000000
int use_cyclone;
int __init cyclone_setup(char *str)
void __init cyclone_setup(void)
{
use_cyclone = 1;
return 1;
}
static u32* volatile cyclone_timer; /* Cyclone MPMC0 register */
......
arch/ia64/kernel/mca.c
View file @ 1d47490a
......@@ -130,6 +130,8 @@ static int cpe_poll_enabled = 1;
extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
static int mca_init;
/*
* IA64_MCA log support
*/
......@@ -542,7 +544,7 @@ ia64_mca_register_cpev (int cpev)
}
IA64_MCA_DEBUG("%s: corrected platform error "
"vector %#x setup and enabled\n", __FUNCTION__, cpev);
"vector %#x registered\n", __FUNCTION__, cpev);
}
#endif /* CONFIG_ACPI */
......@@ -551,8 +553,9 @@ ia64_mca_register_cpev (int cpev)
/*
* ia64_mca_cmc_vector_setup
*
* Setup the corrected machine check vector register in the processor and
* unmask interrupt. This function is invoked on a per-processor basis.
* Setup the corrected machine check vector register in the processor.
* (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
* This function is invoked on a per-processor basis.
*
* Inputs
* None
......@@ -566,12 +569,12 @@ ia64_mca_cmc_vector_setup (void)
cmcv_reg_t cmcv;
cmcv.cmcv_regval = 0;
cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
cmcv.cmcv_mask = 1; /* Mask/disable interrupt at first */
cmcv.cmcv_vector = IA64_CMC_VECTOR;
ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
IA64_MCA_DEBUG("%s: CPU %d corrected "
"machine check vector %#x setup and enabled.\n",
"machine check vector %#x registered.\n",
__FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
......@@ -1293,7 +1296,7 @@ ia64_mca_init(void)
*/
register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
ia64_mca_cmc_vector_setup(); /* Setup vector on BSP & enable */
ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */
/* Setup the MCA rendezvous interrupt vector */
register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
......@@ -1303,23 +1306,8 @@ ia64_mca_init(void)
#ifdef CONFIG_ACPI
/* Setup the CPEI/P vector and handler */
{
irq_desc_t *desc;
unsigned int irq;
cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
if (cpe_vector >= 0) {
for (irq = 0; irq < NR_IRQS; ++irq)
if (irq_to_vector(irq) == cpe_vector) {
desc = irq_descp(irq);
desc->status |= IRQ_PER_CPU;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpe_vector);
}
register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
}
#endif
/* Initialize the areas set aside by the OS to buffer the
......@@ -1331,6 +1319,7 @@ ia64_mca_init(void)
ia64_log_init(SAL_INFO_TYPE_CMC);
ia64_log_init(SAL_INFO_TYPE_CPE);
mca_init = 1;
printk(KERN_INFO "MCA related initialization done\n");
}
......@@ -1347,21 +1336,46 @@ ia64_mca_init(void)
static int __init
ia64_mca_late_init(void)
{
if (!mca_init)
return 0;
/* Setup the CMCI/P vector and handler */
init_timer(&cmc_poll_timer);
cmc_poll_timer.function = ia64_mca_cmc_poll;
/* Reset to the correct state */
/* Unmask/enable the vector */
cmc_polling_enabled = 0;
schedule_work(&cmc_enable_work);
IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
#ifdef CONFIG_ACPI
/* Setup the CPEI/P vector and handler */
init_timer(&cpe_poll_timer);
cpe_poll_timer.function = ia64_mca_cpe_poll;
#ifdef CONFIG_ACPI
{
irq_desc_t *desc;
unsigned int irq;
if (cpe_vector >= 0) {
/* If platform supports CPEI, enable the irq. */
cpe_poll_enabled = 0;
for (irq = 0; irq < NR_IRQS; ++irq)
if (irq_to_vector(irq) == cpe_vector) {
desc = irq_descp(irq);
desc->status |= IRQ_PER_CPU;
setup_irq(irq, &mca_cpe_irqaction);
}
ia64_mca_register_cpev(cpe_vector);
IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__);
} else {
/* If platform doesn't support CPEI, get the timer going. */
if (cpe_vector < 0 && cpe_poll_enabled) {
if (cpe_poll_enabled) {
ia64_mca_cpe_poll(0UL);
} else {
cpe_poll_enabled = 0;
IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
}
}
}
#endif
......
arch/ia64/kernel/salinfo.c
View file @ 1d47490a
......@@ -426,8 +426,6 @@ salinfo_log_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
struct inode *inode = file->f_dentry->d_inode;
struct proc_dir_entry *entry = PDE(inode);
struct salinfo_data *data = entry->data;
void *saldata;
size_t size;
u8 *buf;
u64 bufsize;
......@@ -441,18 +439,7 @@ salinfo_log_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
buf = NULL;
bufsize = 0;
}
if (*ppos >= bufsize)
return 0;
saldata = buf + file->f_pos;
size = bufsize - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, saldata, size))
return -EFAULT;
*ppos += size;
return size;
return simple_read_from_buffer(buffer, count, ppos, buf, bufsize);
}
static void
......
arch/ia64/kernel/setup.c
View file @ 1d47490a
......@@ -375,7 +375,8 @@ setup_arch (char **cmdline_p)
}
#endif
/* enable IA-64 Machine Check Abort Handling */
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!strstr(saved_command_line, "nomca"))
ia64_mca_init();
platform_setup(cmdline_p);
......
arch/ia64/kernel/smpboot.c
View file @ 1d47490a
......@@ -299,7 +299,7 @@ smp_callin (void)
smp_setup_percpu_timer();
ia64_mca_cmc_vector_setup(); /* Setup vector on AP & enable */
ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
#ifdef CONFIG_PERFMON
pfm_init_percpu();
......
arch/ia64/sn/io/platform_init/sgi_io_init.c
View file @ 1d47490a
......@@ -37,7 +37,7 @@ nasid_t master_nasid = INVALID_NASID; /* This is the partition master nasid */
*
* This code is executed once for each Hub chip.
*/
static void
static void __init
per_hub_init(cnodeid_t cnode)
{
nasid_t nasid;
......@@ -130,10 +130,8 @@ sgi_master_io_infr_init(void)
klhwg_add_all_modules(hwgraph_root);
klhwg_add_all_nodes(hwgraph_root);
for (cnode = 0; cnode < numionodes; cnode++) {
extern void per_hub_init(cnodeid_t);
for (cnode = 0; cnode < numionodes; cnode++)
per_hub_init(cnode);
}
/*
*
......
arch/ia64/sn/kernel/irq.c
View file @ 1d47490a
......@@ -188,7 +188,7 @@ sn_irq_desc(unsigned int irq)
}
u8
sn_irq_to_vector(u8 irq)
sn_irq_to_vector(unsigned int irq)
{
return(irq);
}
......
arch/ppc/boot/utils/mktree.c
View file @ 1d47490a
......@@ -15,19 +15,20 @@
#include <sys/stat.h>
#include <unistd.h>
#include <netinet/in.h>
#include <stdint.h>
/* This gets tacked on the front of the image. There are also a few
* bytes allocated after the _start label used by the boot rom (see
* head.S for details).
*/
typedef struct boot_block {
unsigned long bb_magic; /* 0x0052504F */
unsigned long bb_dest; /* Target address of the image */
unsigned long bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */
unsigned long bb_debug_flag; /* Run debugger or image after load */
unsigned long bb_entry_point; /* The image address to start */
unsigned long bb_checksum; /* 32 bit checksum including header */
unsigned long reserved[2];
uint32_t bb_magic; /* 0x0052504F */
uint32_t bb_dest; /* Target address of the image */
uint32_t bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */
uint32_t bb_debug_flag; /* Run debugger or image after load */
uint32_t bb_entry_point; /* The image address to start */
uint32_t bb_checksum; /* 32 bit checksum including header */
uint32_t reserved[2];
} boot_block_t;
#define IMGBLK 512
......
arch/ppc/kernel/ppc_htab.c
View file @ 1d47490a
......@@ -19,6 +19,7 @@
#include <linux/ctype.h>
#include <linux/threads.h>
#include <linux/smp_lock.h>
#include <linux/seq_file.h>
#include <asm/uaccess.h>
#include <asm/bitops.h>
......@@ -30,11 +31,9 @@
#include <asm/system.h>
#include <asm/reg.h>
static ssize_t ppc_htab_read(struct file * file, char __user * buf,
size_t count, loff_t *ppos);
static int ppc_htab_show(struct seq_file *m, void *v);
static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
size_t count, loff_t *ppos);
static long long ppc_htab_lseek(struct file * file, loff_t offset, int orig);
int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
void __user *buffer, size_t *lenp);
......@@ -49,10 +48,17 @@ extern unsigned long pte_errors;
extern unsigned int primary_pteg_full;
extern unsigned int htab_hash_searches;
static int ppc_htab_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_htab_show, NULL);
}
struct file_operations ppc_htab_operations = {
.llseek = ppc_htab_lseek,
.read = ppc_htab_read,
.open = ppc_htab_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_htab_write,
.release = single_release,
};
static char *pmc1_lookup(unsigned long mmcr0)
......@@ -96,31 +102,25 @@ static char *pmc2_lookup(unsigned long mmcr0)
* is _REALLY_ slow (see the nested for loops below) but nothing
* in here should be really timing critical. -- Cort
*/
static ssize_t ppc_htab_read(struct file * file, char __user * buf,
size_t count, loff_t *ppos)
static int ppc_htab_show(struct seq_file *m, void *v)
{
unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
int n = 0;
#if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
unsigned int kptes = 0, uptes = 0;
PTE *ptr;
#endif /* CONFIG_PPC_STD_MMU */
char buffer[512];
if (count < 0)
return -EINVAL;
if (cur_cpu_spec[0]->cpu_features & CPU_FTR_604_PERF_MON) {
mmcr0 = mfspr(SPRN_MMCR0);
pmc1 = mfspr(SPRN_PMC1);
pmc2 = mfspr(SPRN_PMC2);
n += sprintf( buffer + n,
seq_printf(m,
"604 Performance Monitoring\n"
"MMCR0\t\t: %08lx %s%s ",
mmcr0,
( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
n += sprintf( buffer + n,
seq_printf(m,
"\nPMC1\t\t: %08lx (%s)\n"
"PMC2\t\t: %08lx (%s)\n",
pmc1, pmc1_lookup(mmcr0),
......@@ -129,10 +129,9 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
#ifdef CONFIG_PPC_STD_MMU
/* if we don't have a htab */
if ( Hash_size == 0 )
{
n += sprintf( buffer + n, "No Hash Table used\n");
goto return_string;
if ( Hash_size == 0 ) {
seq_printf(m, "No Hash Table used\n");
return 0;
}
#ifndef CONFIG_PPC64BRIDGE
......@@ -151,7 +150,7 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
}
#endif
n += sprintf( buffer + n,
seq_printf(m,
"PTE Hash Table Information\n"
"Size\t\t: %luKb\n"
"Buckets\t\t: %lu\n"
......@@ -173,7 +172,7 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
#endif
);
n += sprintf( buffer + n,
seq_printf(m,
"Reloads\t\t: %lu\n"
"Preloads\t: %lu\n"
"Searches\t: %u\n"
......@@ -181,23 +180,13 @@ static ssize_t ppc_htab_read(struct file * file, char __user * buf,
"Evicts\t\t: %lu\n",
htab_reloads, htab_preloads, htab_hash_searches,
primary_pteg_full, htab_evicts);
return_string:
#endif /* CONFIG_PPC_STD_MMU */
n += sprintf( buffer + n,
seq_printf(m,
"Non-error misses: %lu\n"
"Error misses\t: %lu\n",
pte_misses, pte_errors);
if (*ppos >= strlen(buffer))
return 0;
if (n > strlen(buffer) - *ppos)
n = strlen(buffer) - *ppos;
if (n > count)
n = count;
if (copy_to_user(buf, buffer + *ppos, n))
return -EFAULT;
*ppos += n;
return n;
}
/*
......@@ -210,7 +199,7 @@ static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
unsigned long tmp;
char buffer[16];
if ( current->uid != 0 )
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (strncpy_from_user(buffer, ubuffer, 15))
return -EFAULT;
......@@ -330,26 +319,6 @@ static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
#endif /* CONFIG_PPC_STD_MMU */
}
static long long
ppc_htab_lseek(struct file * file, loff_t offset, int orig)
{
long long ret = -EINVAL;
lock_kernel();
switch (orig) {
case 0:
file->f_pos = offset;
ret = file->f_pos;
break;
case 1:
file->f_pos += offset;
ret = file->f_pos;
}
unlock_kernel();
return ret;
}
int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
void __user *buffer_arg, size_t *lenp)
{
......
arch/ppc64/kernel/proc_ppc64.c
View file @ 1d47490a
......@@ -161,21 +161,10 @@ static loff_t page_map_seek( struct file *file, loff_t off, int whence)
return (file->f_pos = new);
}
static ssize_t page_map_read( struct file *file, char *buf, size_t nbytes, loff_t *ppos)
static ssize_t page_map_read( struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
{
unsigned pos = *ppos;
struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
if ( pos >= dp->size )
return 0;
if ( nbytes >= dp->size )
nbytes = dp->size;
if ( pos + nbytes > dp->size )
nbytes = dp->size - pos;
copy_to_user( buf, (char *)dp->data + pos, nbytes );
*ppos = pos + nbytes;
return nbytes;
return simple_read_from_buffer(buf, nbytes, ppos, dp->data, dp->size);
}
static int page_map_mmap( struct file *file, struct vm_area_struct *vma )
......
arch/ppc64/kernel/rtas-proc.c
View file @ 1d47490a
......@@ -21,6 +21,7 @@
#include <linux/time.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/seq_file.h>
#include <asm/uaccess.h>
#include <asm/bitops.h>
......@@ -137,66 +138,122 @@ struct rtas_sensors {
/* ****************************************************************** */
/* Declarations */
static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
int count, int *eof, void *data);
static ssize_t ppc_rtas_clock_read(struct file * file, char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
size_t count, loff_t *ppos);
static ssize_t ppc_rtas_rmo_buf_read(struct file *file, char *buf,
size_t count, loff_t *ppos);
static int ppc_rtas_sensors_show(struct seq_file *m, void *v);
static int ppc_rtas_clock_show(struct seq_file *m, void *v);
static ssize_t ppc_rtas_clock_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos);
static int ppc_rtas_progress_show(struct seq_file *m, void *v);
static ssize_t ppc_rtas_progress_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos);
static int ppc_rtas_poweron_show(struct seq_file *m, void *v);
static ssize_t ppc_rtas_poweron_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_freq_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos);
static int ppc_rtas_tone_freq_show(struct seq_file *m, void *v);
static ssize_t ppc_rtas_tone_volume_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos);
static int ppc_rtas_tone_volume_show(struct seq_file *m, void *v);
static int ppc_rtas_rmo_buf_show(struct seq_file *m, void *v);
static int sensors_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_sensors_show, NULL);
}
struct file_operations ppc_rtas_sensors_operations = {
.open = sensors_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int poweron_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_poweron_show, NULL);
}
struct file_operations ppc_rtas_poweron_operations = {
.read = ppc_rtas_poweron_read,
.write = ppc_rtas_poweron_write
.open = poweron_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_rtas_poweron_write,
.release = single_release,
};
static int progress_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_progress_show, NULL);
}
struct file_operations ppc_rtas_progress_operations = {
.read = ppc_rtas_progress_read,
.write = ppc_rtas_progress_write
.open = progress_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_rtas_progress_write,
.release = single_release,
};
static int clock_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_clock_show, NULL);
}
struct file_operations ppc_rtas_clock_operations = {
.read = ppc_rtas_clock_read,
.write = ppc_rtas_clock_write
.open = clock_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_rtas_clock_write,
.release = single_release,
};
static int tone_freq_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_tone_freq_show, NULL);
}
struct file_operations ppc_rtas_tone_freq_operations = {
.read = ppc_rtas_tone_freq_read,
.write = ppc_rtas_tone_freq_write
.open = tone_freq_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_rtas_tone_freq_write,
.release = single_release,
};
static int tone_volume_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_tone_volume_show, NULL);
}
struct file_operations ppc_rtas_tone_volume_operations = {
.read = ppc_rtas_tone_volume_read,
.write = ppc_rtas_tone_volume_write
.open = tone_volume_open,
.read = seq_read,
.llseek = seq_lseek,
.write = ppc_rtas_tone_volume_write,
.release = single_release,
};
static struct file_operations ppc_rtas_rmo_buf_ops = {
.read = ppc_rtas_rmo_buf_read,
static int rmo_buf_open(struct inode *inode, struct file *file)
{
return single_open(file, ppc_rtas_rmo_buf_show, NULL);
}
struct file_operations ppc_rtas_rmo_buf_ops = {
.open = rmo_buf_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
int ppc_rtas_find_all_sensors (void);
int ppc_rtas_process_sensor(struct individual_sensor s, int state,
int error, char * buf);
char * ppc_rtas_process_error(int error);
int get_location_code(struct individual_sensor s, char * buf);
int check_location_string (char *c, char * buf);
int check_location (char *c, int idx, char * buf);
static int ppc_rtas_find_all_sensors(void);
static void ppc_rtas_process_sensor(struct seq_file *m,
struct individual_sensor *s, int state, int error, char *loc);
static char *ppc_rtas_process_error(int error);
static void get_location_code(struct seq_file *m,
struct individual_sensor *s, char *loc);
static void check_location_string(struct seq_file *m, char *c);
static void check_location(struct seq_file *m, char *c);
static int __init proc_rtas_init(void)
{
......@@ -221,8 +278,9 @@ static int __init proc_rtas_init(void)
if (entry)
entry->proc_fops = &ppc_rtas_poweron_operations;
create_proc_read_entry("ppc64/rtas/sensors", S_IRUGO, NULL,
ppc_rtas_sensor_read, NULL);
entry = create_proc_entry("ppc64/rtas/sensors", S_IRUGO, NULL);
if (entry)
entry->proc_fops = &ppc_rtas_sensors_operations;
entry = create_proc_entry("ppc64/rtas/frequency", S_IWUSR|S_IRUGO,
NULL);
......@@ -242,28 +300,38 @@ static int __init proc_rtas_init(void)
__initcall(proc_rtas_init);
static int parse_number(const char __user *p, size_t count, unsigned long *val)
{
char buf[40];
char *end;
if (count > 39)
return -EINVAL;
if (copy_from_user(buf, p, count))
return -EFAULT;
buf[count] = 0;
*val = simple_strtoul(buf, &end, 10);
if (*end && *end != '\n')
return -EINVAL;
return 0;
}
/* ****************************************************************** */
/* POWER-ON-TIME */
/* ****************************************************************** */
static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
size_t count, loff_t *ppos)
static ssize_t ppc_rtas_poweron_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
char stkbuf[40]; /* its small, its on stack */
struct rtc_time tm;
unsigned long nowtime;
char *dest;
int error;
int error = parse_number(buf, count, &nowtime);
if (error)
return error;
if (39 < count) count = 39;
if (copy_from_user (stkbuf, buf, count)) {
return -EFAULT;
}
stkbuf[count] = 0;
nowtime = simple_strtoul(stkbuf, &dest, 10);
if (*dest != '\0' && *dest != '\n') {
printk("ppc_rtas_poweron_write: Invalid time\n");
return count;
}
power_on_time = nowtime; /* save the time */
to_tm(nowtime, &tm);
......@@ -271,46 +339,32 @@ static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
error = rtas_call(rtas_token("set-time-for-power-on"), 7, 1, NULL,
tm.tm_year, tm.tm_mon, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec, 0 /* nano */);
if (error != 0)
if (error)
printk(KERN_WARNING "error: setting poweron time returned: %s\n",
ppc_rtas_process_error(error));
return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
size_t count, loff_t *ppos)
static int ppc_rtas_poweron_show(struct seq_file *m, void *v)
{
char stkbuf[40]; /* its small, its on stack */
int n, sn;
if (power_on_time == 0)
n = scnprintf(stkbuf,sizeof(stkbuf),"Power on time not set\n");
seq_printf(m, "Power on time not set\n");
else
n = scnprintf(stkbuf,sizeof(stkbuf),"%lu\n",power_on_time);
sn = strlen (stkbuf) +1;
if (*ppos >= sn)
seq_printf(m, "%lu\n",power_on_time);
return 0;
if (n > sn - *ppos)
n = sn - *ppos;
if (n > count)
n = count;
if (copy_to_user (buf, stkbuf + (*ppos), n)) {
return -EFAULT;
}
*ppos += n;
return n;
}
/* ****************************************************************** */
/* PROGRESS */
/* ****************************************************************** */
static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
size_t count, loff_t *ppos)
static ssize_t ppc_rtas_progress_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
unsigned long hex;
if (count >= MAX_LINELENGTH) count = MAX_LINELENGTH -1;
if (copy_from_user (progress_led, buf, count)) { /* save the string */
if (count >= MAX_LINELENGTH)
count = MAX_LINELENGTH -1;
if (copy_from_user(progress_led, buf, count)) { /* save the string */
return -EFAULT;
}
progress_led[count] = 0;
......@@ -321,180 +375,106 @@ static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
ppc_md.progress ((char *)progress_led, hex);
return count;
/* clear the line */ /* ppc_md.progress(" ", 0xffff);*/
/* clear the line */
/* ppc_md.progress(" ", 0xffff);*/
}
/* ****************************************************************** */
static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
size_t count, loff_t *ppos)
static int ppc_rtas_progress_show(struct seq_file *m, void *v)
{
int sn, n = 0;
char *tmpbuf;
if (progress_led == NULL) return 0;
tmpbuf = kmalloc (MAX_LINELENGTH, GFP_KERNEL);
if (!tmpbuf) {
printk(KERN_ERR "error: kmalloc failed\n");
return -ENOMEM;
}
n = sprintf (tmpbuf, "%s\n", progress_led);
sn = strlen (tmpbuf) +1;
if (*ppos >= sn) {
kfree (tmpbuf);
if (progress_led)
seq_printf(m, "%s\n", progress_led);
return 0;
}
if (n > sn - *ppos)
n = sn - *ppos;
if (n > count)
n = count;
if (copy_to_user (buf, tmpbuf + (*ppos), n)) {
kfree (tmpbuf);
return -EFAULT;
}
kfree (tmpbuf);
*ppos += n;
return n;
}
/* ****************************************************************** */
/* CLOCK */
/* ****************************************************************** */
static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf,
size_t count, loff_t *ppos)
static ssize_t ppc_rtas_clock_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
char stkbuf[40]; /* its small, its on stack */
struct rtc_time tm;
unsigned long nowtime;
char *dest;
int error;
if (39 < count) count = 39;
if (copy_from_user (stkbuf, buf, count)) {
return -EFAULT;
}
stkbuf[count] = 0;
nowtime = simple_strtoul(stkbuf, &dest, 10);
if (*dest != '\0' && *dest != '\n') {
printk("ppc_rtas_clock_write: Invalid time\n");
return count;
}
int error = parse_number(buf, count, &nowtime);
if (error)
return error;
to_tm(nowtime, &tm);
error = rtas_call(rtas_token("set-time-of-day"), 7, 1, NULL,
tm.tm_year, tm.tm_mon, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec, 0);
if (error != 0)
if (error)
printk(KERN_WARNING "error: setting the clock returned: %s\n",
ppc_rtas_process_error(error));
return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_clock_read(struct file * file, char * buf,
size_t count, loff_t *ppos)
static int ppc_rtas_clock_show(struct seq_file *m, void *v)
{
unsigned int year, mon, day, hour, min, sec;
int ret[8];
int n, sn, error;
char stkbuf[40]; /* its small, its on stack */
error = rtas_call(rtas_token("get-time-of-day"), 0, 8, ret);
int error = rtas_call(rtas_token("get-time-of-day"), 0, 8, ret);
year = ret[0]; mon = ret[1]; day = ret[2];
hour = ret[3]; min = ret[4]; sec = ret[5];
if (error != 0){
if (error) {
printk(KERN_WARNING "error: reading the clock returned: %s\n",
ppc_rtas_process_error(error));
n = scnprintf (stkbuf, sizeof(stkbuf), "0");
seq_printf(m, "0");
} else {
n = scnprintf (stkbuf, sizeof(stkbuf), "%lu\n",
unsigned int year, mon, day, hour, min, sec;
year = ret[0]; mon = ret[1]; day = ret[2];
hour = ret[3]; min = ret[4]; sec = ret[5];
seq_printf(m, "%lu\n",
mktime(year, mon, day, hour, min, sec));
}
sn = strlen (stkbuf) +1;
if (*ppos >= sn)
return 0;
if (n > sn - *ppos)
n = sn - *ppos;
if (n > count)
n = count;
if (copy_to_user (buf, stkbuf + (*ppos), n)) {
return -EFAULT;
}
*ppos += n;
return n;
}
/* ****************************************************************** */
/* SENSOR STUFF */
/* ****************************************************************** */
static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
int count, int *eof, void *data)
static int ppc_rtas_sensors_show(struct seq_file *m, void *v)
{
int i,j,n;
int i,j;
int state, error;
char *buffer;
int get_sensor_state = rtas_token("get-sensor-state");
if (count < 0)
return -EINVAL;
/* May not be enough */
buffer = kmalloc(MAX_LINELENGTH*MAX_SENSORS, GFP_KERNEL);
if (!buffer)
return -ENOMEM;
memset(buffer, 0, MAX_LINELENGTH*MAX_SENSORS);
n = sprintf ( buffer , "RTAS (RunTime Abstraction Services) Sensor Information\n");
n += sprintf ( buffer+n, "Sensor\t\tValue\t\tCondition\tLocation\n");
n += sprintf ( buffer+n, "********************************************************\n");
seq_printf(m, "RTAS (RunTime Abstraction Services) Sensor Information\n");
seq_printf(m, "Sensor\t\tValue\t\tCondition\tLocation\n");
seq_printf(m, "********************************************************\n");
if (ppc_rtas_find_all_sensors() != 0) {
n += sprintf ( buffer+n, "\nNo sensors are available\n");
goto return_string;
seq_printf(m, "\nNo sensors are available\n");
return 0;
}
for (i=0; i<sensors.quant; i++) {
j = sensors.sensor[i].quant;
/* A sensor may have multiple instances */
while (j >= 0) {
struct individual_sensor *p = &sensors.sensor[i];
char rstr[64];
char *loc;
int llen, offs;
sprintf (rstr, SENSOR_PREFIX"%04d", p->token);
loc = (char *) get_property(rtas_node, rstr, &llen);
/* A sensor may have multiple instances */
for (j = 0, offs = 0; j <= p->quant; j++) {
error = rtas_call(get_sensor_state, 2, 2, &state,
sensors.sensor[i].token,
sensors.sensor[i].quant - j);
n += ppc_rtas_process_sensor(sensors.sensor[i], state,
error, buffer+n );
n += sprintf (buffer+n, "\n");
j--;
} /* while */
} /* for */
return_string:
if (off >= strlen(buffer)) {
*eof = 1;
kfree(buffer);
return 0;
}
if (n > strlen(buffer) - off)
n = strlen(buffer) - off;
if (n > count)
n = count;
else
*eof = 1;
p->token, j);
memcpy(buf, buffer + off, n);
*start = buf;
kfree(buffer);
return n;
ppc_rtas_process_sensor(m, p, state, error, loc);
seq_putc(m, '\n');
if (loc) {
offs += strlen(loc) + 1;
loc += strlen(loc) + 1;
if (offs >= llen)
loc = NULL;
}
}
}
return 0;
}
/* ****************************************************************** */
int ppc_rtas_find_all_sensors (void)
static int ppc_rtas_find_all_sensors(void)
{
unsigned int *utmp;
int len, i;
......@@ -518,7 +498,7 @@ int ppc_rtas_find_all_sensors (void)
/*
* Builds a string of what rtas returned
*/
char * ppc_rtas_process_error(int error)
static char *ppc_rtas_process_error(int error)
{
switch (error) {
case SENSOR_CRITICAL_HIGH:
......@@ -551,8 +531,8 @@ char * ppc_rtas_process_error(int error)
* Builds a string out of what the sensor said
*/
int ppc_rtas_process_sensor(struct individual_sensor s, int state,
int error, char * buf)
static void ppc_rtas_process_sensor(struct seq_file *m,
struct individual_sensor *s, int state, int error, char *loc)
{
/* Defined return vales */
const char * key_switch[] = { "Off\t", "Normal\t", "Secure\t",
......@@ -578,174 +558,170 @@ int ppc_rtas_process_sensor(struct individual_sensor s, int state,
int num_states = 0;
int temperature = 0;
int unknown = 0;
int n = 0;
/* What kind of sensor do we have here? */
switch (s.token) {
switch (s->token) {
case KEY_SWITCH:
n += sprintf(buf+n, "Key switch:\t");
seq_printf(m, "Key switch:\t");
num_states = sizeof(key_switch) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t", key_switch[state]);
seq_printf(m, "%s\t", key_switch[state]);
have_strings = 1;
}
break;
case ENCLOSURE_SWITCH:
n += sprintf(buf+n, "Enclosure switch:\t");
seq_printf(m, "Enclosure switch:\t");
num_states = sizeof(enclosure_switch) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
enclosure_switch[state]);
have_strings = 1;
}
break;
case THERMAL_SENSOR:
n += sprintf(buf+n, "Temp. (C/F):\t");
seq_printf(m, "Temp. (C/F):\t");
temperature = 1;
break;
case LID_STATUS:
n += sprintf(buf+n, "Lid status:\t");
seq_printf(m, "Lid status:\t");
num_states = sizeof(lid_status) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t", lid_status[state]);
seq_printf(m, "%s\t", lid_status[state]);
have_strings = 1;
}
break;
case POWER_SOURCE:
n += sprintf(buf+n, "Power source:\t");
seq_printf(m, "Power source:\t");
num_states = sizeof(power_source) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
power_source[state]);
have_strings = 1;
}
break;
case BATTERY_VOLTAGE:
n += sprintf(buf+n, "Battery voltage:\t");
seq_printf(m, "Battery voltage:\t");
break;
case BATTERY_REMAINING:
n += sprintf(buf+n, "Battery remaining:\t");
seq_printf(m, "Battery remaining:\t");
num_states = sizeof(battery_remaining) / sizeof(char *);
if (state < num_states)
{
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
battery_remaining[state]);
have_strings = 1;
}
break;
case BATTERY_PERCENTAGE:
n += sprintf(buf+n, "Battery percentage:\t");
seq_printf(m, "Battery percentage:\t");
break;
case EPOW_SENSOR:
n += sprintf(buf+n, "EPOW Sensor:\t");
seq_printf(m, "EPOW Sensor:\t");
num_states = sizeof(epow_sensor) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t", epow_sensor[state]);
seq_printf(m, "%s\t", epow_sensor[state]);
have_strings = 1;
}
break;
case BATTERY_CYCLESTATE:
n += sprintf(buf+n, "Battery cyclestate:\t");
seq_printf(m, "Battery cyclestate:\t");
num_states = sizeof(battery_cyclestate) /
sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
battery_cyclestate[state]);
have_strings = 1;
}
break;
case BATTERY_CHARGING:
n += sprintf(buf+n, "Battery Charging:\t");
seq_printf(m, "Battery Charging:\t");
num_states = sizeof(battery_charging) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
battery_charging[state]);
have_strings = 1;
}
break;
case IBM_SURVEILLANCE:
n += sprintf(buf+n, "Surveillance:\t");
seq_printf(m, "Surveillance:\t");
break;
case IBM_FANRPM:
n += sprintf(buf+n, "Fan (rpm):\t");
seq_printf(m, "Fan (rpm):\t");
break;
case IBM_VOLTAGE:
n += sprintf(buf+n, "Voltage (mv):\t");
seq_printf(m, "Voltage (mv):\t");
break;
case IBM_DRCONNECTOR:
n += sprintf(buf+n, "DR connector:\t");
seq_printf(m, "DR connector:\t");
num_states = sizeof(ibm_drconnector) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
ibm_drconnector[state]);
have_strings = 1;
}
break;
case IBM_POWERSUPPLY:
n += sprintf(buf+n, "Powersupply:\t");
seq_printf(m, "Powersupply:\t");
break;
case IBM_INTQUEUE:
n += sprintf(buf+n, "Interrupt queue:\t");
seq_printf(m, "Interrupt queue:\t");
num_states = sizeof(ibm_intqueue) / sizeof(char *);
if (state < num_states) {
n += sprintf(buf+n, "%s\t",
seq_printf(m, "%s\t",
ibm_intqueue[state]);
have_strings = 1;
}
break;
default:
n += sprintf(buf+n, "Unknown sensor (type %d), ignoring it\n",
s.token);
seq_printf(m, "Unknown sensor (type %d), ignoring it\n",
s->token);
unknown = 1;
have_strings = 1;
break;
}
if (have_strings == 0) {
if (temperature) {
n += sprintf(buf+n, "%4d /%4d\t", state, cel_to_fahr(state));
seq_printf(m, "%4d /%4d\t", state, cel_to_fahr(state));
} else
n += sprintf(buf+n, "%10d\t", state);
seq_printf(m, "%10d\t", state);
}
if (unknown == 0) {
n += sprintf ( buf+n, "%s\t", ppc_rtas_process_error(error));
n += get_location_code(s, buf+n);
seq_printf(m, "%s\t", ppc_rtas_process_error(error));
get_location_code(m, s, loc);
}
return n;
}
/* ****************************************************************** */
int check_location (char *c, int idx, char * buf)
static void check_location(struct seq_file *m, char *c)
{
int n = 0;
switch (*(c+idx)) {
switch (c[0]) {
case LOC_PLANAR:
n += sprintf ( buf, "Planar #%c", *(c+idx+1));
seq_printf(m, "Planar #%c", c[1]);
break;
case LOC_CPU:
n += sprintf ( buf, "CPU #%c", *(c+idx+1));
seq_printf(m, "CPU #%c", c[1]);
break;
case LOC_FAN:
n += sprintf ( buf, "Fan #%c", *(c+idx+1));
seq_printf(m, "Fan #%c", c[1]);
break;
case LOC_RACKMOUNTED:
n += sprintf ( buf, "Rack #%c", *(c+idx+1));
seq_printf(m, "Rack #%c", c[1]);
break;
case LOC_VOLTAGE:
n += sprintf ( buf, "Voltage #%c", *(c+idx+1));
seq_printf(m, "Voltage #%c", c[1]);
break;
case LOC_LCD:
n += sprintf ( buf, "LCD #%c", *(c+idx+1));
seq_printf(m, "LCD #%c", c[1]);
break;
case '.':
n += sprintf ( buf, "- %c", *(c+idx+1));
seq_printf(m, "- %c", c[1]);
break;
default:
n += sprintf ( buf, "Unknown location");
seq_printf(m, "Unknown location");
break;
}
return n;
}
......@@ -755,199 +731,88 @@ int check_location (char *c, int idx, char * buf)
* ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ]
* the '.' may be an abbrevation
*/
int check_location_string (char *c, char *buf)
static void check_location_string(struct seq_file *m, char *c)
{
int n=0,i=0;
while (c[i]) {
if (isalpha(c[i]) || c[i] == '.') {
n += check_location(c, i, buf+n);
}
else if (c[i] == '/' || c[i] == '-')
n += sprintf(buf+n, " at ");
i++;
while (*c) {
if (isalpha(*c) || *c == '.')
check_location(m, c);
else if (*c == '/' || *c == '-')
seq_printf(m, " at ");
c++;
}
return n;
}
/* ****************************************************************** */
int get_location_code(struct individual_sensor s, char * buffer)
static void get_location_code(struct seq_file *m, struct individual_sensor *s, char *loc)
{
char rstr[512], tmp[10], tmp2[10];
int n=0, i=0, llen, len;
/* char *buf = kmalloc(MAX_LINELENGTH, GFP_KERNEL); */
char *ret;
static int pos = 0; /* remember position where buffer was */
/* construct the sensor number like 0003 */
/* fill with zeros */
n = sprintf(tmp, "%d", s.token);
len = strlen(tmp);
while (strlen(tmp) < 4)
n += sprintf (tmp+n, "0");
/* invert the string */
while (tmp[i]) {
if (i<len)
tmp2[4-len+i] = tmp[i];
else
tmp2[3-i] = tmp[i];
i++;
}
tmp2[4] = '\0';
sprintf (rstr, SENSOR_PREFIX"%s", tmp2);
ret = (char *) get_property(rtas_node, rstr, &llen);
n=0;
if (ret == NULL || ret[0] == '\0') {
n += sprintf ( buffer+n, "--- ");/* does not have a location */
if (!loc || !*loc) {
seq_printf(m, "---");/* does not have a location */
} else {
char t[50];
ret += pos;
n += check_location_string(ret, buffer + n);
n += sprintf ( buffer+n, " ");
/* see how many characters we have printed */
scnprintf(t, sizeof(t), "%s ", ret);
pos += strlen(t);
if (pos >= llen) pos=0;
check_location_string(m, loc);
}
return n;
seq_putc(m, ' ');
}
/* ****************************************************************** */
/* INDICATORS - Tone Frequency */
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
size_t count, loff_t *ppos)
static ssize_t ppc_rtas_tone_freq_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
char stkbuf[40]; /* its small, its on stack */
unsigned long freq;
char *dest;
int error;
int error = parse_number(buf, count, &freq);
if (error)
return error;
if (39 < count) count = 39;
if (copy_from_user (stkbuf, buf, count)) {
return -EFAULT;
}
stkbuf[count] = 0;
freq = simple_strtoul(stkbuf, &dest, 10);
if (*dest != '\0' && *dest != '\n') {
printk("ppc_rtas_tone_freq_write: Invalid tone freqency\n");
return count;
}
if (freq < 0) freq = 0;
rtas_tone_frequency = freq; /* save it for later */
error = rtas_call(rtas_token("set-indicator"), 3, 1, NULL,
TONE_FREQUENCY, 0, freq);
if (error != 0)
if (error)
printk(KERN_WARNING "error: setting tone frequency returned: %s\n",
ppc_rtas_process_error(error));
return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
size_t count, loff_t *ppos)
static int ppc_rtas_tone_freq_show(struct seq_file *m, void *v)
{
int n, sn;
char stkbuf[40]; /* its small, its on stack */
n = scnprintf(stkbuf, 40, "%lu\n", rtas_tone_frequency);
sn = strlen (stkbuf) +1;
if (*ppos >= sn)
seq_printf(m, "%lu\n", rtas_tone_frequency);
return 0;
if (n > sn - *ppos)
n = sn - *ppos;
if (n > count)
n = count;
if (copy_to_user (buf, stkbuf + (*ppos), n)) {
return -EFAULT;
}
*ppos += n;
return n;
}
/* ****************************************************************** */
/* INDICATORS - Tone Volume */
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
size_t count, loff_t *ppos)
static ssize_t ppc_rtas_tone_volume_write(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
char stkbuf[40]; /* its small, its on stack */
unsigned long volume;
char *dest;
int error;
int error = parse_number(buf, count, &volume);
if (error)
return error;
if (39 < count) count = 39;
if (copy_from_user (stkbuf, buf, count)) {
return -EFAULT;
}
stkbuf[count] = 0;
volume = simple_strtoul(stkbuf, &dest, 10);
if (*dest != '\0' && *dest != '\n') {
printk("ppc_rtas_tone_volume_write: Invalid tone volume\n");
return count;
}
if (volume < 0) volume = 0;
if (volume > 100) volume = 100;
if (volume > 100)
volume = 100;
rtas_tone_volume = volume; /* save it for later */
error = rtas_call(rtas_token("set-indicator"), 3, 1, NULL,
TONE_VOLUME, 0, volume);
if (error != 0)
if (error)
printk(KERN_WARNING "error: setting tone volume returned: %s\n",
ppc_rtas_process_error(error));
return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
size_t count, loff_t *ppos)
static int ppc_rtas_tone_volume_show(struct seq_file *m, void *v)
{
int n, sn;
char stkbuf[40]; /* its small, its on stack */
n = scnprintf(stkbuf, 40, "%lu\n", rtas_tone_volume);
sn = strlen (stkbuf) +1;
if (*ppos >= sn)
seq_printf(m, "%lu\n", rtas_tone_volume);
return 0;
if (n > sn - *ppos)
n = sn - *ppos;
if (n > count)
n = count;
if (copy_to_user (buf, stkbuf + (*ppos), n)) {
return -EFAULT;
}
*ppos += n;
return n;
}
#define RMO_READ_BUF_MAX 30
/* RTAS Userspace access */
static ssize_t ppc_rtas_rmo_buf_read(struct file *file, char __user *buf,
size_t count, loff_t *ppos)
static int ppc_rtas_rmo_buf_show(struct seq_file *m, void *v)
{
char kbuf[RMO_READ_BUF_MAX];
int n;
n = sprintf(kbuf, "%016lx %x\n", rtas_rmo_buf, RTAS_RMOBUF_MAX);
if (n > count)
n = count;
if (ppos && *ppos != 0)
seq_printf(m, "%016lx %x\n", rtas_rmo_buf, RTAS_RMOBUF_MAX);
return 0;
if (copy_to_user(buf, kbuf, n))
return -EFAULT;
if (ppos)
*ppos = n;
return n;
}
crypto/Kconfig
View file @ 1d47490a
......@@ -118,7 +118,7 @@ config CRYPTO_SERPENT
See also:
http://www.cl.cam.ac.uk/~rja14/serpent.html
config CRYPTO_AES_GENERIC
config CRYPTO_AES
tristate "AES cipher algorithms"
depends on CRYPTO && !(X86 && !X86_64)
help
......
drivers/acpi/system.c
View file @ 1d47490a
......@@ -92,8 +92,7 @@ acpi_system_read_dsdt (
{
acpi_status status = AE_OK;
struct acpi_buffer dsdt = {ACPI_ALLOCATE_BUFFER, NULL};
void *data = NULL;
size_t size = 0;
ssize_t res;
ACPI_FUNCTION_TRACE("acpi_system_read_dsdt");
......@@ -101,22 +100,11 @@ acpi_system_read_dsdt (
if (ACPI_FAILURE(status))
return_VALUE(-ENODEV);
if (*ppos < dsdt.length) {
data = dsdt.pointer + file->f_pos;
size = dsdt.length - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, data, size)) {
res = simple_read_from_buffer(buffer, count, ppos,
dsdt.pointer, dsdt.length);
acpi_os_free(dsdt.pointer);
return_VALUE(-EFAULT);
}
}
acpi_os_free(dsdt.pointer);
*ppos += size;
return_VALUE(size);
return_VALUE(res);
}
......@@ -135,8 +123,7 @@ acpi_system_read_fadt (
{
acpi_status status = AE_OK;
struct acpi_buffer fadt = {ACPI_ALLOCATE_BUFFER, NULL};
void *data = NULL;
size_t size = 0;
ssize_t res;
ACPI_FUNCTION_TRACE("acpi_system_read_fadt");
......@@ -144,22 +131,11 @@ acpi_system_read_fadt (
if (ACPI_FAILURE(status))
return_VALUE(-ENODEV);
if (*ppos < fadt.length) {
data = fadt.pointer + file->f_pos;
size = fadt.length - file->f_pos;
if (size > count)
size = count;
if (copy_to_user(buffer, data, size)) {
res = simple_read_from_buffer(buffer, count, ppos,
fadt.pointer, fadt.length);
acpi_os_free(fadt.pointer);
return_VALUE(-EFAULT);
}
}
acpi_os_free(fadt.pointer);
*ppos += size;
return_VALUE(size);
return_VALUE(res);
}
......
drivers/md/multipath.c
View file @ 1d47490a
......@@ -120,7 +120,7 @@ int multipath_end_request(struct bio *bio, unsigned int bytes_done, int error)
if (uptodate)
multipath_end_bh_io(mp_bh, uptodate);
else {
else if ((bio->bi_rw & (1 << BIO_RW_AHEAD)) == 0) {
/*
* oops, IO error:
*/
......@@ -130,7 +130,8 @@ int multipath_end_request(struct bio *bio, unsigned int bytes_done, int error)
bdevname(rdev->bdev,b),
(unsigned long long)bio->bi_sector);
multipath_reschedule_retry(mp_bh);
}
} else
multipath_end_bh_io(mp_bh, 0);
rdev_dec_pending(rdev, conf->mddev);
return 0;
}
......@@ -382,7 +383,11 @@ static void multipathd (mddev_t *mddev)
" to another IO path\n",
bdevname(bio->bi_bdev,b),
(unsigned long long)bio->bi_sector);
*bio = *(mp_bh->master_bio);
bio->bi_bdev = conf->multipaths[mp_bh->path].rdev->bdev;
bio->bi_rw |= (1 << BIO_RW_FAILFAST);
bio->bi_end_io = multipath_end_request;
bio->bi_private = mp_bh;
generic_make_request(bio);
}
}
......
drivers/mtd/chips/cfi_cmdset_0020.c
View file @ 1d47490a
......@@ -4,7 +4,7 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0020.c,v 1.13 2004/07/12 21:52:50 dwmw2 Exp $
* $Id: cfi_cmdset_0020.c,v 1.14 2004/07/20 02:44:25 dwmw2 Exp $
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
* - completely revamped method functions so they are aware and
......@@ -1400,11 +1400,6 @@ static void cfi_staa_destroy(struct mtd_info *mtd)
kfree(cfi);
}
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define cfi_staa_init init_module
#define cfi_staa_exit cleanup_module
#endif
static char im_name[]="cfi_cmdset_0020";
int __init cfi_staa_init(void)
......
drivers/mtd/devices/pmc551.c
View file @ 1d47490a
/*
* $Id: pmc551.c,v 1.26 2004/07/14 17:25:07 dwmw2 Exp $
* $Id: pmc551.c,v 1.27 2004/07/20 02:44:26 dwmw2 Exp $
*
* PMC551 PCI Mezzanine Ram Device
*
......@@ -109,12 +109,6 @@
#include <linux/mtd/pmc551.h>
#include <linux/mtd/compatmac.h>
#if LINUX_VERSION_CODE > 0x20300
#define PCI_BASE_ADDRESS(dev) (dev->resource[0].start)
#else
#define PCI_BASE_ADDRESS(dev) (dev->base_address[0])
#endif
static struct mtd_info *pmc551list;
static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
......@@ -564,7 +558,7 @@ static u32 fixup_pmc551 (struct pci_dev *dev)
(size<1024)?size:(size<1048576)?size>>10:size>>20,
(size<1024)?'B':(size<1048576)?'K':'M',
size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
PCI_BASE_ADDRESS(dev)&PCI_BASE_ADDRESS_MEM_MASK );
(dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK );
/*
* Check to see the state of the memory
......@@ -694,7 +688,7 @@ int __init init_pmc551(void)
}
printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
PCI_BASE_ADDRESS(PCI_Device));
PCI_Device->resource[0].start);
/*
* The PMC551 device acts VERY weird if you don't init it
......@@ -748,7 +742,7 @@ int __init init_pmc551(void)
printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
priv->asize = asize;
}
priv->start = ioremap((PCI_BASE_ADDRESS(PCI_Device)
priv->start = ioremap(((PCI_Device->resource[0].start)
& PCI_BASE_ADDRESS_MEM_MASK),
priv->asize);
......
drivers/mtd/mtdcore.c
View file @ 1d47490a
/*
* $Id: mtdcore.c,v 1.42 2004/07/13 10:21:13 dwmw2 Exp $
* $Id: mtdcore.c,v 1.43 2004/07/23 15:20:46 dwmw2 Exp $
*
* Core registration and callback routines for MTD
* drivers and users.
*
*/
#include <linux/version.h>
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
......
drivers/mtd/nand/autcpu12.c
View file @ 1d47490a
......@@ -6,7 +6,7 @@
* Derived from drivers/mtd/spia.c
* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
*
* $Id: autcpu12.c,v 1.19 2004/07/12 15:02:15 dwmw2 Exp $
* $Id: autcpu12.c,v 1.20 2004/07/20 02:44:26 dwmw2 Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -44,14 +44,6 @@
*/
static struct mtd_info *autcpu12_mtd = NULL;
/*
* Module stuff
*/
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define autcpu12_init init_module
#define autcpu12_cleanup cleanup_module
#endif
static int autcpu12_io_base = CS89712_VIRT_BASE;
static int autcpu12_fio_pbase = AUTCPU12_PHYS_SMC;
static int autcpu12_fio_ctrl = AUTCPU12_SMC_SELECT_OFFSET;
......
drivers/mtd/nand/tx4925ndfmc.c
View file @ 1d47490a
......@@ -11,7 +11,7 @@
* Derived from drivers/mtd/autcpu12.c
* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
*
* $Id: tx4925ndfmc.c,v 1.2 2004/03/27 19:55:53 gleixner Exp $
* $Id: tx4925ndfmc.c,v 1.3 2004/07/20 02:44:26 dwmw2 Exp $
*
* Copyright (C) 2001 Toshiba Corporation
*
......@@ -39,14 +39,6 @@ extern struct nand_oobinfo jffs2_oobinfo;
*/
static struct mtd_info *tx4925ndfmc_mtd = NULL;
/*
* Module stuff
*/
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define tx4925ndfmc_init init_module
#define tx4925ndfmc_cleanup cleanup_module
#endif
/*
* Define partitions for flash devices
*/
......
drivers/oprofile/oprofilefs.c
View file @ 1d47490a
......@@ -47,23 +47,7 @@ static struct super_operations s_ops = {
ssize_t oprofilefs_str_to_user(char const * str, char __user * buf, size_t count, loff_t * offset)
{
size_t len = strlen(str);
if (!count)
return 0;
if (*offset > len)
return 0;
if (count > len - *offset)
count = len - *offset;
if (copy_to_user(buf, str + *offset, count))
return -EFAULT;
*offset += count;
return count;
return simple_read_from_buffer(buf, count, offset, str, strlen(str));
}
......@@ -72,29 +56,10 @@ ssize_t oprofilefs_str_to_user(char const * str, char __user * buf, size_t count
ssize_t oprofilefs_ulong_to_user(unsigned long val, char __user * buf, size_t count, loff_t * offset)
{
char tmpbuf[TMPBUFSIZE];
size_t maxlen;
if (!count)
return 0;
spin_lock(&oprofilefs_lock);
maxlen = snprintf(tmpbuf, TMPBUFSIZE, "%lu\n", val);
spin_unlock(&oprofilefs_lock);
size_t maxlen = snprintf(tmpbuf, TMPBUFSIZE, "%lu\n", val);
if (maxlen > TMPBUFSIZE)
maxlen = TMPBUFSIZE;
if (*offset > maxlen)
return 0;
if (count > maxlen - *offset)
count = maxlen - *offset;
if (copy_to_user(buf, tmpbuf + *offset, count))
return -EFAULT;
*offset += count;
return count;
return simple_read_from_buffer(buf, count, offset, tmpbuf, maxlen);
}
......
drivers/scsi/imm.c
View file @ 1d47490a
......@@ -1118,6 +1118,12 @@ static int device_check(imm_struct *dev)
return -ENODEV;
}
static int imm_adjust_queue(struct scsi_device *device)
{
blk_queue_bounce_limit(device->request_queue, BLK_BOUNCE_HIGH);
return 0;
}
static struct scsi_host_template imm_template = {
.module = THIS_MODULE,
.proc_name = "imm",
......@@ -1133,6 +1139,7 @@ static struct scsi_host_template imm_template = {
.cmd_per_lun = 1,
.use_clustering = ENABLE_CLUSTERING,
.can_queue = 1,
.slave_alloc = imm_adjust_queue,
};
/***************************************************************************
......
drivers/usb/host/uhci-debug.c
View file @ 1d47490a
......@@ -571,22 +571,7 @@ static ssize_t uhci_proc_read(struct file *file, char __user *buf,
size_t nbytes, loff_t *ppos)
{
struct uhci_proc *up = file->private_data;
unsigned int pos;
unsigned int size;
pos = *ppos;
size = up->size;
if (pos >= size)
return 0;
if (nbytes > size - pos)
nbytes = size - pos;
if (copy_to_user(buf, up->data + pos, nbytes))
return -EFAULT;
*ppos += nbytes;
return nbytes;
return simple_read_from_buffer(buf, nbytes, ppos, up->data, up->size);
}
static int uhci_proc_release(struct inode *inode, struct file *file)
......
fs/Kconfig
View file @ 1d47490a
......@@ -1076,24 +1076,20 @@ config JFFS2_FS_DEBUG
messages at debug level 1 while the misbehaviour was occurring.
config JFFS2_FS_NAND
bool "JFFS2 support for NAND flash (EXPERIMENTAL)"
depends on JFFS2_FS && EXPERIMENTAL
bool "JFFS2 support for NAND flash"
depends on JFFS2_FS
default n
help
This enables the experimental support for NAND flash in JFFS2. NAND
is a newer type of flash chip design than the traditional NOR flash,
with higher density but a handful of characteristics which make it
more interesting for the file system to use. Support for NAND flash
is not yet complete and may corrupt data. For further information,
including a link to the mailing list where details of the remaining
work to be completed for NAND flash support can be found, see the
JFFS2 web site at <http://sources.redhat.com/jffs2>.
This enables the support for NAND flash in JFFS2. NAND is a newer
type of flash chip design than the traditional NOR flash, with
higher density but a handful of characteristics which make it more
interesting for the file system to use.
Say 'N' unless you have NAND flash and you are willing to test and
develop JFFS2 support for it.
Say 'N' unless you have NAND flash.
config JFFS2_COMPRESSION_OPTIONS
bool "Advanced compression options for JFFS2"
depends on JFFS2_FS
default n
help
Enabling this option allows you to explicitly choose which
......
fs/dcache.c
View file @ 1d47490a
......@@ -628,7 +628,7 @@ void shrink_dcache_anon(struct hlist_head *head)
struct dentry *this = hlist_entry(lp, struct dentry, d_hash);
if (!list_empty(&this->d_lru)) {
dentry_stat.nr_unused--;
list_del(&this->d_lru);
list_del_init(&this->d_lru);
}
/*
......
fs/libfs.c
View file @ 1d47490a
......@@ -7,6 +7,7 @@
#include <linux/pagemap.h>
#include <linux/mount.h>
#include <linux/vfs.h>
#include <asm/uaccess.h>
int simple_getattr(struct vfsmount *mnt, struct dentry *dentry,
struct kstat *stat)
......@@ -439,6 +440,22 @@ void simple_release_fs(struct vfsmount **mount, int *count)
mntput(mnt);
}
ssize_t simple_read_from_buffer(void __user *to, size_t count, loff_t *ppos,
const void *from, size_t available)
{
loff_t pos = *ppos;
if (pos < 0)
return -EINVAL;
if (pos >= available)
return 0;
if (count > available - pos)
count = available - pos;
if (copy_to_user(to, from + pos, count))
return -EFAULT;
*ppos = pos + count;
return count;
}
EXPORT_SYMBOL(dcache_dir_close);
EXPORT_SYMBOL(dcache_dir_lseek);
EXPORT_SYMBOL(dcache_dir_open);
......@@ -461,3 +478,4 @@ EXPORT_SYMBOL(simple_rmdir);
EXPORT_SYMBOL(simple_statfs);
EXPORT_SYMBOL(simple_sync_file);
EXPORT_SYMBOL(simple_unlink);
EXPORT_SYMBOL(simple_read_from_buffer);
fs/proc/array.c
View file @ 1d47490a
......@@ -137,6 +137,7 @@ static inline const char * get_task_state(struct task_struct *tsk)
TASK_INTERRUPTIBLE |
TASK_UNINTERRUPTIBLE |
TASK_ZOMBIE |
TASK_DEAD |
TASK_STOPPED);
const char **p = &task_state_array[0];
......
include/asm-arm/arch-s3c2410/hardware.h
View file @ 1d47490a
......@@ -26,6 +26,41 @@ extern unsigned long s3c2410_pclk;
extern unsigned long s3c2410_hclk;
extern unsigned long s3c2410_fclk;
/* external functions for GPIO support
*
* These allow various different clients to access the same GPIO
* registers without conflicting. If your driver only owns the entire
* GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
*/
/* s3c2410_gpio_cfgpin
*
* set the configuration of the given pin to the value passed.
*
* eg:
* s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0);
* s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
*/
extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
/* s3c2410_gpio_pullup
*
* configure the pull-up control on the given pin
*
* to = 1 => disable the pull-up
* 0 => enable the pull-up
*
* eg;
*
* s3c2410_gpio_pullup(S3C2410_GPB0, 0);
* s3c2410_gpio_pullup(S3C2410_GPE8, 0);
*/
extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
#endif /* __ASSEMBLY__ */
#include <asm/sizes.h>
......
include/asm-arm/arch-s3c2410/regs-gpio.h
View file @ 1d47490a
/* linux/include/asm/hardware/s3c2410/
*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* Copyright (c) 2003,2004 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
* This program is free software; you can redistribute it and/or modify
......@@ -13,12 +13,31 @@
* 19-06-2003 BJD Created file
* 23-06-2003 BJD Updated GSTATUS registers
* 12-03-2004 BJD Updated include protection
* 20-07-2004 BJD Added GPIO pin numbers, added Port A definitions
*/
#ifndef __ASM_ARCH_REGS_GPIO_H
#define __ASM_ARCH_REGS_GPIO_H "$Id: gpio.h,v 1.5 2003/05/19 12:51:08 ben Exp $"
#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
#define S3C2410_GPIO_BANKA (32*0)
#define S3C2410_GPIO_BANKB (32*1)
#define S3C2410_GPIO_BANKC (32*2)
#define S3C2410_GPIO_BANKD (32*3)
#define S3C2410_GPIO_BANKE (32*4)
#define S3C2410_GPIO_BANKF (32*5)
#define S3C2410_GPIO_BANKG (32*6)
#define S3C2410_GPIO_BANKH (32*7)
#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C2410_VA_GPIO)
#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31)
/* general configuration options */
#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
/* configure GPIO ports A..G */
#define S3C2410_GPIOREG(x) ((x) + S3C2410_VA_GPIO)
......@@ -29,6 +48,98 @@
#define S3C2410_GPACON S3C2410_GPIOREG(0x00)
#define S3C2410_GPADAT S3C2410_GPIOREG(0x04)
#define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0)
#define S3C2410_GPA0_OUT (0<<0)
#define S3C2410_GPA0_ADDR0 (1<<0)
#define S3C2410_GPA1 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 1)
#define S3C2410_GPA1_OUT (0<<1)
#define S3C2410_GPA1_ADDR16 (1<<1)
#define S3C2410_GPA2 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 2)
#define S3C2410_GPA2_OUT (0<<2)
#define S3C2410_GPA2_ADDR17 (1<<2)
#define S3C2410_GPA3 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 3)
#define S3C2410_GPA3_OUT (0<<3)
#define S3C2410_GPA3_ADDR18 (1<<3)
#define S3C2410_GPA4 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 4)
#define S3C2410_GPA4_OUT (0<<4)
#define S3C2410_GPA4_ADDR19 (1<<4)
#define S3C2410_GPA5 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 5)
#define S3C2410_GPA5_OUT (0<<5)
#define S3C2410_GPA5_ADDR20 (1<<5)
#define S3C2410_GPA6 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 6)
#define S3C2410_GPA6_OUT (0<<6)
#define S3C2410_GPA6_ADDR21 (1<<6)
#define S3C2410_GPA7 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 7)
#define S3C2410_GPA7_OUT (0<<7)
#define S3C2410_GPA7_ADDR22 (1<<7)
#define S3C2410_GPA8 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 8)
#define S3C2410_GPA8_OUT (0<<8)
#define S3C2410_GPA8_ADDR23 (1<<8)
#define S3C2410_GPA9 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 9)
#define S3C2410_GPA9_OUT (0<<9)
#define S3C2410_GPA9_ADDR24 (1<<9)
#define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10)
#define S3C2410_GPA10_OUT (0<<10)
#define S3C2410_GPA10_ADDR25 (1<<10)
#define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11)
#define S3C2410_GPA11_OUT (0<<11)
#define S3C2410_GPA11_ADDR26 (1<<11)
#define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12)
#define S3C2410_GPA12_OUT (0<<12)
#define S3C2410_GPA12_nGCS1 (1<<12)
#define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13)
#define S3C2410_GPA13_OUT (0<<13)
#define S3C2410_GPA13_nGCS2 (1<<13)
#define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14)
#define S3C2410_GPA14_OUT (0<<14)
#define S3C2410_GPA14_nGCS3 (1<<14)
#define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15)
#define S3C2410_GPA15_OUT (0<<15)
#define S3C2410_GPA15_nGCS4 (1<<15)
#define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16)
#define S3C2410_GPA16_OUT (0<<16)
#define S3C2410_GPA16_nGCS5 (1<<16)
#define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17)
#define S3C2410_GPA17_OUT (0<<17)
#define S3C2410_GPA17_CLE (1<<17)
#define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18)
#define S3C2410_GPA18_OUT (0<<18)
#define S3C2410_GPA18_ALE (1<<18)
#define S3C2410_GPA19 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 19)
#define S3C2410_GPA19_OUT (0<<19)
#define S3C2410_GPA19_nFWE (1<<19)
#define S3C2410_GPA20 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 20)
#define S3C2410_GPA20_OUT (0<<20)
#define S3C2410_GPA20_nFRE (1<<20)
#define S3C2410_GPA21 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 21)
#define S3C2410_GPA21_OUT (0<<21)
#define S3C2410_GPA21_nRSTOUT (1<<21)
#define S3C2410_GPA22 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 22)
#define S3C2410_GPA22_OUT (0<<22)
#define S3C2410_GPA22_nFCE (1<<22)
/* 0x08 and 0x0c are reserved */
/* GPB is 10 IO pins, each configured by 2 bits each in GPBCON.
......@@ -44,47 +155,58 @@
/* no i/o pin in port b can have value 3! */
#define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0)
#define S3C2410_GPB0_INP (0x00 << 0)
#define S3C2410_GPB0_OUTP (0x01 << 0)
#define S3C2410_GPB0_TOUT0 (0x02 << 0)
#define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1)
#define S3C2410_GPB1_INP (0x00 << 2)
#define S3C2410_GPB1_OUTP (0x01 << 2)
#define S3C2410_GPB1_TOUT1 (0x02 << 2)
#define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2)
#define S3C2410_GPB2_INP (0x00 << 4)
#define S3C2410_GPB2_OUTP (0x01 << 4)
#define S3C2410_GPB2_TOUT2 (0x02 << 4)
#define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3)
#define S3C2410_GPB3_INP (0x00 << 6)
#define S3C2410_GPB3_OUTP (0x01 << 6)
#define S3C2410_GPB3_TOUT3 (0x02 << 6)
#define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4)
#define S3C2410_GPB4_INP (0x00 << 8)
#define S3C2410_GPB4_OUTP (0x01 << 8)
#define S3C2410_GPB4_TCLK0 (0x02 << 8)
#define S3C2410_GPB4_MASK (0x03 << 8)
#define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5)
#define S3C2410_GPB5_INP (0x00 << 10)
#define S3C2410_GPB5_OUTP (0x01 << 10)
#define S3C2410_GPB5_nXBACK (0x02 << 10)
#define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6)
#define S3C2410_GPB6_INP (0x00 << 12)
#define S3C2410_GPB6_OUTP (0x01 << 12)
#define S3C2410_GPB6_nXBREQ (0x02 << 12)
#define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7)
#define S3C2410_GPB7_INP (0x00 << 14)
#define S3C2410_GPB7_OUTP (0x01 << 14)
#define S3C2410_GPB7_nXDACK1 (0x02 << 14)
#define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8)
#define S3C2410_GPB8_INP (0x00 << 16)
#define S3C2410_GPB8_OUTP (0x01 << 16)
#define S3C2410_GPB8_nXDREQ1 (0x02 << 16)
#define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9)
#define S3C2410_GPB9_INP (0x00 << 18)
#define S3C2410_GPB9_OUTP (0x01 << 18)
#define S3C2410_GPB9_nXDACK0 (0x02 << 18)
#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10)
#define S3C2410_GPB10_INP (0x00 << 18)
#define S3C2410_GPB10_OUTP (0x01 << 18)
#define S3C2410_GPB10_nXDRE0 (0x02 << 18)
......@@ -99,66 +221,82 @@
#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24)
#define S3C2410_GPCUP S3C2410_GPIOREG(0x28)
#define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0)
#define S3C2410_GPC0_INP (0x00 << 0)
#define S3C2410_GPC0_OUTP (0x01 << 0)
#define S3C2410_GPC0_LEND (0x02 << 0)
#define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1)
#define S3C2410_GPC1_INP (0x00 << 2)
#define S3C2410_GPC1_OUTP (0x01 << 2)
#define S3C2410_GPC1_VCLK (0x02 << 2)
#define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2)
#define S3C2410_GPC2_INP (0x00 << 4)
#define S3C2410_GPC2_OUTP (0x01 << 4)
#define S3C2410_GPC2_VLINE (0x02 << 4)
#define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3)
#define S3C2410_GPC3_INP (0x00 << 6)
#define S3C2410_GPC3_OUTP (0x01 << 6)
#define S3C2410_GPC3_VFRAME (0x02 << 6)
#define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4)
#define S3C2410_GPC4_INP (0x00 << 8)
#define S3C2410_GPC4_OUTP (0x01 << 8)
#define S3C2410_GPC4_VM (0x02 << 8)
#define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5)
#define S3C2410_GPC5_INP (0x00 << 10)
#define S3C2410_GPC5_OUTP (0x01 << 10)
#define S3C2410_GPC5_LCDVF0 (0x02 << 10)
#define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6)
#define S3C2410_GPC6_INP (0x00 << 12)
#define S3C2410_GPC6_OUTP (0x01 << 12)
#define S3C2410_GPC6_LCDVF1 (0x02 << 12)
#define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7)
#define S3C2410_GPC7_INP (0x00 << 14)
#define S3C2410_GPC7_OUTP (0x01 << 14)
#define S3C2410_GPC7_LCDVF2 (0x02 << 14)
#define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8)
#define S3C2410_GPC8_INP (0x00 << 16)
#define S3C2410_GPC8_OUTP (0x01 << 16)
#define S3C2410_GPC8_VD0 (0x02 << 16)
#define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9)
#define S3C2410_GPC9_INP (0x00 << 18)
#define S3C2410_GPC9_OUTP (0x01 << 18)
#define S3C2410_GPC9_VD1 (0x02 << 18)
#define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10)
#define S3C2410_GPC10_INP (0x00 << 20)
#define S3C2410_GPC10_OUTP (0x01 << 20)
#define S3C2410_GPC10_VD2 (0x02 << 20)
#define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11)
#define S3C2410_GPC11_INP (0x00 << 22)
#define S3C2410_GPC11_OUTP (0x01 << 22)
#define S3C2410_GPC11_VD3 (0x02 << 22)
#define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12)
#define S3C2410_GPC12_INP (0x00 << 24)
#define S3C2410_GPC12_OUTP (0x01 << 24)
#define S3C2410_GPC12_VD4 (0x02 << 24)
#define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13)
#define S3C2410_GPC13_INP (0x00 << 26)
#define S3C2410_GPC13_OUTP (0x01 << 26)
#define S3C2410_GPC13_VD5 (0x02 << 26)
#define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14)
#define S3C2410_GPC14_INP (0x00 << 28)
#define S3C2410_GPC14_OUTP (0x01 << 28)
#define S3C2410_GPC14_VD6 (0x02 << 28)
#define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15)
#define S3C2410_GPC15_INP (0x00 << 30)
#define S3C2410_GPC15_OUTP (0x01 << 30)
#define S3C2410_GPC15_VD7 (0x02 << 30)
......@@ -173,66 +311,82 @@
#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34)
#define S3C2410_GPDUP S3C2410_GPIOREG(0x38)
#define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0)
#define S3C2410_GPD0_INP (0x00 << 0)
#define S3C2410_GPD0_OUTP (0x01 << 0)
#define S3C2410_GPD0_VD8 (0x02 << 0)
#define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1)
#define S3C2410_GPD1_INP (0x00 << 2)
#define S3C2410_GPD1_OUTP (0x01 << 2)
#define S3C2410_GPD1_VD9 (0x02 << 2)
#define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2)
#define S3C2410_GPD2_INP (0x00 << 4)
#define S3C2410_GPD2_OUTP (0x01 << 4)
#define S3C2410_GPD2_VD10 (0x02 << 4)
#define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3)
#define S3C2410_GPD3_INP (0x00 << 6)
#define S3C2410_GPD3_OUTP (0x01 << 6)
#define S3C2410_GPD3_VD11 (0x02 << 6)
#define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4)
#define S3C2410_GPD4_INP (0x00 << 8)
#define S3C2410_GPD4_OUTP (0x01 << 8)
#define S3C2410_GPD4_VD12 (0x02 << 8)
#define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5)
#define S3C2410_GPD5_INP (0x00 << 10)
#define S3C2410_GPD5_OUTP (0x01 << 10)
#define S3C2410_GPD5_VD13 (0x02 << 10)
#define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6)
#define S3C2410_GPD6_INP (0x00 << 12)
#define S3C2410_GPD6_OUTP (0x01 << 12)
#define S3C2410_GPD6_VD14 (0x02 << 12)
#define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7)
#define S3C2410_GPD7_INP (0x00 << 14)
#define S3C2410_GPD7_OUTP (0x01 << 14)
#define S3C2410_GPD7_VD15 (0x02 << 14)
#define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8)
#define S3C2410_GPD8_INP (0x00 << 16)
#define S3C2410_GPD8_OUTP (0x01 << 16)
#define S3C2410_GPD8_VD16 (0x02 << 16)
#define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9)
#define S3C2410_GPD9_INP (0x00 << 18)
#define S3C2410_GPD9_OUTP (0x01 << 18)
#define S3C2410_GPD9_VD17 (0x02 << 18)
#define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10)
#define S3C2410_GPD10_INP (0x00 << 20)
#define S3C2410_GPD10_OUTP (0x01 << 20)
#define S3C2410_GPD10_VD18 (0x02 << 20)
#define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11)
#define S3C2410_GPD11_INP (0x00 << 22)
#define S3C2410_GPD11_OUTP (0x01 << 22)
#define S3C2410_GPD11_VD19 (0x02 << 22)
#define S3C2410_GPD12 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 12)
#define S3C2410_GPD12_INP (0x00 << 24)
#define S3C2410_GPD12_OUTP (0x01 << 24)
#define S3C2410_GPD12_VD20 (0x02 << 24)
#define S3C2410_GPD13 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 13)
#define S3C2410_GPD13_INP (0x00 << 26)
#define S3C2410_GPD13_OUTP (0x01 << 26)
#define S3C2410_GPD13_VD21 (0x02 << 26)
#define S3C2410_GPD14 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 14)
#define S3C2410_GPD14_INP (0x00 << 28)
#define S3C2410_GPD14_OUTP (0x01 << 28)
#define S3C2410_GPD14_VD22 (0x02 << 28)
#define S3C2410_GPD15 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 15)
#define S3C2410_GPD15_INP (0x00 << 30)
#define S3C2410_GPD15_OUTP (0x01 << 30)
#define S3C2410_GPD15_VD23 (0x02 << 30)
......@@ -247,71 +401,87 @@
#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44)
#define S3C2410_GPEUP S3C2410_GPIOREG(0x48)
#define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0)
#define S3C2410_GPE0_INP (0x00 << 0)
#define S3C2410_GPE0_OUTP (0x01 << 0)
#define S3C2410_GPE0_I2SLRCK (0x02 << 0)
#define S3C2410_GPE0_MASK (0x03 << 0)
#define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1)
#define S3C2410_GPE1_INP (0x00 << 2)
#define S3C2410_GPE1_OUTP (0x01 << 2)
#define S3C2410_GPE1_I2SSCLK (0x02 << 2)
#define S3C2410_GPE1_MASK (0x03 << 2)
#define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2)
#define S3C2410_GPE2_INP (0x00 << 4)
#define S3C2410_GPE2_OUTP (0x01 << 4)
#define S3C2410_GPE2_CDCLK (0x02 << 4)
#define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3)
#define S3C2410_GPE3_INP (0x00 << 6)
#define S3C2410_GPE3_OUTP (0x01 << 6)
#define S3C2410_GPE3_I2SSDI (0x02 << 6)
#define S3C2410_GPE3_MASK (0x03 << 6)
#define S3C2410_GPE4 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 4)
#define S3C2410_GPE4_INP (0x00 << 8)
#define S3C2410_GPE4_OUTP (0x01 << 8)
#define S3C2410_GPE4_I2SSDO (0x02 << 8)
#define S3C2410_GPE4_MASK (0x03 << 8)
#define S3C2410_GPE5 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 5)
#define S3C2410_GPE5_INP (0x00 << 10)
#define S3C2410_GPE5_OUTP (0x01 << 10)
#define S3C2410_GPE5_SDCLK (0x02 << 10)
#define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6)
#define S3C2410_GPE6_INP (0x00 << 12)
#define S3C2410_GPE6_OUTP (0x01 << 12)
#define S3C2410_GPE6_SDCLK (0x02 << 12)
#define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7)
#define S3C2410_GPE7_INP (0x00 << 14)
#define S3C2410_GPE7_OUTP (0x01 << 14)
#define S3C2410_GPE7_SDCMD (0x02 << 14)
#define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8)
#define S3C2410_GPE8_INP (0x00 << 16)
#define S3C2410_GPE8_OUTP (0x01 << 16)
#define S3C2410_GPE8_SDDAT1 (0x02 << 16)
#define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9)
#define S3C2410_GPE9_INP (0x00 << 18)
#define S3C2410_GPE9_OUTP (0x01 << 18)
#define S3C2410_GPE9_SDDAT2 (0x02 << 18)
#define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10)
#define S3C2410_GPE10_INP (0x00 << 20)
#define S3C2410_GPE10_OUTP (0x01 << 20)
#define S3C2410_GPE10_SDDAT3 (0x02 << 20)
#define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11)
#define S3C2410_GPE11_INP (0x00 << 22)
#define S3C2410_GPE11_OUTP (0x01 << 22)
#define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
#define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12)
#define S3C2410_GPE12_INP (0x00 << 24)
#define S3C2410_GPE12_OUTP (0x01 << 24)
#define S3C2410_GPE12_SPIMOSI0 (0x02 << 24)
#define S3C2410_GPE13 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 13)
#define S3C2410_GPE13_INP (0x00 << 26)
#define S3C2410_GPE13_OUTP (0x01 << 26)
#define S3C2410_GPE13_SPICLK0 (0x02 << 26)
#define S3C2410_GPE14 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 14)
#define S3C2410_GPE14_INP (0x00 << 28)
#define S3C2410_GPE14_OUTP (0x01 << 28)
#define S3C2410_GPE14_IICSCL (0x02 << 28)
#define S3C2410_GPE14_MASK (0x03 << 28)
#define S3C2410_GPE15 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 15)
#define S3C2410_GPE15_INP (0x00 << 30)
#define S3C2410_GPE15_OUTP (0x01 << 30)
#define S3C2410_GPE15_IICSDA (0x02 << 30)
......@@ -333,35 +503,42 @@
#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54)
#define S3C2410_GPFUP S3C2410_GPIOREG(0x58)
#define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0)
#define S3C2410_GPF0_INP (0x00 << 0)
#define S3C2410_GPF0_OUTP (0x01 << 0)
#define S3C2410_GPF0_EINT0 (0x02 << 0)
#define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1)
#define S3C2410_GPF1_INP (0x00 << 2)
#define S3C2410_GPF1_OUTP (0x01 << 2)
#define S3C2410_GPF1_EINT1 (0x02 << 2)
#define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2)
#define S3C2410_GPF2_INP (0x00 << 4)
#define S3C2410_GPF2_OUTP (0x01 << 4)
#define S3C2410_GPF2_EINT2 (0x02 << 4)
#define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3)
#define S3C2410_GPF3_INP (0x00 << 6)
#define S3C2410_GPF3_OUTP (0x01 << 6)
#define S3C2410_GPF3_EINT3 (0x02 << 6)
#define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4)
#define S3C2410_GPF4_INP (0x00 << 8)
#define S3C2410_GPF4_OUTP (0x01 << 8)
#define S3C2410_GPF4_EINT4 (0x02 << 8)
#define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5)
#define S3C2410_GPF5_INP (0x00 << 10)
#define S3C2410_GPF5_OUTP (0x01 << 10)
#define S3C2410_GPF5_EINT5 (0x02 << 10)
#define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6)
#define S3C2410_GPF6_INP (0x00 << 12)
#define S3C2410_GPF6_OUTP (0x01 << 12)
#define S3C2410_GPF6_EINT6 (0x02 << 12)
#define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7)
#define S3C2410_GPF7_INP (0x00 << 14)
#define S3C2410_GPF7_OUTP (0x01 << 14)
#define S3C2410_GPF7_EINT7 (0x02 << 14)
......@@ -378,74 +555,90 @@
#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64)
#define S3C2410_GPGUP S3C2410_GPIOREG(0x68)
#define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0)
#define S3C2410_GPG0_INP (0x00 << 0)
#define S3C2410_GPG0_OUTP (0x01 << 0)
#define S3C2410_GPG0_EINT8 (0x02 << 0)
#define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1)
#define S3C2410_GPG1_INP (0x00 << 2)
#define S3C2410_GPG1_OUTP (0x01 << 2)
#define S3C2410_GPG1_EINT9 (0x02 << 2)
#define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2)
#define S3C2410_GPG2_INP (0x00 << 4)
#define S3C2410_GPG2_OUTP (0x01 << 4)
#define S3C2410_GPG2_EINT10 (0x02 << 4)
#define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3)
#define S3C2410_GPG3_INP (0x00 << 6)
#define S3C2410_GPG3_OUTP (0x01 << 6)
#define S3C2410_GPG3_EINT11 (0x02 << 6)
#define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4)
#define S3C2410_GPG4_INP (0x00 << 8)
#define S3C2410_GPG4_OUTP (0x01 << 8)
#define S3C2410_GPG4_EINT12 (0x02 << 8)
#define S3C2410_GPG4_LCDPWREN (0x03 << 8)
#define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5)
#define S3C2410_GPG5_INP (0x00 << 10)
#define S3C2410_GPG5_OUTP (0x01 << 10)
#define S3C2410_GPG5_EINT13 (0x02 << 10)
#define S3C2410_GPG5_SPIMISO1 (0x03 << 10)
#define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6)
#define S3C2410_GPG6_INP (0x00 << 12)
#define S3C2410_GPG6_OUTP (0x01 << 12)
#define S3C2410_GPG6_EINT14 (0x02 << 12)
#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12)
#define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7)
#define S3C2410_GPG7_INP (0x00 << 14)
#define S3C2410_GPG7_OUTP (0x01 << 14)
#define S3C2410_GPG7_EINT15 (0x02 << 14)
#define S3C2410_GPG7_SPICLK1 (0x03 << 14)
#define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8)
#define S3C2410_GPG8_INP (0x00 << 16)
#define S3C2410_GPG8_OUTP (0x01 << 16)
#define S3C2410_GPG8_EINT16 (0x02 << 16)
#define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9)
#define S3C2410_GPG9_INP (0x00 << 18)
#define S3C2410_GPG9_OUTP (0x01 << 18)
#define S3C2410_GPG9_EINT17 (0x02 << 18)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG10_INP (0x00 << 20)
#define S3C2410_GPG10_OUTP (0x01 << 20)
#define S3C2410_GPG10_EINT18 (0x02 << 20)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG11_INP (0x00 << 22)
#define S3C2410_GPG11_OUTP (0x01 << 22)
#define S3C2410_GPG11_EINT19 (0x02 << 22)
#define S3C2410_GPG11_TCLK1 (0x03 << 22)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG12_INP (0x00 << 24)
#define S3C2410_GPG12_OUTP (0x01 << 24)
#define S3C2410_GPG12_EINT18 (0x02 << 24)
#define S3C2410_GPG12_XMON (0x03 << 24)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG13_INP (0x00 << 26)
#define S3C2410_GPG13_OUTP (0x01 << 26)
#define S3C2410_GPG13_EINT18 (0x02 << 26)
#define S3C2410_GPG13_nXPON (0x03 << 26)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG14_INP (0x00 << 28)
#define S3C2410_GPG14_OUTP (0x01 << 28)
#define S3C2410_GPG14_EINT18 (0x02 << 28)
#define S3C2410_GPG14_YMON (0x03 << 28)
#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
#define S3C2410_GPG15_INP (0x00 << 30)
#define S3C2410_GPG15_OUTP (0x01 << 30)
#define S3C2410_GPG15_EINT18 (0x02 << 30)
......@@ -466,48 +659,59 @@
#define S3C2410_GPHDAT S3C2410_GPIOREG(0x74)
#define S3C2410_GPHUP S3C2410_GPIOREG(0x78)
#define S3C2410_GPH0 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 0)
#define S3C2410_GPH0_INP (0x00 << 0)
#define S3C2410_GPH0_OUTP (0x01 << 0)
#define S3C2410_GPH0_nCTS0 (0x02 << 0)
#define S3C2410_GPH1 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 1)
#define S3C2410_GPH1_INP (0x00 << 2)
#define S3C2410_GPH1_OUTP (0x01 << 2)
#define S3C2410_GPH1_nRTS0 (0x02 << 2)
#define S3C2410_GPH2 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 2)
#define S3C2410_GPH2_INP (0x00 << 4)
#define S3C2410_GPH2_OUTP (0x01 << 4)
#define S3C2410_GPH2_TXD0 (0x02 << 4)
#define S3C2410_GPH3 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 3)
#define S3C2410_GPH3_INP (0x00 << 6)
#define S3C2410_GPH3_OUTP (0x01 << 6)
#define S3C2410_GPH3_RXD0 (0x02 << 6)
#define S3C2410_GPH4 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 4)
#define S3C2410_GPH4_INP (0x00 << 8)
#define S3C2410_GPH4_OUTP (0x01 << 8)
#define S3C2410_GPH4_TXD1 (0x02 << 8)
#define S3C2410_GPH5 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 5)
#define S3C2410_GPH5_INP (0x00 << 10)
#define S3C2410_GPH5_OUTP (0x01 << 10)
#define S3C2410_GPH5_RXD1 (0x02 << 10)
#define S3C2410_GPH6 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 6)
#define S3C2410_GPH6_INP (0x00 << 12)
#define S3C2410_GPH6_OUTP (0x01 << 12)
#define S3C2410_GPH6_TXD2 (0x02 << 12)
#define S3C2410_GPH6_nRTS1 (0x03 << 12)
#define S3C2410_GPH7 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 7)
#define S3C2410_GPH7_INP (0x00 << 14)
#define S3C2410_GPH7_OUTP (0x01 << 14)
#define S3C2410_GPH7_RXD2 (0x02 << 14)
#define S3C2410_GPH7_nCTS1 (0x03 << 14)
#define S3C2410_GPH8 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 8)
#define S3C2410_GPH8_INP (0x00 << 16)
#define S3C2410_GPH8_OUTP (0x01 << 16)
#define S3C2410_GPH8_UCLK (0x02 << 16)
#define S3C2410_GPH9 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 9)
#define S3C2410_GPH9_INP (0x00 << 18)
#define S3C2410_GPH9_OUTP (0x01 << 18)
#define S3C2410_GPH9_CLKOUT0 (0x02 << 18)
#define S3C2410_GPH10 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 10)
#define S3C2410_GPH10_INP (0x00 << 20)
#define S3C2410_GPH10_OUTP (0x01 << 20)
#define S3C2410_GPH10_CLKOUT1 (0x02 << 20)
......
include/asm-ia64/cyclone.h
View file @ 1d47490a
......@@ -3,10 +3,10 @@
#ifdef CONFIG_IA64_CYCLONE
extern int use_cyclone;
extern int __init cyclone_setup(char*);
extern void __init cyclone_setup(void);
#else /* CONFIG_IA64_CYCLONE */
#define use_cyclone 0
static inline void cyclone_setup(char* s)
static inline void cyclone_setup(void)
{
printk(KERN_ERR "Cyclone Counter: System not configured"
" w/ CONFIG_IA64_CYCLONE.\n");
......
include/asm-ia64/machvec.h
View file @ 1d47490a
......@@ -29,8 +29,8 @@ typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long);
typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
typedef struct irq_desc *ia64_mv_irq_desc (unsigned int);
typedef u8 ia64_mv_irq_to_vector (u8);
typedef unsigned int ia64_mv_local_vector_to_irq (u8 vector);
typedef u8 ia64_mv_irq_to_vector (unsigned int);
typedef unsigned int ia64_mv_local_vector_to_irq (u8);
/* DMA-mapping interface: */
typedef void ia64_mv_dma_init (void);
......
include/asm-ia64/numnodes.h
View file @ 1d47490a
......@@ -4,6 +4,9 @@
#ifdef CONFIG_IA64_DIG
/* Max 8 Nodes */
#define NODES_SHIFT 3
#elif defined(CONFIG_IA64_HP_ZX1)
/* Max 32 Nodes */
#define NODES_SHIFT 5
#elif defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
/* Max 256 Nodes */
#define NODES_SHIFT 8
......
include/linux/fs.h
View file @ 1d47490a
......@@ -1527,6 +1527,8 @@ extern int simple_fill_super(struct super_block *, int, struct tree_descr *);
extern int simple_pin_fs(char *name, struct vfsmount **mount, int *count);
extern void simple_release_fs(struct vfsmount **mount, int *count);
extern ssize_t simple_read_from_buffer(void __user *, size_t, loff_t *, const void *, size_t);
extern int inode_change_ok(struct inode *, struct iattr *);
extern int __must_check inode_setattr(struct inode *, struct iattr *);
......
include/linux/mtd/cfi.h
View file @ 1d47490a
/* Common Flash Interface structures
* See http://support.intel.com/design/flash/technote/index.htm
* $Id: cfi.h,v 1.44 2004/07/13 22:32:52 dwmw2 Exp $
* $Id: cfi.h,v 1.45 2004/07/20 02:44:27 dwmw2 Exp $
*/
#ifndef __MTD_CFI_H__
......@@ -328,14 +328,12 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
static inline void cfi_udelay(int us)
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)
unsigned long t = us * HZ / 1000000;
if (t) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(t);
return;
}
#endif
udelay(us);
cond_resched();
}
......
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