Commit 2bc35c10 authored by Jeff Kirsher's avatar Jeff Kirsher Committed by Jeff Garzik

e1000: reorder pci-e infor struct

Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.
Signed-off-by: default avatarAuke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 070f6ffb
...@@ -128,11 +128,13 @@ typedef enum { ...@@ -128,11 +128,13 @@ typedef enum {
/* PCI bus widths */ /* PCI bus widths */
typedef enum { typedef enum {
e1000_bus_width_unknown = 0, e1000_bus_width_unknown = 0,
/* These PCIe values should literally match the possible return values
* from config space */
e1000_bus_width_pciex_1 = 1,
e1000_bus_width_pciex_2 = 2,
e1000_bus_width_pciex_4 = 4,
e1000_bus_width_32, e1000_bus_width_32,
e1000_bus_width_64, e1000_bus_width_64,
e1000_bus_width_pciex_1,
e1000_bus_width_pciex_2,
e1000_bus_width_pciex_4,
e1000_bus_width_reserved e1000_bus_width_reserved
} e1000_bus_width; } e1000_bus_width;
......
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