Commit 2de6847c authored by Thomas Abraham's avatar Thomas Abraham Committed by Kukjin Kim

ARM: dts: add clock provider information for all controllers in Exynos5250 SoC

For all supported peripheral controllers on Exynos5250, add clock
lookup information.
Signed-off-by: default avatarThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 7ad34337
...@@ -93,6 +93,8 @@ mct@101C0000 { ...@@ -93,6 +93,8 @@ mct@101C0000 {
interrupt-parent = <&mct_map>; interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>, interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>; <4 0>, <5 0>;
clocks = <&clock 1>, <&clock 335>;
clock-names = "fin_pll", "mct";
mct_map: mct-map { mct_map: mct-map {
#interrupt-cells = <2>; #interrupt-cells = <2>;
...@@ -111,6 +113,8 @@ watchdog { ...@@ -111,6 +113,8 @@ watchdog {
compatible = "samsung,s3c2410-wdt"; compatible = "samsung,s3c2410-wdt";
reg = <0x101D0000 0x100>; reg = <0x101D0000 0x100>;
interrupts = <0 42 0>; interrupts = <0 42 0>;
clocks = <&clock 336>;
clock-names = "watchdog";
}; };
codec@11000000 { codec@11000000 {
...@@ -124,42 +128,56 @@ rtc { ...@@ -124,42 +128,56 @@ rtc {
compatible = "samsung,s3c6410-rtc"; compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>; reg = <0x101E0000 0x100>;
interrupts = <0 43 0>, <0 44 0>; interrupts = <0 43 0>, <0 44 0>;
clocks = <&clock 337>;
clock-names = "rtc";
}; };
tmu@10060000 { tmu@10060000 {
compatible = "samsung,exynos5250-tmu"; compatible = "samsung,exynos5250-tmu";
reg = <0x10060000 0x100>; reg = <0x10060000 0x100>;
interrupts = <0 65 0>; interrupts = <0 65 0>;
clocks = <&clock 338>;
clock-names = "tmu_apbif";
}; };
serial@12C00000 { serial@12C00000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>; reg = <0x12C00000 0x100>;
interrupts = <0 51 0>; interrupts = <0 51 0>;
clocks = <&clock 289>, <&clock 146>;
clock-names = "uart", "clk_uart_baud0";
}; };
serial@12C10000 { serial@12C10000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>; reg = <0x12C10000 0x100>;
interrupts = <0 52 0>; interrupts = <0 52 0>;
clocks = <&clock 290>, <&clock 147>;
clock-names = "uart", "clk_uart_baud0";
}; };
serial@12C20000 { serial@12C20000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>; reg = <0x12C20000 0x100>;
interrupts = <0 53 0>; interrupts = <0 53 0>;
clocks = <&clock 291>, <&clock 148>;
clock-names = "uart", "clk_uart_baud0";
}; };
serial@12C30000 { serial@12C30000 {
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>; reg = <0x12C30000 0x100>;
interrupts = <0 54 0>; interrupts = <0 54 0>;
clocks = <&clock 292>, <&clock 149>;
clock-names = "uart", "clk_uart_baud0";
}; };
sata@122F0000 { sata@122F0000 {
compatible = "samsung,exynos5-sata-ahci"; compatible = "samsung,exynos5-sata-ahci";
reg = <0x122F0000 0x1ff>; reg = <0x122F0000 0x1ff>;
interrupts = <0 115 0>; interrupts = <0 115 0>;
clocks = <&clock 277>, <&clock 143>;
clock-names = "sata", "sclk_sata";
}; };
sata-phy@12170000 { sata-phy@12170000 {
...@@ -173,6 +191,8 @@ i2c_0: i2c@12C60000 { ...@@ -173,6 +191,8 @@ i2c_0: i2c@12C60000 {
interrupts = <0 56 0>; interrupts = <0 56 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 294>;
clock-names = "i2c";
}; };
i2c_1: i2c@12C70000 { i2c_1: i2c@12C70000 {
...@@ -181,6 +201,8 @@ i2c_1: i2c@12C70000 { ...@@ -181,6 +201,8 @@ i2c_1: i2c@12C70000 {
interrupts = <0 57 0>; interrupts = <0 57 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 295>;
clock-names = "i2c";
}; };
i2c_2: i2c@12C80000 { i2c_2: i2c@12C80000 {
...@@ -189,6 +211,8 @@ i2c_2: i2c@12C80000 { ...@@ -189,6 +211,8 @@ i2c_2: i2c@12C80000 {
interrupts = <0 58 0>; interrupts = <0 58 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 296>;
clock-names = "i2c";
}; };
i2c_3: i2c@12C90000 { i2c_3: i2c@12C90000 {
...@@ -197,6 +221,8 @@ i2c_3: i2c@12C90000 { ...@@ -197,6 +221,8 @@ i2c_3: i2c@12C90000 {
interrupts = <0 59 0>; interrupts = <0 59 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 297>;
clock-names = "i2c";
}; };
i2c_4: i2c@12CA0000 { i2c_4: i2c@12CA0000 {
...@@ -205,6 +231,8 @@ i2c_4: i2c@12CA0000 { ...@@ -205,6 +231,8 @@ i2c_4: i2c@12CA0000 {
interrupts = <0 60 0>; interrupts = <0 60 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 298>;
clock-names = "i2c";
}; };
i2c_5: i2c@12CB0000 { i2c_5: i2c@12CB0000 {
...@@ -213,6 +241,8 @@ i2c_5: i2c@12CB0000 { ...@@ -213,6 +241,8 @@ i2c_5: i2c@12CB0000 {
interrupts = <0 61 0>; interrupts = <0 61 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 299>;
clock-names = "i2c";
}; };
i2c_6: i2c@12CC0000 { i2c_6: i2c@12CC0000 {
...@@ -221,6 +251,8 @@ i2c_6: i2c@12CC0000 { ...@@ -221,6 +251,8 @@ i2c_6: i2c@12CC0000 {
interrupts = <0 62 0>; interrupts = <0 62 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 300>;
clock-names = "i2c";
}; };
i2c_7: i2c@12CD0000 { i2c_7: i2c@12CD0000 {
...@@ -229,6 +261,8 @@ i2c_7: i2c@12CD0000 { ...@@ -229,6 +261,8 @@ i2c_7: i2c@12CD0000 {
interrupts = <0 63 0>; interrupts = <0 63 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 301>;
clock-names = "i2c";
}; };
i2c_8: i2c@12CE0000 { i2c_8: i2c@12CE0000 {
...@@ -237,6 +271,8 @@ i2c_8: i2c@12CE0000 { ...@@ -237,6 +271,8 @@ i2c_8: i2c@12CE0000 {
interrupts = <0 64 0>; interrupts = <0 64 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 302>;
clock-names = "i2c";
}; };
i2c@121D0000 { i2c@121D0000 {
...@@ -244,6 +280,8 @@ i2c@121D0000 { ...@@ -244,6 +280,8 @@ i2c@121D0000 {
reg = <0x121D0000 0x100>; reg = <0x121D0000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 288>;
clock-names = "i2c";
}; };
spi_0: spi@12d20000 { spi_0: spi@12d20000 {
...@@ -255,6 +293,8 @@ spi_0: spi@12d20000 { ...@@ -255,6 +293,8 @@ spi_0: spi@12d20000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 304>, <&clock 154>;
clock-names = "spi", "spi_busclk0";
}; };
spi_1: spi@12d30000 { spi_1: spi@12d30000 {
...@@ -266,6 +306,8 @@ spi_1: spi@12d30000 { ...@@ -266,6 +306,8 @@ spi_1: spi@12d30000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 305>, <&clock 155>;
clock-names = "spi", "spi_busclk0";
}; };
spi_2: spi@12d40000 { spi_2: spi@12d40000 {
...@@ -277,6 +319,8 @@ spi_2: spi@12d40000 { ...@@ -277,6 +319,8 @@ spi_2: spi@12d40000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 306>, <&clock 156>;
clock-names = "spi", "spi_busclk0";
}; };
dwmmc_0: dwmmc0@12200000 { dwmmc_0: dwmmc0@12200000 {
...@@ -285,6 +329,8 @@ dwmmc_0: dwmmc0@12200000 { ...@@ -285,6 +329,8 @@ dwmmc_0: dwmmc0@12200000 {
interrupts = <0 75 0>; interrupts = <0 75 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 280>, <&clock 139>;
clock-names = "biu", "ciu";
}; };
dwmmc_1: dwmmc1@12210000 { dwmmc_1: dwmmc1@12210000 {
...@@ -293,6 +339,8 @@ dwmmc_1: dwmmc1@12210000 { ...@@ -293,6 +339,8 @@ dwmmc_1: dwmmc1@12210000 {
interrupts = <0 76 0>; interrupts = <0 76 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 281>, <&clock 140>;
clock-names = "biu", "ciu";
}; };
dwmmc_2: dwmmc2@12220000 { dwmmc_2: dwmmc2@12220000 {
...@@ -301,6 +349,8 @@ dwmmc_2: dwmmc2@12220000 { ...@@ -301,6 +349,8 @@ dwmmc_2: dwmmc2@12220000 {
interrupts = <0 77 0>; interrupts = <0 77 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 282>, <&clock 141>;
clock-names = "biu", "ciu";
}; };
dwmmc_3: dwmmc3@12230000 { dwmmc_3: dwmmc3@12230000 {
...@@ -309,6 +359,8 @@ dwmmc_3: dwmmc3@12230000 { ...@@ -309,6 +359,8 @@ dwmmc_3: dwmmc3@12230000 {
interrupts = <0 78 0>; interrupts = <0 78 0>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&clock 283>, <&clock 142>;
clock-names = "biu", "ciu";
}; };
i2s0: i2s@03830000 { i2s0: i2s@03830000 {
...@@ -363,6 +415,8 @@ pdma0: pdma@121A0000 { ...@@ -363,6 +415,8 @@ pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>; reg = <0x121A0000 0x1000>;
interrupts = <0 34 0>; interrupts = <0 34 0>;
clocks = <&clock 275>;
clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <32>; #dma-requests = <32>;
...@@ -372,6 +426,8 @@ pdma1: pdma@121B0000 { ...@@ -372,6 +426,8 @@ pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>; reg = <0x121B0000 0x1000>;
interrupts = <0 35 0>; interrupts = <0 35 0>;
clocks = <&clock 276>;
clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <32>; #dma-requests = <32>;
...@@ -381,6 +437,8 @@ mdma0: mdma@10800000 { ...@@ -381,6 +437,8 @@ mdma0: mdma@10800000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>; reg = <0x10800000 0x1000>;
interrupts = <0 33 0>; interrupts = <0 33 0>;
clocks = <&clock 271>;
clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <1>; #dma-requests = <1>;
...@@ -390,6 +448,8 @@ mdma1: mdma@11C10000 { ...@@ -390,6 +448,8 @@ mdma1: mdma@11C10000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>; reg = <0x11C10000 0x1000>;
interrupts = <0 124 0>; interrupts = <0 124 0>;
clocks = <&clock 271>;
clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <1>; #dma-requests = <1>;
...@@ -649,6 +709,8 @@ gsc_0: gsc@0x13e00000 { ...@@ -649,6 +709,8 @@ gsc_0: gsc@0x13e00000 {
reg = <0x13e00000 0x1000>; reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>; interrupts = <0 85 0>;
samsung,power-domain = <&pd_gsc>; samsung,power-domain = <&pd_gsc>;
clocks = <&clock 256>;
clock-names = "gscl";
}; };
gsc_1: gsc@0x13e10000 { gsc_1: gsc@0x13e10000 {
...@@ -656,6 +718,8 @@ gsc_1: gsc@0x13e10000 { ...@@ -656,6 +718,8 @@ gsc_1: gsc@0x13e10000 {
reg = <0x13e10000 0x1000>; reg = <0x13e10000 0x1000>;
interrupts = <0 86 0>; interrupts = <0 86 0>;
samsung,power-domain = <&pd_gsc>; samsung,power-domain = <&pd_gsc>;
clocks = <&clock 257>;
clock-names = "gscl";
}; };
gsc_2: gsc@0x13e20000 { gsc_2: gsc@0x13e20000 {
...@@ -663,6 +727,8 @@ gsc_2: gsc@0x13e20000 { ...@@ -663,6 +727,8 @@ gsc_2: gsc@0x13e20000 {
reg = <0x13e20000 0x1000>; reg = <0x13e20000 0x1000>;
interrupts = <0 87 0>; interrupts = <0 87 0>;
samsung,power-domain = <&pd_gsc>; samsung,power-domain = <&pd_gsc>;
clocks = <&clock 258>;
clock-names = "gscl";
}; };
gsc_3: gsc@0x13e30000 { gsc_3: gsc@0x13e30000 {
...@@ -670,12 +736,18 @@ gsc_3: gsc@0x13e30000 { ...@@ -670,12 +736,18 @@ gsc_3: gsc@0x13e30000 {
reg = <0x13e30000 0x1000>; reg = <0x13e30000 0x1000>;
interrupts = <0 88 0>; interrupts = <0 88 0>;
samsung,power-domain = <&pd_gsc>; samsung,power-domain = <&pd_gsc>;
clocks = <&clock 259>;
clock-names = "gscl";
}; };
hdmi { hdmi {
compatible = "samsung,exynos5-hdmi"; compatible = "samsung,exynos5-hdmi";
reg = <0x14530000 0x70000>; reg = <0x14530000 0x70000>;
interrupts = <0 95 0>; interrupts = <0 95 0>;
clocks = <&clock 333>, <&clock 136>, <&clock 137>,
<&clock 333>, <&clock 333>;
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
"sclk_hdmiphy", "hdmiphy";
}; };
mixer { mixer {
......
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