Commit 2ea9f12c authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by Kalle Valo

ath10k: add new cipher suite support

QCA99x0 and QCA4019 family chips support CCMP-256, GCMP-128, and
GCMP-256 ciphers in hardware, so advertise support for these. As
firmware does not support group management frame ciphers (BIP),
handle them in software (mac80211).
Reviewed-by: default avatarSebastian Gottschall <s.gottschall@dd-wrt.com>
Cc: Jouni Malinen <jouni@qca.qualcomm.com>
Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 36d9cdb6
...@@ -74,6 +74,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -74,6 +74,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA9887_HW_1_0_VERSION, .id = QCA9887_HW_1_0_VERSION,
...@@ -97,6 +98,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -97,6 +98,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA6174_HW_2_1_VERSION, .id = QCA6174_HW_2_1_VERSION,
...@@ -119,6 +121,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -119,6 +121,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA6174_HW_2_1_VERSION, .id = QCA6174_HW_2_1_VERSION,
...@@ -141,6 +144,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -141,6 +144,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA6174_HW_3_0_VERSION, .id = QCA6174_HW_3_0_VERSION,
...@@ -163,6 +167,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -163,6 +167,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA6174_HW_3_2_VERSION, .id = QCA6174_HW_3_2_VERSION,
...@@ -188,6 +193,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -188,6 +193,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA99X0_HW_2_0_DEV_VERSION, .id = QCA99X0_HW_2_0_DEV_VERSION,
...@@ -216,6 +222,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -216,6 +222,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 4, .spectral_bin_discard = 4,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 11,
}, },
{ {
.id = QCA9984_HW_1_0_DEV_VERSION, .id = QCA9984_HW_1_0_DEV_VERSION,
...@@ -249,6 +256,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -249,6 +256,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
*/ */
.vht160_mcs_rx_highest = 1560, .vht160_mcs_rx_highest = 1560,
.vht160_mcs_tx_highest = 1560, .vht160_mcs_tx_highest = 1560,
.n_cipher_suites = 11,
}, },
{ {
.id = QCA9888_HW_2_0_DEV_VERSION, .id = QCA9888_HW_2_0_DEV_VERSION,
...@@ -281,6 +289,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -281,6 +289,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
*/ */
.vht160_mcs_rx_highest = 780, .vht160_mcs_rx_highest = 780,
.vht160_mcs_tx_highest = 780, .vht160_mcs_tx_highest = 780,
.n_cipher_suites = 11,
}, },
{ {
.id = QCA9377_HW_1_0_DEV_VERSION, .id = QCA9377_HW_1_0_DEV_VERSION,
...@@ -303,6 +312,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -303,6 +312,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA9377_HW_1_1_DEV_VERSION, .id = QCA9377_HW_1_1_DEV_VERSION,
...@@ -327,6 +337,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -327,6 +337,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 0, .spectral_bin_discard = 0,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 8,
}, },
{ {
.id = QCA4019_HW_1_0_DEV_VERSION, .id = QCA4019_HW_1_0_DEV_VERSION,
...@@ -356,6 +367,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { ...@@ -356,6 +367,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.spectral_bin_discard = 4, .spectral_bin_discard = 4,
.vht160_mcs_rx_highest = 0, .vht160_mcs_rx_highest = 0,
.vht160_mcs_tx_highest = 0, .vht160_mcs_tx_highest = 0,
.n_cipher_suites = 11,
}, },
}; };
......
...@@ -550,6 +550,9 @@ struct ath10k_hw_params { ...@@ -550,6 +550,9 @@ struct ath10k_hw_params {
*/ */
int vht160_mcs_rx_highest; int vht160_mcs_rx_highest;
int vht160_mcs_tx_highest; int vht160_mcs_tx_highest;
/* Number of ciphers supported (i.e First N) in cipher_suites array */
int n_cipher_suites;
}; };
struct htt_rx_desc; struct htt_rx_desc;
......
...@@ -242,6 +242,16 @@ static int ath10k_send_key(struct ath10k_vif *arvif, ...@@ -242,6 +242,16 @@ static int ath10k_send_key(struct ath10k_vif *arvif,
case WLAN_CIPHER_SUITE_WEP104: case WLAN_CIPHER_SUITE_WEP104:
arg.key_cipher = WMI_CIPHER_WEP; arg.key_cipher = WMI_CIPHER_WEP;
break; break;
case WLAN_CIPHER_SUITE_CCMP_256:
arg.key_cipher = WMI_CIPHER_AES_CCM;
break;
case WLAN_CIPHER_SUITE_GCMP:
case WLAN_CIPHER_SUITE_GCMP_256:
arg.key_cipher = WMI_CIPHER_AES_GCM;
break;
case WLAN_CIPHER_SUITE_BIP_GMAC_128:
case WLAN_CIPHER_SUITE_BIP_GMAC_256:
case WLAN_CIPHER_SUITE_BIP_CMAC_256:
case WLAN_CIPHER_SUITE_AES_CMAC: case WLAN_CIPHER_SUITE_AES_CMAC:
WARN_ON(1); WARN_ON(1);
return -EINVAL; return -EINVAL;
...@@ -5723,7 +5733,10 @@ static int ath10k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, ...@@ -5723,7 +5733,10 @@ static int ath10k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
u32 flags2; u32 flags2;
/* this one needs to be done in software */ /* this one needs to be done in software */
if (key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) if (key->cipher == WLAN_CIPHER_SUITE_AES_CMAC ||
key->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_128 ||
key->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_256 ||
key->cipher == WLAN_CIPHER_SUITE_BIP_CMAC_256)
return 1; return 1;
if (arvif->nohwcrypt) if (arvif->nohwcrypt)
...@@ -8074,7 +8087,22 @@ int ath10k_mac_register(struct ath10k *ar) ...@@ -8074,7 +8087,22 @@ int ath10k_mac_register(struct ath10k *ar)
WLAN_CIPHER_SUITE_WEP104, WLAN_CIPHER_SUITE_WEP104,
WLAN_CIPHER_SUITE_TKIP, WLAN_CIPHER_SUITE_TKIP,
WLAN_CIPHER_SUITE_CCMP, WLAN_CIPHER_SUITE_CCMP,
/* Do not add hardware supported ciphers before this line.
* Allow software encryption for all chips. Don't forget to
* update n_cipher_suites below.
*/
WLAN_CIPHER_SUITE_AES_CMAC, WLAN_CIPHER_SUITE_AES_CMAC,
WLAN_CIPHER_SUITE_BIP_CMAC_256,
WLAN_CIPHER_SUITE_BIP_GMAC_128,
WLAN_CIPHER_SUITE_BIP_GMAC_256,
/* Only QCA99x0 and QCA4019 varients support GCMP-128, GCMP-256
* and CCMP-256 in hardware.
*/
WLAN_CIPHER_SUITE_GCMP,
WLAN_CIPHER_SUITE_GCMP_256,
WLAN_CIPHER_SUITE_CCMP_256,
}; };
struct ieee80211_supported_band *band; struct ieee80211_supported_band *band;
void *channels; void *channels;
...@@ -8318,7 +8346,18 @@ int ath10k_mac_register(struct ath10k *ar) ...@@ -8318,7 +8346,18 @@ int ath10k_mac_register(struct ath10k *ar)
} }
ar->hw->wiphy->cipher_suites = cipher_suites; ar->hw->wiphy->cipher_suites = cipher_suites;
ar->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
/* QCA988x and QCA6174 family chips do not support CCMP-256, GCMP-128
* and GCMP-256 ciphers in hardware. Fetch number of ciphers supported
* from chip specific hw_param table.
*/
if (!ar->hw_params.n_cipher_suites ||
ar->hw_params.n_cipher_suites > ARRAY_SIZE(cipher_suites)) {
ath10k_err(ar, "invalid hw_params.n_cipher_suites %d\n",
ar->hw_params.n_cipher_suites);
ar->hw_params.n_cipher_suites = 8;
}
ar->hw->wiphy->n_cipher_suites = ar->hw_params.n_cipher_suites;
wiphy_ext_feature_set(ar->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); wiphy_ext_feature_set(ar->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
......
...@@ -4751,6 +4751,7 @@ struct wmi_key_seq_counter { ...@@ -4751,6 +4751,7 @@ struct wmi_key_seq_counter {
#define WMI_CIPHER_WAPI 0x5 #define WMI_CIPHER_WAPI 0x5
#define WMI_CIPHER_CKIP 0x6 #define WMI_CIPHER_CKIP 0x6
#define WMI_CIPHER_AES_CMAC 0x7 #define WMI_CIPHER_AES_CMAC 0x7
#define WMI_CIPHER_AES_GCM 0x8
struct wmi_vdev_install_key_cmd { struct wmi_vdev_install_key_cmd {
__le32 vdev_id; __le32 vdev_id;
......
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