ppc64: PCI rework 1

arch/ppc64/kernel/chrp_setup.c

@@ -66,7 +66,6 @@
 extern volatile unsigned char *chrp_int_ack_special;
 
 void chrp_progress(char *, unsigned short);
-void chrp_request_regions(void);
 
 extern void openpic_init_IRQ(void);
 extern void init_ras_IRQ(void);
@@ -170,11 +169,6 @@ chrp_setup_arch(void)
 void __init
 chrp_init2(void)
 {
-	/*
-	 * It is sensitive, when this is called (not too earlu)
-	 * -- tibit
-	 */
-	chrp_request_regions();
 	/* Manually leave the kernel version on the panel. */
 	ppc_md.progress("Linux ppc64\n", 0);
 	ppc_md.progress(UTS_RELEASE, 0);

arch/ppc64/kernel/iSeries_pci.c

@@ -95,10 +95,23 @@ void  list_device_nodes(void);
 
 struct pci_dev;
 
-extern struct list_head iSeries_Global_Device_List;
+LIST_HEAD(iSeries_Global_Device_List);
 
 int DeviceCount = 0;
 
+
+/* Counters and control flags. */
+static long   Pci_Io_Read_Count  = 0;
+static long   Pci_Io_Write_Count = 0;
+static long   Pci_Cfg_Read_Count = 0;
+static long   Pci_Cfg_Write_Count= 0;
+static long   Pci_Error_Count    = 0;
+
+static int    Pci_Retry_Max      = 3;	/* Only retry 3 times  */	
+static int    Pci_Error_Flag     = 1;	/* Set Retry Error on. */
+static int    Pci_Trace_Flag     = 0;
+
+
 /**********************************************************************************
  * Log Error infor in Flight Recorder to system Console.
  * Filter out the device not there errors.
@@ -912,17 +925,3 @@ iSeries_pcibios_init_early(void)
 	//ppc_md.pcibios_write_config_dword = iSeries_Node_write_config_dword;
 }
 
-/************************************************************************/
-/* Set the slot reset line to the state passed in.                      */
-/* This is the platform specific for code for the pci_reset_device      */
-/* function.                                                            */
-/************************************************************************/
-int pci_set_reset(struct pci_dev* PciDev, int State) {
-	struct iSeries_Device_Node* DeviceNode = (struct iSeries_Device_Node*)PciDev->sysdata;
- 	if (DeviceNode == NULL) { 
-		printk("PCI: Pci Reset Failed, Device Node not found for pci_dev %p\n",PciDev);
-		return -1;
-	}
-	DeviceNode->ReturnCode = HvCallPci_setSlotReset(ISERIES_BUS(DeviceNode),0x00,DeviceNode->AgentId,State);
-	return DeviceNode->ReturnCode;
-}

arch/ppc64/kernel/pSeries_pci.c

@@ -302,7 +302,6 @@ find_and_init_phbs(void)
 				res->name = Pci_Node->full_name;
 				res->flags = IORESOURCE_IO;
 				phb->io_base_virt = __ioremap(phb->io_base_phys, range.size, _PAGE_NO_CACHE);
-				printk("back\n");
 				if (!pci_io_base) {
 					pci_io_base = (unsigned long)phb->io_base_virt;
 					if (has_isa)
@@ -602,7 +601,6 @@ pSeries_pcibios_fixup(void)
 	struct pci_dev *dev;
 
 	PPCDBG(PPCDBG_PHBINIT, "pSeries_pcibios_fixup: start\n");
-	pci_assign_all_busses = 0;
 
 	check_s7a();
 	
@@ -662,25 +660,3 @@ pSeries_pcibios_init_early(void)
 	ppc_md.pcibios_read_config = rtas_read_config;
 	ppc_md.pcibios_write_config = rtas_write_config;
 }
-/************************************************************************/
-/* Get a char* of the device physical location(U0.3-P1-I8)              */
-/* See the Product Topology in the RS/6000 Architecture.                */
-/************************************************************************/
-int device_Location(struct pci_dev *PciDev, char *BufPtr)
-{
-	struct device_node *DevNode = (struct device_node *)PciDev->sysdata;
-	return sprintf(BufPtr,"PCI: Bus%3d, Device%3d, Vendor %04X, Location %-12s",
-		       PciDev->bus->number,
-		       PCI_SLOT(PciDev->devfn),
-		       PciDev->vendor,
-		       (char*)get_property(DevNode,"ibm,loc-code",0));
-}
-/************************************************************************/
-/* Set the slot reset line to the state passed in.                      */
-/* This is the platform specific for code for the pci_reset_device      */
-/* function.                                                            */
-/************************************************************************/
-int pci_set_reset(struct pci_dev *PciDev, int state)
-{
-	return -1;
-}

arch/ppc64/kernel/pci.h

@@ -13,16 +13,6 @@
 #include <asm/pci-bridge.h>
 
 extern unsigned long isa_io_base;
-extern unsigned long isa_mem_base;
-extern unsigned long pci_dram_offset;
-
-/*******************************************************************
- * Platform independant variables referenced.
- *******************************************************************
- * Set pci_assign_all_busses to 1 if you want the kernel to re-assign
- * all PCI bus numbers.  
- *******************************************************************/
-extern int pci_assign_all_busses;
 
 extern struct pci_controller* pci_alloc_pci_controller(char *model, enum phb_types controller_type);
 extern struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node);
@@ -39,13 +29,8 @@ extern struct pci_controller *phbtab[];
  *******************************************************************/
 extern unsigned long find_and_init_phbs(void);
 
-extern void   fixup_resources(struct pci_dev *dev);
 extern void   ppc64_pcibios_init(void);
 
-extern int    pci_set_reset(struct pci_dev*,int);
-extern int    device_Location(struct pci_dev*,char*);
-extern int    format_device_location(struct pci_dev*,char*, int );
-
 extern struct pci_dev *ppc64_isabridge_dev;	/* may be NULL if no ISA bus */
 
 /*******************************************************************
@@ -69,7 +54,6 @@ void pSeries_pcibios_init(void);
  * Platform configuration flags.. (Live in pci.c)
  *******************************************************************/
 extern int  Pci_Large_Bus_System;      /* System has > 256 buses   */
-extern int  Pci_Manage_Phb_Space;      /* Manage Phb Space for IOAs*/
 
 /*******************************************************************
  * Helper macros for extracting data from pci structures.  
@@ -89,8 +73,4 @@ extern void dumpPci_Controller(struct pci_controller* phb);
 extern void dumpPci_Bus(struct pci_bus* Pci_Bus);
 extern void dumpPci_Dev(struct pci_dev* Pci_Dev);
 
-extern void dump_Phb_tree(void);
-extern void dump_Bus_tree(void);
-extern void dump_Dev_tree(void);
-
 #endif /* __PPC_KERNEL_PCI_H__ */

arch/ppc64/kernel/pci_dma.c

@@ -805,6 +805,7 @@ void create_pci_bus_tce_table( unsigned long token ) {
 /***********************************************************************/
 static struct TceTable* findHwTceTable(struct TceTable * newTceTable )
 {
+#ifdef CONFIG_PPC_ISERIES
 	struct list_head* Device_Node_Ptr    = iSeries_Global_Device_List.next;
 	/* Cache the compare values. */
 	u64  startOffset = newTceTable->startOffset;
@@ -825,6 +826,7 @@ static struct TceTable* findHwTceTable(struct TceTable * newTceTable )
 		/* Get next Device Node in List             */
 		Device_Node_Ptr = Device_Node_Ptr->next;
 	}
+#endif
 	return NULL;
 }
 

arch/ppc64/kernel/pci_dn.c

@@ -67,84 +67,6 @@ update_dn_pci_info(struct device_node *dn, void *data)
 	return NULL;
 }
 
-/*
- * Hit all the BARs of all the devices with values from OF.
- * This is unnecessary on most systems, but also harmless.
- */
-static void * __init
-write_OF_bars(struct device_node *dn, void *data)
-{
-	char *name = get_property(dn, "name", 0);
-	char *device_type = get_property(dn, "device_type", 0);
-	char devname[128];
-	sprintf(devname, "%04x:%02x.%x %s (%s)", dn->busno, PCI_SLOT(dn->devfn), PCI_FUNC(dn->devfn), name ? name : "<no name>", device_type ? device_type : "<unknown type>");
-
-	if (device_type && strcmp(device_type, "pci") == 0 &&
-	    get_property(dn, "class-code", 0) == 0)
-		return NULL;	/* This is probably a phb.  Skip it. */
-
-	if (dn->n_addrs == 0)
-		return NULL;	/* This is normal for some adapters or bridges */
-
-	if (dn->addrs == NULL) {
-		/* This shouldn't happen. */
-		printk(KERN_WARNING "write_OF_bars %s: device has %d BARs, but no addrs recorded\n", devname, dn->n_addrs);
-		return NULL;
-	}
-
-#ifndef CONFIG_PPC_ISERIES
-	int i;
-	u32 oldbar, newbar, newbartest;
-	u8 config_offset;
-
-	for (i = 0; i < dn->n_addrs; i++) {
-		newbar = dn->addrs[i].address;
-		config_offset = dn->addrs[i].space & 0xff;
-		if (ppc_md.pcibios_read_config(dn, config_offset, 4, &oldbar) != PCIBIOS_SUCCESSFUL) {
-			printk(KERN_WARNING "write_OF_bars %s: read BAR%d failed\n", devname, i);
-			continue;
-		}
-		/* Need to update this BAR. */
-		if (ppc_md.pcibios_write_config(dn, config_offset, 4, newbar) != PCIBIOS_SUCCESSFUL) {
-			printk(KERN_WARNING "write_OF_bars %s: write BAR%d with 0x%08x failed (old was 0x%08x)\n", devname, i, newbar, oldbar);
-			continue;
-		}
-		/* sanity check */
-		if (ppc_md.pcibios_read_config(dn, config_offset, 4, &newbartest) != PCIBIOS_SUCCESSFUL) {
-			printk(KERN_WARNING "write_OF_bars %s: sanity test read BAR%d failed?\n", devname, i);
-			continue;
-		}
-		if ((newbar & PCI_BASE_ADDRESS_MEM_MASK) != (newbartest & PCI_BASE_ADDRESS_MEM_MASK)) {
-			printk(KERN_WARNING "write_OF_bars %s: oops...BAR%d read back as 0x%08x%s!\n", devname, i, newbartest, (oldbar & PCI_BASE_ADDRESS_MEM_MASK) == (newbartest & PCI_BASE_ADDRESS_MEM_MASK) ? " (original value)" : "");
-			continue;
-		}
-	}
-#endif
-	return NULL; 
-}
-
-#if 0
-/* Traverse_func that starts the BIST (self test) */
-static void * __init
-startBIST(struct device_node *dn, void *data)
-{
-	struct pci_controller *phb = (struct pci_controller *)data;
-	u8 bist;
-
-	char *name = get_property(dn, "name", 0);
-	udbg_printf("startBIST: %s phb=%p, device=%p\n", name ? name : "<unknown>", phb, dn);
-
-	if (ppc_md.pcibios_read_config_byte(dn, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL) {
-		if (bist & PCI_BIST_CAPABLE) {
-			udbg_printf("  -> is BIST capable!\n", phb, dn);
-			/* Start bist here */
-		}
-	}
-	return NULL;
-}
-#endif
-
-
 /******************************************************************
  * Traverse a device tree stopping each PCI device in the tree.
  * This is done depth first.  As each node is processed, a "pre"
@@ -227,16 +149,6 @@ is_devfn_node(struct device_node *dn, void *data)
 	return (devfn == dn->devfn && busno == dn->busno) ? dn : NULL;
 }
 
-/* Same as is_devfn_node except ignore the "fn" part of the "devfn".
- */
-static void *
-is_devfn_sub_node(struct device_node *dn, void *data)
-{
-	int busno = ((unsigned long)data >> 8) & 0xff;
-	int devfn = ((unsigned long)data) & 0xf8;
-	return (devfn == (dn->devfn & 0xf8) && busno == dn->busno) ? dn : NULL;
-}
-
 /* This is the "slow" path for looking up a device_node from a
  * pci_dev.  It will hunt for the device under it's parent's
  * phb and then update sysdata for a future fastpath.
@@ -276,14 +188,6 @@ pci_devs_phb_init(void)
 {
 	/* This must be done first so the device nodes have valid pci info! */
 	traverse_all_pci_devices(update_dn_pci_info);
-
-	/* Hack for regatta which does not init the bars correctly */
-	traverse_all_pci_devices(write_OF_bars);
-#if 0
-	traverse_all_pci_devices(startBIST);
-	mdelay(5000);
-	traverse_all_pci_devices(checkBIST);
-#endif
 }
 
 

arch/ppc64/kernel/ppc_ksyms.c

@@ -78,9 +78,7 @@ EXPORT_SYMBOL(register_ioctl32_conversion);
 EXPORT_SYMBOL(unregister_ioctl32_conversion);
 
 EXPORT_SYMBOL(isa_io_base);
-EXPORT_SYMBOL(isa_mem_base);
 EXPORT_SYMBOL(pci_io_base);
-EXPORT_SYMBOL(pci_dram_offset);
 
 EXPORT_SYMBOL(find_next_zero_bit);
 

arch/ppc64/kernel/prom.c

@@ -1988,8 +1988,7 @@ interpret_isa_props(struct device_node *np, unsigned long mem_start,
 		adr = (struct address_range *) mem_start;
 		while ((l -= sizeof(struct reg_property)) >= 0) {
 			adr[i].space = rp[i].space;
-			adr[i].address = rp[i].address
-				+ (adr[i].space? 0: _ISA_MEM_BASE);
+			adr[i].address = rp[i].address;
 			adr[i].size = rp[i].size;
 			++i;
 		}

include/asm-ppc64/io.h

@@ -25,13 +25,7 @@
 #undef __IO_DEBUG
 
 extern unsigned long isa_io_base;
-extern unsigned long isa_mem_base;
 extern unsigned long pci_io_base;
-extern unsigned long pci_dram_offset;
-extern int have_print;
-#define _IO_BASE	isa_io_base
-#define _ISA_MEM_BASE	isa_mem_base
-#define PCI_DRAM_OFFSET	pci_dram_offset
 
 #ifdef CONFIG_PPC_ISERIES
 #define readb(addr)		iSeries_Read_Byte((void*)(addr))  

include/asm-ppc64/pci-bridge.h

@@ -12,17 +12,6 @@
 struct device_node;
 struct pci_controller;
 
-/*
- * pci_io_base returns the memory address at which you can access
- * the I/O space for PCI bus number `bus' (or NULL on error).
- */
-extern void *pci_bus_io_base(unsigned int bus);
-extern unsigned long pci_bus_io_base_phys(unsigned int bus);
-extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
-
-/* Get the PCI host controller for a bus */
-extern struct pci_controller* pci_bus_to_hose(int bus);
-
 /* Get the PCI host controller for an OF device */
 extern struct pci_controller*
 pci_find_hose_for_OF_device(struct device_node* node);
@@ -92,6 +81,7 @@ static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
 	else
 		return fetch_dev_dn(dev);
 }
+
 /* Use this macro after the PCI bus walk for max performance when it
  * is known that sysdata is correct.
  */

include/asm-ppc64/pci.h

@@ -9,18 +9,17 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-/* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
-#define IOBASE_BRIDGE_NUMBER	0
-#define IOBASE_MEMORY		1
-#define IOBASE_IO		2
-#define IOBASE_ISA_IO           3
-#define IOBASE_ISA_MEM          4
-
-/* Can be used to override the logic in pci_scan_bus for skipping
- * already-configured bus numbers - to be used for buggy BIOSes
- * or architectures with incomplete PCI setup by the loader.
- */
-extern int pcibios_assign_all_busses(void);
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <asm/scatterlist.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+
+static inline int pcibios_assign_all_busses(void)
+{
+	return 0;
+}
 
 #define PCIBIOS_MIN_IO		0x1000
 #define PCIBIOS_MIN_MEM		0x10000000
@@ -35,31 +34,8 @@ static inline void pcibios_penalize_isa_irq(int irq)
 	/* We don't do dynamic PCI IRQ allocation */
 }
 
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <asm/scatterlist.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-
 struct pci_dev;
-#define REG_SAVE_SIZE 64
-/************************************************************************
- * Structure to hold the data for PCI Register Save/Restore functions.  *
- ************************************************************************/
-struct pci_config_reg_save_area {
-	struct pci_dev* PciDev;	    /* Pointer to device(Sanity Check)     */ 
-	int    Flags;               /* Control & Info Flags                */
-	int    RCode;               /* Return Code on Save/Restore         */
-	int    Register;            /* Pointer to current register.        */
-	u8     Regs[REG_SAVE_SIZE]; /* Save Area                           */ 
-};
-/************************************************************************
- * Functions to support device reset                                    *
- ************************************************************************/
-extern int   pci_reset_device(struct pci_dev*, int, int);
-extern int   pci_save_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
-extern int   pci_restore_config_regs(struct pci_dev*,struct pci_config_reg_save_area*);
+
 extern char* pci_card_location(struct pci_dev*);
 
 extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,