Commit 3176bf2d authored by Zidan Wang's avatar Zidan Wang Committed by Mark Brown

ASoC: wm8960: update pll and clock setting function

Add sysclk auto mode. When it's sysclk auto mode, if the MCLK is
available for clock configure, using MCLK to provide sysclk directly,
otherwise, search a available pll out frequcncy and set pll.

Configure clock in hw_params may cause problems when using bypass style
paths without hw_params in machine driver getting called. So add configure
clock to set_bias_level.
Signed-off-by: default avatarZidan Wang <zidan.wang@freescale.com>
Acked-by: default avatarCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent bc0195aa
This diff is collapsed.
...@@ -82,6 +82,7 @@ ...@@ -82,6 +82,7 @@
#define WM8960_SYSCLK_MCLK (0 << 0) #define WM8960_SYSCLK_MCLK (0 << 0)
#define WM8960_SYSCLK_PLL (1 << 0) #define WM8960_SYSCLK_PLL (1 << 0)
#define WM8960_SYSCLK_AUTO (2 << 0)
#define WM8960_DAC_DIV_1 (0 << 3) #define WM8960_DAC_DIV_1 (0 << 3)
#define WM8960_DAC_DIV_1_5 (1 << 3) #define WM8960_DAC_DIV_1_5 (1 << 3)
......
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