Commit 322dc4af authored by Frederic Barrat's avatar Frederic Barrat Committed by Michael Ellerman

Revert "cxl: Add cxl_slot_is_supported API"

Remove abandonned capi support for the Mellanox CX4.

This reverts commit 4e56f858.
Signed-off-by: default avatarFrederic Barrat <fbarrat@linux.ibm.com>
Acked-by: default avatarAndrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8bf6b91a
...@@ -1808,43 +1808,6 @@ int cxl_slot_is_switched(struct pci_dev *dev) ...@@ -1808,43 +1808,6 @@ int cxl_slot_is_switched(struct pci_dev *dev)
return (depth > CXL_MAX_PCIEX_PARENT); return (depth > CXL_MAX_PCIEX_PARENT);
} }
bool cxl_slot_is_supported(struct pci_dev *dev, int flags)
{
if (!cpu_has_feature(CPU_FTR_HVMODE))
return false;
if ((flags & CXL_SLOT_FLAG_DMA) && (!pvr_version_is(PVR_POWER8NVL))) {
/*
* CAPP DMA mode is technically supported on regular P8, but
* will EEH if the card attempts to access memory < 4GB, which
* we cannot realistically avoid. We might be able to work
* around the issue, but until then return unsupported:
*/
return false;
}
if (cxl_slot_is_switched(dev))
return false;
/*
* XXX: This gets a little tricky on regular P8 (not POWER8NVL) since
* the CAPP can be connected to PHB 0, 1 or 2 on a first come first
* served basis, which is racy to check from here. If we need to
* support this in future we might need to consider having this
* function effectively reserve it ahead of time.
*
* Currently, the only user of this API is the Mellanox CX4, which is
* only supported on P8NVL due to the above mentioned limitation of
* CAPP DMA mode and therefore does not need to worry about this. If the
* issue with CAPP DMA mode is later worked around on P8 we might need
* to revisit this.
*/
return true;
}
EXPORT_SYMBOL_GPL(cxl_slot_is_supported);
static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id) static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id)
{ {
struct cxl *adapter; struct cxl *adapter;
......
...@@ -24,21 +24,6 @@ ...@@ -24,21 +24,6 @@
* generic PCI API. This API is agnostic to the actual AFU. * generic PCI API. This API is agnostic to the actual AFU.
*/ */
#define CXL_SLOT_FLAG_DMA 0x1
/*
* Checks if the given card is in a cxl capable slot. Pass CXL_SLOT_FLAG_DMA if
* the card requires CAPP DMA mode to also check if the system supports it.
* This is intended to be used by bi-modal devices to determine if they can use
* cxl mode or if they should continue running in PCI mode.
*
* Note that this only checks if the slot is cxl capable - it does not
* currently check if the CAPP is currently available for chips where it can be
* assigned to different PHBs on a first come first serve basis (i.e. P8)
*/
bool cxl_slot_is_supported(struct pci_dev *dev, int flags);
/* Get the AFU associated with a pci_dev */ /* Get the AFU associated with a pci_dev */
struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev); struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev);
......
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